IDT5V991A-2JGI8

IDT5V991A-2JGI8 Datasheet

IDT5V991A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK

Part	Datasheet
IDT5V991A-2JGI8	IDT5V991A-2JGI8 (pdf)

Related Parts	Information
IDT5V991A-5JGI8	IDT5V991A-5JGI8
IDT5V991A-7JGI	IDT5V991A-7JGI
IDT5V991A-2J	IDT5V991A-2J
IDT5V991A-5JGI	IDT5V991A-5JGI
IDT5V991A-2JGI	IDT5V991A-2JGI
IDT5V991A-2JG	IDT5V991A-2JG
IDT5V991A-2JG8	IDT5V991A-2JG8
IDT5V991A-7JGI8	IDT5V991A-7JGI8

PDF Datasheet Preview
IDT5V991A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK IDT5V991A FEATURES: • REF is 5V tolerant • 4 pairs of programmable skew outputs • Low skew 200ps same pair, 250ps all outputs • Selectable positive or negative edge synchronization: Excellent for DSP applications • Synchronous output enable • Output frequency 3.75MHz to 85MHz • 2x, 4x, 1/2, and 1/4 outputs • 3 skew grades: IDT5V991A-2 tSKEW0<250ps IDT5V991A-5 tSKEW0<500ps IDT5V991A-7 tSKEW0<750ps • 3-level inputs for skew and PLL range control • PLL bypass for DC testing • External feedback, internal loop filter • 12mA balanced drive outputs • Low Jitter <200ps peak-to-peak • Available in 32-pin PLCC Package DESCRIPTION: The IDT5V991A is a high fanout 3.3V PLL based clock driver intended for high performance computing and data-communications applications. A key feature of the programmable skew is the ability of outputs to lead or lag the REF input signal. The IDT5V991A has eight programmable skew outputs in four banks of Skew is controlled by 3-level input signals that may be hard-wired to appropriate HIGH-MID-LOW levels. When the GND/sOE pin is held low, all the outputs are synchronously enabled. However, if GND/sOE is held high, all the outputs except 3Q0 and 3Q1 are synchronously disabled. Furthermore, when the VCCQ/PE is held high, all the outputs are synchronized with the positive edge of the REF clock input. When VCCQ/ PE is held low, all the outputs are synchronized with the negative edge of REF. Both devices have LVTTL outputs with 12mA balanced drive outputs. FUNCTIONAL BLOCK DIAGRAM GND/sOE 1Q0 Skew Select 1F1:0 VCCQ/PE 2Q0 Skew Select 2F1:0 Skew Select 3F1:0 4Q0 Skew Select 4F1:0 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL c 2001 Integrated Device Technology, Inc. TEMPERATURE 1 RANGES OCTOBER 2008 DSC 5963/3 IDT5V991A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES PIN CONFIGURATION 3F0 FS VCCQ REF GND TEST 2F1 3F1 4F0 4F1 VCCQ/PE VCCN 4Q1 4Q0 GND 4 3 2 1 32 31 30 14 15 16 17 18 19 20 2F0 G N D /sO E 1F1 1F0 VCCN 1Q0 1Q1 GND ORDERING INFORMATION Device Type Package Process COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Blank I Commercial 0°C to +70°C Industrial -40°C to +85°C Rectangular Plastic Leaded Chip Carrier PLCC - Green 5V991A-2 3.3V Programmable Skew PLL Clock Driver TurboClock 5V991A-5 5V991A-7 CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775 for Tech Support:

PDF Datasheet Preview

IDT5V991A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK

IDT5V991A

FEATURES:
• REF is 5V tolerant
• 4 pairs of programmable skew outputs
• Low skew 200ps same pair, 250ps all outputs
• Selectable positive or negative edge synchronization:

Excellent for DSP applications
• Synchronous output enable
• Output frequency 3.75MHz to 85MHz
• 2x, 4x, 1/2, and 1/4 outputs
• 3 skew grades:

IDT5V991A-2 tSKEW0<250ps IDT5V991A-5 tSKEW0<500ps IDT5V991A-7 tSKEW0<750ps
• 3-level inputs for skew and PLL range control
• PLL bypass for DC testing
• External feedback, internal loop filter
• 12mA balanced drive outputs
• Low Jitter <200ps peak-to-peak
• Available in 32-pin PLCC Package

DESCRIPTION:

The IDT5V991A is a high fanout 3.3V PLL based clock driver intended for high performance computing and data-communications applications. A key feature of the programmable skew is the ability of outputs to lead or lag the REF input signal. The IDT5V991A has eight programmable skew outputs in four banks of Skew is controlled by 3-level input signals that may be hard-wired to appropriate HIGH-MID-LOW levels.

When the GND/sOE pin is held low, all the outputs are synchronously enabled. However, if GND/sOE is held high, all the outputs except 3Q0 and 3Q1 are synchronously disabled.

Furthermore, when the VCCQ/PE is held high, all the outputs are synchronized with the positive edge of the REF clock input. When VCCQ/ PE is held low, all the outputs are synchronized with the negative edge of REF. Both devices have LVTTL outputs with 12mA balanced drive outputs.

FUNCTIONAL BLOCK DIAGRAM

GND/sOE
1Q0 Skew

Select
1F1:0

VCCQ/PE
2Q0 Skew

Select
2F1:0

Skew Select
3F1:0
4Q0 Skew

Select
4F1:0

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL
c 2001 Integrated Device Technology, Inc.

TEMPERATURE 1

RANGES

OCTOBER 2008

DSC 5963/3

IDT5V991A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

PIN CONFIGURATION
3F0 FS VCCQ REF GND TEST 2F1
3F1 4F0 4F1 VCCQ/PE VCCN 4Q1 4Q0 GND
4 3 2 1 32 31 30
14 15 16 17 18 19 20
2F0 G N D /sO E 1F1 1F0 VCCN 1Q0 1Q1 GND
ORDERING INFORMATION

Device Type Package Process

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

Blank I

Commercial 0°C to +70°C Industrial -40°C to +85°C

Rectangular Plastic Leaded Chip Carrier

PLCC - Green
5V991A-2 3.3V Programmable Skew PLL Clock Driver TurboClock 5V991A-5 5V991A-7

CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138
for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775
for Tech Support:

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived IDT5V991A-2JGI8 Datasheet file may be downloaded here without warranties.

Datasheet ID: IDT5V991A-2JGI8 637303