IDT5V2528/A / 3.3V PHASE-LOCK LOOP CLOCK DRIVER
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IDT5V2528PGGI (pdf) |
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IDT5V2528APGGI |
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IDT5V2528APGGI8 |
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IDT5V2528PGGI8 |
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IDT5V2528/A / 3.3V PHASE-LOCK LOOP CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE 2.5V / 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES OCTOBER 28, 2014 IDT5V2528/A FEATURES: • Operates at 3.3V VDD/AVDD and 2.5V/3.3V VDDQ • 1:10 fanout • 3-level inputs for output control • External feedback FBIN pin is used to synchronize the outputs to the clock input signal • No external RC network required for PLL loop stability • Configurable 2.5V or 3.3V LVTTL outputs • tPD Phase Error at 100MHz to 166MHz ±150ps • Jitter peak-to-peak at 133MHz and 166MHz ±75ps • Spread spectrum compatible • Operating Frequency: - Std 25MHz to 140MHz - A 25MHz to 167MHz • Available in TSSOP package • Use replacement part 87952AYI-147LF DESCRIPTION: The IDT5V2528 is a high performance, low-skew, low-jitter, phase-lock loop PLL clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback FBOUT output to the clock CLK input signal. The IDT5V2528 inputs, PLL core, Y0, Y1, and FBOUT buffers operate from the 3.3V VDD and AVDD power supply pins. One bank of ten outputs provide low-skew, low-jitter copies of CLK. Of the ten outputs, up to seven may be configured for 2.5V or 3.3V LVTTL outputs. The number of 2.5V outputs is controlled by 3-level input signals G_Ctrl and T_Ctrl, and by connecting the appropriate VDDQ pins to 2.5V or 3.3V. The 3-level input signals may be hard-wired to high-mid-low levels. Output signal duty cycles are adjusted to 50 percent, independent of the duty cycle at CLK. The outputs can be enabled or disabled via the G_Ctrl input. When the G_Ctrl input is mid or high, the outputs switch in phase and frequency with CLK when the G_Ctrl is low, all outputs except FBOUT are disabled to the logic-low state. Unlike many products containing PLLs, the IDT5V2528 does not require external RC networks. The loop filter for the PLL is included on-chip, minimizing component count, board space, and cost. Because it is based on PLL circuitry, the IDT5V2528 requires a stabilization time to achieve phase lock of the feedback signal to the reference signal. This stabilization time is required, following power up and application of a fixed-frequency, fixed-phase signal at CLK, as well as following any changes to the PLL reference or feedback signals. The PLL can be bypassed for test purposes by strapping AVDD to ground. FUNCTIONAL BLOCK DIAGRAM 28 G_Ctrl T_Ctrl 1 MODE SELECT CLK 6 PLL 7 FBIN AVDD The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE 1 c 2013 Integrated Device Technology, Inc. 3 TY0, VDDQ pin 4 26 TY1, VDDQ pin 25 24 TY2, VDDQ pin 25 17 TY3, VDDQ pin 15 16 TY4, VDDQ pin 15 13 TY5, VDDQ pin 11 12 TY6, VDDQ pin 11 10 TY7, VDDQ pin 11 20 Y0, VDD pin 21 19 Y1, VDD pin 21 22 FBOUT, VDD pin 21 MAY 2013 DSC 5971/12 IDT5V2528/A / 3.3V PHASE-LOCK LOOP CLOCK DRIVER PIN CONFIGURATION T_Ctrl GND ORDERING INFORMATION Device Type Package INDUSTRIAL TEMPERATURE RANGE -40ºC to +85ºC Industrial PGG TSSOP - Green 5V2528 5V2528A 2.5V / 3.3V Phase-Lock Loop Clock Driver IDT5V2528/A / 3.3V PHASE-LOCK LOOP CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE Table Discription of Change NRND - Not Recommended for New Designs Product Discontinuation Notice - Last Time Buy Expires on October 28, 2014, PDN# CQ-13-02 Date 5/16/13 12/3/13 IDT5V2528/A / 3.3V PHASE-LOCK LOOP CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE We’ve Got Your Timing Solution. 6024 Silver Creek Valley Road San Jose, CA 95138 Sales 800-345-7015 inside USA +408-284-8200 outside USA Fax 408-284-2775 Tech Support +480-763-2056 DISCLAIMER Integrated Device Technology, Inc. IDT and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT’s products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners. Copyright All rights reserved. |
More datasheets: 0217.050H | 0217.040H | 0217.032H | 021701.6H | 0217.160H | DS-SYS-ST-UT1 | DS-SYS-ST-UR1 | DS-SYS-ST-U1 | IDT5V2528APGGI | IDT5V2528APGGI8 |
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