5P49EE515NDGI

5P49EE515NDGI Datasheet

IDT5P49EE515

Part	Datasheet
5P49EE515NDGI	5P49EE515NDGI (pdf)

Related Parts	Information
5P49EE515NDGI8	5P49EE515NDGI8

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LOW POWER CLOCK GENERATOR DATASHEET IDT5P49EE515 The IDT5P49EE515 is a programmable clock generator intended for low power, battery operated consumer applications. There are four internal PLLs, each individually programmable, allowing for up to five unique non-integer-related frequencies. The frequencies are generated from a single reference clock. The reference clock needs to come from a TCXO sine wave input. A buffered reference Sine wave output clock is supported with amplitude of 750 mV to 1V, peak to peak. The IDT5P49EE515 can be programmed through the use of the I2C interfaces. The programming interface enables the device to be programmed when it is in normal operation or what is commonly known as in system programmable. An internal EEPROM allows the user to save and restore the configuration of the device without having to reprogram it on power-up. Each of the four PLLs has an 8-bit reference divider and a 11-bit feedback divider. This allows the user to generate four unique non-integer-related frequencies. The PLL loop bandwidth is programmable to allow the user to tailor the PLL response to the application. For instance, the user can tune the PLL parameters to minimize jitter generation or to maximize jitter attenuation. Spread spectrum generation is supported on one of the PLLs. There are total three 8-bit output dividers. The outputs are connected to the PLLs via the switch matrix. The switch matrix allows the user to route the PLL outputs to any output bank. This feature can be used to simplify and optimize the board layout. In addition, each output's slew rate and enable/disable function can be programmed. Target Applications • Smart Mobile Handset • Personal Navigation Device PND • Camcorder • DSC • Portable Game Console • Personal Media Player • Four internal PLLs • Internal non-volatile EEPROM • Internal I2C EEPROM master interface • FAST 400kHz mode I2C serial interfaces • Input Frequencies TCXO 10 MHz to 40 MHz • Two buffered Sine wave output at 750 mV to 1Vpp • Output Frequency Ranges kHz to 100 MHz • Each PLL has an 8-bit reference divider and a 11-bit feedback-divider • 8-bit output-divider blocks • I/O Standards: Outputs - 1.8V/2.5V/3.3 V LVTTL/ LVCMOS • 2 independent adjustable VDDO groups. • Programmable Slew Rate Control • Programmable Loop Bandwidth Settings • Programmable output inversion to reduce bimodal jitter • Individual output enable/disable • Power-down/Sleep mode 10uA max in power down mode • 1.8V VDD Core Voltage • Available in 20pin 3x3mm QFN packages • -40 to +85 C Industrial Temp operation LOW POWER CLOCK GENERATOR IDT5P49EE515 LOW POWER CLOCK GENERATOR Functional Block Diagram EEPROM CLOCK GENERATOR TCXO_IN 750 mV to 1 Vpp AVDD PLLA SDA SCL SEL1:0 Control Logic PLLB PLLC VDDO1 VDDO2 / DIV1 / DIV2 / DIV3 OUT0 750 mV to 1 Vpp OUT1 OUT2 OUT3 Ordering Information Ref ND & NE e Thermal Base EP Exposed thermal pad should be externally connected to ground. Part / Order Number 5P49EE515NDGI 5P49EE515NDGI8 Marking See page 20 See page 20 Shipping Packaging Tubes Tape and Reel Package 20pin VFQFPN 20pin VFQFPN Temperature -40 to +85° C -40 to +85° C “G” after the two-letter package code are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology IDT assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. LOW POWER CLOCK GENERATOR IDT5P49EE515 LOW POWER CLOCK GENERATOR EEPROM CLOCK GENERATOR Originator R.Willner R.Willner R.Willner R. Willner R. Willner R. Willner R. Willner R. Willner Date Description of Change 06/02/10 Initial Preliminary Datasheet 07/26/10 Updated thermal pad and dimensions on package drawing. 9/08/10 Power ramp sequenc. Package marking. Thermal pad connected to ground. 10/29/10 Typographical changes. Loop filter calculations. Default register bit corrections. 01/19/11 Corrected notes for top-side marking. 04/13/11 Updated SCLK and SDA pin descriptions Updated DC Electrical Char table for 1.8V LVTTL added VIH and VIL. Updated “Lock Time/PLL Lock Time from shutdown mode” Typ. and Max. specs in AC Timing Electrical Char table. 0930/11 Updated Power-up/Power-down Sequence notes. 10/17/11 Added VDDOx specs to Recommended Operations table Updated Ideal Power-up/Down Sequence diagrams LOW POWER CLOCK GENERATOR IDT5P49EE515 LOW POWER CLOCK GENERATOR EEPROM CLOCK GENERATOR Innovate with IDT and accelerate your future networks. Contact: For Sales 800-345-7015 408-284-8200 Fax 408-284-2775 For Tech Support Corporate Headquarters Integrated Device Technology, Inc. 2011 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA

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LOW POWER CLOCK GENERATOR

DATASHEET

IDT5P49EE515

The IDT5P49EE515 is a programmable clock generator intended for low power, battery operated consumer applications. There are four internal PLLs, each individually programmable, allowing for up to five unique non-integer-related frequencies. The frequencies are generated from a single reference clock. The reference clock needs to come from a TCXO sine wave input.

A buffered reference Sine wave output clock is supported with amplitude of 750 mV to 1V, peak to peak.

The IDT5P49EE515 can be programmed through the use of the I2C interfaces. The programming interface enables the device to be programmed when it is in normal operation or what is commonly known as in system programmable. An internal EEPROM allows the user to save and restore the configuration of the device without having to reprogram it on power-up.

Each of the four PLLs has an 8-bit reference divider and a 11-bit feedback divider. This allows the user to generate four unique non-integer-related frequencies. The PLL loop bandwidth is programmable to allow the user to tailor the PLL response to the application. For instance, the user can tune the PLL parameters to minimize jitter generation or to maximize jitter attenuation. Spread spectrum generation is supported on one of the PLLs.

There are total three 8-bit output dividers. The outputs are connected to the PLLs via the switch matrix. The switch matrix allows the user to route the PLL outputs to any output bank. This feature can be used to simplify and optimize the board layout. In addition, each output's slew rate and enable/disable function can be programmed.

Target Applications
• Smart Mobile Handset
• Personal Navigation Device PND
• Camcorder
• DSC
• Portable Game Console
• Personal Media Player
• Four internal PLLs
• Internal non-volatile EEPROM
• Internal I2C EEPROM master interface
• FAST 400kHz mode I2C serial interfaces
• Input Frequencies

TCXO 10 MHz to 40 MHz
• Two buffered Sine wave output at 750 mV to 1Vpp
• Output Frequency Ranges kHz to 100 MHz
• Each PLL has an 8-bit reference divider and a 11-bit
feedback-divider
• 8-bit output-divider blocks
• I/O Standards:

Outputs - 1.8V/2.5V/3.3 V LVTTL/ LVCMOS
• 2 independent adjustable VDDO groups.
• Programmable Slew Rate Control
• Programmable Loop Bandwidth Settings
• Programmable output inversion to reduce bimodal jitter
• Individual output enable/disable
• Power-down/Sleep mode
10uA max in power down mode
• 1.8V VDD Core Voltage
• Available in 20pin 3x3mm QFN packages
• -40 to +85 C Industrial Temp operation

LOW POWER CLOCK GENERATOR

IDT5P49EE515 LOW POWER CLOCK GENERATOR

Functional Block Diagram

EEPROM CLOCK GENERATOR

TCXO_IN
750 mV to 1 Vpp

AVDD

PLLA

SDA SCL SEL1:0

Control Logic

PLLB PLLC

VDDO1

VDDO2
/ DIV1
/ DIV2
/ DIV3

OUT0
750 mV to 1 Vpp

OUT1

OUT2

OUT3
Ordering Information

Ref ND & NE e

Thermal Base

EP Exposed thermal pad should be externally connected to ground.

Part / Order Number
5P49EE515NDGI 5P49EE515NDGI8

Marking

See page 20 See page 20

Shipping Packaging

Tubes Tape and Reel

Package
20pin VFQFPN 20pin VFQFPN

Temperature
-40 to +85° C -40 to +85° C
“G” after the two-letter package code are the Pb-Free configuration and are RoHS compliant.

While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology IDT assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.

LOW POWER CLOCK GENERATOR

IDT5P49EE515 LOW POWER CLOCK GENERATOR

EEPROM CLOCK GENERATOR

Originator R.Willner R.Willner R.Willner R. Willner R. Willner R. Willner

R. Willner R. Willner

Date Description of Change
06/02/10 Initial Preliminary Datasheet
07/26/10 Updated thermal pad and dimensions on package drawing.
9/08/10 Power ramp sequenc. Package marking. Thermal pad connected to ground.
10/29/10 Typographical changes. Loop filter calculations. Default register bit corrections.
01/19/11 Corrected notes for top-side marking.
04/13/11

Updated SCLK and SDA pin descriptions Updated DC Electrical Char table for 1.8V LVTTL added VIH and VIL. Updated “Lock Time/PLL Lock Time from shutdown mode” Typ. and Max. specs in AC Timing Electrical Char table.
0930/11 Updated Power-up/Power-down Sequence notes.
10/17/11 Added VDDOx specs to Recommended Operations table Updated Ideal Power-up/Down Sequence diagrams

LOW POWER CLOCK GENERATOR

IDT5P49EE515 LOW POWER CLOCK GENERATOR

EEPROM CLOCK GENERATOR

Innovate with IDT and accelerate your future networks. Contact:

For Sales
800-345-7015 408-284-8200 Fax 408-284-2775

For Tech Support

Corporate Headquarters

Integrated Device Technology, Inc.
2011 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived 5P49EE515NDGI Datasheet file may be downloaded here without warranties.

Datasheet ID: 5P49EE515NDGI 637267