IDT2309A-1HDC8

IDT2309A-1HDC8 Datasheet


IDT2309A 3.3V ZERO DELAY CLOCK BUFFER

Part Datasheet
IDT2309A-1HDC8 IDT2309A-1HDC8 IDT2309A-1HDC8 (pdf)
Related Parts Information
IDT2309A-1HPGI8 IDT2309A-1HPGI8 IDT2309A-1HPGI8
IDT2309A-1DC IDT2309A-1DC IDT2309A-1DC
IDT2309A-1DC8 IDT2309A-1DC8 IDT2309A-1DC8
IDT2309A-1DCI IDT2309A-1DCI IDT2309A-1DCI
IDT2309A-1DCI8 IDT2309A-1DCI8 IDT2309A-1DCI8
IDT2309A-1HDC IDT2309A-1HDC IDT2309A-1HDC
IDT2309A-1HDCGI IDT2309A-1HDCGI IDT2309A-1HDCGI
IDT2309A-1HDCGI8 IDT2309A-1HDCGI8 IDT2309A-1HDCGI8
IDT2309A-1HPG IDT2309A-1HPG IDT2309A-1HPG
IDT2309A-1HPGI IDT2309A-1HPGI IDT2309A-1HPGI
IDT2309A-1HPG8 IDT2309A-1HPG8 IDT2309A-1HPG8
PDF Datasheet Preview
IDT2309A 3.3V ZERO DELAY CLOCK BUFFER

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
3.3V ZERO DELAY CLOCK BUFFER

IDT2309A

FEATURES:
• Phase-Lock Loop Clock Distribution
• 10MHz to 133MHz operating frequency
• Distributes one clock input to one bank of five and one bank of
four outputs
• Separate output enable for each output bank
• Output Skew < 250ps
• Low jitter <200 ps cycle-to-cycle
• IDT2309A-1 for Standard Drive
• IDT2309A-1H for High Drive
• No external RC network required
• Operates at 3.3V VDD
• Available in SOIC and TSSOP packages

FUNCTIONAL BLOCK DIAGRAM

DESCRIPTION:

The IDT2309A is a high-speed phase-lock loop PLL clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.

The IDT2309A is a 16-pin version of the IDT2305A. The IDT2309A accepts one reference input, and drives two banks of four low skew clocks. The -1H version of this device operates up to 133MHz frequency and has higher drive than the -1 device. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. In the absence of an input clock, the IDT2309A enters power down. In this mode, the device will draw less than
12µA for Commercial Temperature range and less than 25µA for Industrial
temperature range, and the outputs are tri-stated. The IDT2309A is characterized for both Industrial and Commercial
operation.

CLKOUT

CLKA1

CLKA2

CLKA3
15 CLKA4

S2 8 S1 9

Control Logic

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 1
c 2004 Integrated Device Technology, Inc.

CLKB1

CLKB2

CLKB3

CLKB4

JULY 2004

DSC - 6588/5

IDT2309A 3.3V ZERO DELAY CLOCK BUFFER

PIN CONFIGURATION

CLKA1

CLKA2

CLKB1

CLKB2
16 CLKOUT
15 CLKA4
14 CLKA3

CLKB4

CLKB3
ORDERING INFORMATION

Device Type Package Process

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

Blank I

DC DCG PG PGG

Commercial 0oC to +70oC Industrial -40oC to +85oC

Small Outline IC SOIC - Green Thin Shrink Small Outline Package TSSOP - Green
2309A-1 Zero Delay Clock Buffer with High Drive 2309A-1H
2309A-1DC 2309A-1DCG 2309A-1DCGI 2309A-1DCI 2309A-1HDC 2309A-1HDCI 2309A-1HPGG 2309A-1HPGGI
Ordering Code

Package Type 16-Pin SOIC 16-Pin SOIC 16-Pin SOIC 16-Pin SOIC 16-Pin SOIC 16-Pin SOIC 16-Pin TSSOP 16-Pin TSSOP

Commercial Industrial Commercial Industrial Commercial Industrial

Operating Range

CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138
for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775
for Tech Support:
More datasheets: DDMAM-78P | CA3106F32-8PB15 | BSC119N03S G | MDM-21PCBRP | IDT2309A-1HPGI8 | IDT2309A-1DC | IDT2309A-1DC8 | IDT2309A-1DCI | IDT2309A-1DCI8 | IDT2309A-1HDC


Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived IDT2309A-1HDC8 Datasheet file may be downloaded here without warranties.

Datasheet ID: IDT2309A-1HDC8 637249