8530DY-01LFT

8530DY-01LFT Datasheet

ICS8530-01

Part	Datasheet
8530DY-01LFT	8530DY-01LFT (pdf)

Related Parts	Information
8530DY-01LF	8530DY-01LF

PDF Datasheet Preview
Integrated Circuit Systems, Inc. ICS8530-01 LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER The ICS8530-01 is a low skew, 1-to-16 Differen- tial-to-3.3V LVPECL Fanout Buffer and a mem- HiPerClockS ber of the HiPerClockS family of High Perfor- mance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels. The high gain differential amplifier accepts peak-to- peak input voltages as small as 150mV as long as the com- mon mode voltage is within the specified minimum and maxi- mum range. Guaranteed output and part-to-part skew characteristics make the ICS8530-01 ideal for those clock distribution applications demanding well defined performance and repeatability. • Sixteen differential 3.3V LVPECL outputs • CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency 500MHz • Translates any single-ended input signal to 3.3V LVPECL levels with a resistor bias on nCLK input • Output skew 75ps maximum • Part-to-part skew 250ps maximum • Additive phase jitter, RMS 0.03ps typical • 3.3V output operating supply • 0°C to 70°C ambient operating temperature • Available in both standard and lead-free RoHS compliant packages BLOCK DIAGRAM CLK nCLK Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 Q5 nQ5 Q6 nQ6 Q7 nQ7 8530DY-01 PIN ASSIGNMENT nCLK VCCO Q15 nQ15 Q14 nQ14 VEE Q13 nQ13 Q12 nQ12 VCCO Q15 nQ15 Q14 nQ14 Q13 nQ13 Q12 nQ12 Q11 nQ11 Q10 nQ10 Q9 nQ9 Q8 nQ8 TABLE ORDERING INFORMATION Part/Order Number Marking Package Shipping Packaging Temperature ICS8530DY-01 ICS8530DY-01 48 Lead LQFP tray 0°C to 70°C ICS8530DY-01T ICS8530DY-01 48 Lead LQFP 1000 tape & reel 0°C to 70°C ICS8530DY-01LF ICS8530D01LF 48 Lead "Lead-Free" LQFP tray 0°C to 70°C ICS8530DY-01LFT ICS8530D01LF 48 Lead "Lead-Free" LQFP 1000 tape & reel 0°C to 70°C NOTE Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. The aforementioned trademarks, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated ICS assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 8530DY-01 Integrated Circuit Systems, Inc. ICS8530-01 LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER T2 T4A C Page 5-6 7 2 2 3 6 7 8 12 1 4 5 3 Description of Change Updated figures. Added Termination for LVPECL Outputs section. Pin Description table - VCC description changed to "Core supply pin" from "Positive supply pin". Output Load Test Circuit diagram - corrected VEE equation to read, VEE = -1.3V ± 0.165V from VEE = -1.3V ± 0.135V. Pin Characteristics table - changed C 4pF max. to 4pF typical. Updated AMR Output rating. Power Supply table - changed IEE max. from 120mA to 140mA. Updated Single Ended Signal Driving Differential Input diagram. Added Differential Clock Input Interface section. Power Considerations, changed IEE to 140mA to reflect the Power Supply table and recalculated the equations. Added "Lead-Free" marking to Ordering Information Table. Features section - added Additive Phase Jitter bullet. AC Characteristics table - added tjit row. Added Additive Phase Jitter section. LVPECL DC Characteristics - changed VSWING max limit from 850mV to 1.0V. Corrected VOH max limit from VCCO - 1.0V to VCCO - 0.9V. Added Recommendations for Unused Output Pins. Ordering Information Table - added lead-free note. Date 05/28/02 10/02/02 4/7/04 6/29/04 2/28/05 5/19/06 8530DY-01

PDF Datasheet Preview

Integrated Circuit Systems, Inc.

ICS8530-01

LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER

The ICS8530-01 is a low skew, 1-to-16 Differen-
tial-to-3.3V LVPECL Fanout Buffer and a mem-

HiPerClockS ber of the HiPerClockS family of High Perfor-
mance Clock Solutions from ICS. The CLK, nCLK
pair can accept most standard differential input
levels. The high gain differential amplifier accepts peak-to-
peak input voltages as small as 150mV as long as the com-
mon mode voltage is within the specified minimum and maxi-
mum range.

Guaranteed output and part-to-part skew characteristics make the ICS8530-01 ideal for those clock distribution applications demanding well defined performance and repeatability.
• Sixteen differential 3.3V LVPECL outputs
• CLK, nCLK input pair
• CLK, nCLK pair can accept the following differential
input levels LVDS, LVPECL, LVHSTL, SSTL, HCSL
• Maximum output frequency 500MHz
• Translates any single-ended input signal to
3.3V LVPECL levels with a resistor bias on nCLK input
• Output skew 75ps maximum
• Part-to-part skew 250ps maximum
• Additive phase jitter, RMS 0.03ps typical
• 3.3V output operating supply
• 0°C to 70°C ambient operating temperature
• Available in both standard and lead-free RoHS compliant
packages

BLOCK DIAGRAM

CLK nCLK

Q0 nQ0

Q1 nQ1

Q2 nQ2

Q3 nQ3

Q4 nQ4

Q5 nQ5

Q6 nQ6

Q7 nQ7
8530DY-01

PIN ASSIGNMENT
nCLK VCCO Q15 nQ15 Q14 nQ14

VEE Q13 nQ13 Q12 nQ12 VCCO

Q15 nQ15

Q14 nQ14

Q13 nQ13

Q12 nQ12

Q11 nQ11

Q10 nQ10

Q9 nQ9

Q8 nQ8
TABLE ORDERING INFORMATION

Part/Order Number

Marking

Package

Shipping Packaging Temperature

ICS8530DY-01

ICS8530DY-01
48 Lead LQFP
tray
0°C to 70°C

ICS8530DY-01T

ICS8530DY-01
48 Lead LQFP
1000 tape & reel
0°C to 70°C

ICS8530DY-01LF

ICS8530D01LF
48 Lead "Lead-Free" LQFP
tray
0°C to 70°C

ICS8530DY-01LFT

ICS8530D01LF
48 Lead "Lead-Free" LQFP 1000 tape & reel
0°C to 70°C

NOTE Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.

The aforementioned trademarks, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated ICS assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
8530DY-01

Integrated Circuit Systems, Inc.

ICS8530-01

LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER

T2 T4A C

Page 5-6 7 2
2 3 6 7 8
12 1 4 5 3

Description of Change

Updated figures. Added Termination for LVPECL Outputs section. Pin Description table - VCC description changed to "Core supply pin" from "Positive supply pin".

Output Load Test Circuit diagram - corrected VEE equation to read, VEE = -1.3V ± 0.165V from VEE = -1.3V ± 0.135V. Pin Characteristics table - changed C 4pF max. to 4pF typical.

Updated AMR Output rating.

Power Supply table - changed IEE max. from 120mA to 140mA. Updated Single Ended Signal Driving Differential Input diagram.

Added Differential Clock Input Interface section.

Power Considerations, changed IEE to 140mA to reflect the Power Supply table and recalculated the equations.
Added "Lead-Free" marking to Ordering Information Table.

Features section - added Additive Phase Jitter bullet. AC Characteristics table - added tjit row. Added Additive Phase Jitter section. LVPECL DC Characteristics - changed VSWING max limit from 850mV to 1.0V. Corrected VOH max limit from VCCO - 1.0V to VCCO - 0.9V. Added Recommendations for Unused Output Pins.
Ordering Information Table - added lead-free note.

Date 05/28/02 10/02/02
4/7/04
6/29/04 2/28/05 5/19/06
8530DY-01

More datasheets: 2256 | 4020 | 4002 | 4001 | 2296 | 2264 | 4060 | 5004 | DAMA15PNMBK52F0 | 8530DY-01LF

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Datasheet ID: 8530DY-01LFT 637145