8523BGLFT

8523BGLFT Datasheet


The ICS8523 is a low skew, high performance 1-to-4 Differential-to-HSTL fanout buffer

Part Datasheet
8523BGLFT 8523BGLFT 8523BGLFT (pdf)
Related Parts Information
8523BGLF 8523BGLF 8523BGLF
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DATA SHEET

LOW SKEW, BUFFER

The ICS8523 is a low skew, high performance 1-to-4 Differential-to-HSTL fanout buffer

HiPerClockS and a member of the HiPerClockS family of High

Performance Clock Solutions from ICS. The

ICS8523 has two selectable clock inputs. The

CLK, nCLK pair can accept most standard differential input
levels. The PCLK, nPCLK pair can accept LVPECL, CML, or

SSTL input levels. The clock enable is internally synchronized
to eliminate runt pulses on the outputs during asynchronous
assertion/deassertion of the clock enable pin.

Guaranteed output and part-to-part skew characteristics make the ICS8523 ideal for those applications demanding well defined performance and repeatability.
• 4 differential HSTL compatible outputs
• Selectable diffferential CLK, nCLK or LVPECL clock inputs
• CLK, nCLK pair can accept the following differential
input levels LVDS, LVPECL, HSTL, SSTL, HCSL
• PCLK, nPCLK supports the following input types:

LVPECL, CML, SSTL
• Maximum output frequency 650MHz
• Translates any single-ended input signal to HSTL
levels with resistor bias on nCLK input
• Output skew 30ps maximum
• Part-to-part skew 200ps maximum
• Propagation delay 1.6ns maximum
• 3.3V core, 1.8V output operating supply
• 0°C to 70°C ambient operating temperature
• Lead-Free package available
• Industrial temperature information available upon request

BLOCK DIAGRAM

CLK_EN

CLK nCLK

PCLK nPCLK

CLK_SEL

PIN ASSIGNMENT

GND 1 20 Q0

CLK_EN 2 19 nQ0

CLK_SEL 3
1 8 VDDO

CLK 4 17 Q1

Q0 nQ0
nCLK 5 PCLK 6
16 nQ1 15 Q2

Q1 nQ1
nPCLK 7 nc 8 nc 9
14 nQ2 1 3 VDDO 12 Q3

VDD 10 11 nQ3

ICS8523
20-Lead TSSOP
6.5mm x 4.4mm x 0.92mm body package

G Package

Top View
TABLE ORDERING INFORMATION

Part/Order Number ICS8523BG ICS8523BGT

ICS8523BGLF

Marking ICS8523BG ICS8523BGLF

ICS8523BGLFT

ICS8523BGLF

Package 20 lead TSSOP 20 lead TSSOP on Tape and Reel 20 lead "Lead-Free" TSSOP 20 lead "Lead-Free" TSSOP on Tape and Reel

Count 72 per tube
2500 72 per tube
2500

Temperature 0°C to 70°C 0°C to70°C 0°C to 70°C
0°C to70°C

The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated ICS assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
8523BG
15 IDT / ICS LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-HSTL FANOUT BUFFER

ICS8523

ICS8523

Integrated Circuit

LOW SKEW, 1-TOS-4yDstIeFmFEsR, IEnNcT.IAL-TO-HSTL FANOUT BUFFER

ICS8523

LOW SKEW, 1-TO-T4SD DIFFERENTIAL-TO-HSTL FANOUT BUFFER

Page 5
1 8 - 10
2 4 5 11 - 12
1 9 15

Description of Change

LVHSTL table. Added VSWING row to LVHSTL DC Characteristics Table. AC Characteristics table. t row, added value of to Min.;
changed Max. from to

Updated Figure 1, CLK_EN Timing Diagram.

Updated Figure 1, CLK_EN Timing Diagram.

AC Characteristics table. tPD row, changed Min. from 1.3ns to 1.0ns. tsk pp row, changed Max. from 150ps to 200ps.

In the Application Information section, added Schematic Examples.

Pin Characteristics Table - changed CIN 4pF max. to 4pF typical. Absolute Maximum Ratings - changed Output rating.

HSTL DC Characteristics Table - changed VOH 1V min. to 0.9V min. Power Considerations - changed Total Power Dissipation to reflect VOH change. Calculations changed due to new Total Power Dissipation.
Changed LVHSTL to HSTL throughout data sheet. Features section - added Lead-Free bullet. Updated LVPECL Clock Input Interface section. Added Lead-Free marking to Ordering Information table.

Date 7/31/01 10/17/01 11/2/01 1/11/02 5/6/02 10/25/02
6/20/03
9/13/04
8523BG
16 IDT / ICS LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-HSTL FANOUT BUFFER

ICS8523

IICCSS88915517823420915823-B08F12

TTSSDD

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2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA
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Datasheet ID: 8523BGLFT 637143