ICS558AG-02LNT
ICS558AG-02LNT Datasheet
ICS558A-02
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ICS558AG-02LNT |
ICS558AG-02LNT (pdf) |
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ICS558AG-02LN |
ICS558AG-02LN |
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| LVHSTL TO CMOS CLOCK DIVIDER DATASHEET ICS558A-02 The ICS558A-02 accepts a high-speed LVHSTL input and provides four CMOS low skew outputs from a selectable internal divider divide by 3, divide by The four outputs are split into two banks of two outputs. Each bank has a separate output enable to tri-state the output buffers. The ICS558A-02 is a member of the IDT Clock BlocksTM family of clock generation, synchronization, and distribution devices. • 16-pin TSSOP package • LVHSTL inputs • Accepts up to 250 MHz input frequency • Four low skew <250 ps outputs • Selectable internal divider of 3 or 4 • Operating voltage of V • Lead-free, RoHS compliant package Block Diagram HCLK Output Divide /3 or /4 CLK1 CLK2 CLK3 CLK4 IDT LVHSTL TO CMOS CLOCK DIVIDER ICS558A-02 ICS558A-02 LVHSTL TO CMOS CLOCK DIVIDER LVHSTL CLOCK DIVIDER Pin Assignment HCLK HCLK CLK1 CLK2 CLK3 CLK4 16 Pin 173 Mil 0.65mm TSSOP Tri-State Table OE1 OE0 CLK 1, CLK 2 Tri-state Clock ON Tri-state Clock ON CLK 3, CLK 4 Tri-state Tri-state Clock ON Clock ON Output Divide Selection Output Divide Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name SEL VDD HCLK GND OE0 CLK4 CLK3 CLK2 CLK1 Pin Type Input Power Input Power Input Input Power Output Power Pin Description Select pin for output divider. See table above. Internal pull-up to VDD. Connect to V. Connect to V. Differential LVHSTL input true input . Differential LVHSTL input complimentary input . Connect to ground. Connect to ground. Output enable for CLK1 and CLK2. See table above. Internal pull-up to VDD. Output enable for CLK3 and CLK4. See table above. Internal pull-up to VDD. Connect to ground. Low skew clock output. Low skew clock output. Low skew clock output. Low skew clock output. Connect to V. Connect to V. Ordering Information SEATING PLANE aaa C Part / Order Number 558AG-02LN 558AG-02LNT Marking 558AG02LN 558AG02LT Shipping Packaging Tubes Tape and Reel Package 16-pin TSSOP 16-pin TSSOP Temperature 0 to 70° C 0 to 70° C *LN denotes a lead-free, RoHS compliant package. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology IDT assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. IDT LVHSTL TO CMOS CLOCK DIVIDER ICS558A-02 ICS558A-02 LVHSTL TO CMOS CLOCK DIVIDER LVHSTL CLOCK DIVIDER Innovate with IDT and accelerate your future networks. Contact: For Sales 800-345-7015 408-284-8200 Fax 408-284-2775 For Tech Support Corporate Headquarters Integrated Device Technology, Inc. 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA |
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