954226
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954226AGLF (pdf) |
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954226AGLFT |
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DATASHEET Programmable Timing Control HubTM for Mobile P4TM Systems 954226 Recommended Application CK410M Compatible Main Clock Key Specifications • CPU outputs cycle-cycle jitter < 85ps • PCI Express outputs cycle-cycle jitter < 125ps Output Features • 2 - 0.7V current-mode differential CPU pairs • 4 - 0.7V current-mode differential PCI Express* pairs • 1 - 0.7V current-mode differential CPU/PCI Express selectable pair • 1 - 0.7V current-mode differential SATA pair • 1 - 0.7V current-mode differential LCDCLK/PCI Express selectable pair • 4 - PCI 33MHz • 2 - PCICLK_F, 33MHz free-running • 1 - USB, 48MHz • 1 - DOT, 96MHz, 0.7V current differential pair • 2 - REF, 14.318MHz • SATA outputs cycle-cycle jitter < 125ps • PCI outputs cycle-cycle jitter < 500ps • +/- 300ppm frequency accuracy on CPU, PCI Express and SATA clocks • +/- 100ppm frequency accuracy on USB clocks Features/Benefits • Supports tight ppm accuracy clocks for Serial-ATA and PCI Express • Supports programmable spread percentage and frequency • Uses external 14.318MHz crystal, external crystal load caps are required for frequency tuning • Supports undriven differential CPU, PCI Express pair in PD for power management. • PEREQ# pins to support PCI Express and SATA power management. MLF Pin Configuration TSSOP Pin Configuration GND PCICLK5 PCICLK4 PCICLK3 GND VDDPCI PCICLK2/REQ_SEL** PCI/SRC_STOP# CPU_STOP# REF1/FSLC/TEST_SEL REF0 GND X1 X2 56 55 54 53 52 51 50 49 48 47 46 45 44 43 VDDPCI 1 ITP_EN/PCICLK_F0 2 **SELPCIEX_LCDCLK#/PCICLK_F1 3 42 VDDREF 41 SDATA 40 SCLK Vtt_PwrGd#/PD 4 39 GND VDD48 5 38 CPUCLKT0 FSLA/USB_48MHz 6 37 CPUCLKC0 GND 7 DOTT_96MHz 8 ICS 954226AKLF 36 VDDCPU 35 CPUCLKT1 DOTC_96MHz 9 34 CPUCLKC1 FSLB/TEST_MODE 10 33 IREF LCDCLK_SS/PCIEXT0 11 32 GNDA LCDCLK_SS/PCIEXC0 12 31 VDDA PCIEXT1 13 30 CPUCLKT2_ITP/PCIEXT6 PCIEXC1 14 Ordering Information Part / Order Number 954226AGLF 954226AGLFT 954226AKLF 954226AKLFT Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Package 56-pin TSSOP 56-pin TSSOP 56-pin MLF 56-pin MLF Temperature 0 to +70° C 0 to +70° C 0 to +70° C 0 to +70° C Programmable Timing Control HubTM for Mobile P4TM Systems 954226 Programmable Timing Control HubTM for Mobile P4TM Systems 3/29/2005 7/14/2006 A 4/12/2010 RDW Description Updated Ordering Information from "Lead Free" to "Annealed Lead Free" Added MLF Pinout, Pin Description and Ordering Information. Clean up Electrical Tables Corrected Test Clarification Table Move to final Page # 18 1, 4, 5, 21 Innovate with IDT and accelerate your future networks. Contact: For Sales 800-345-7015 408-284-8200 Fax 408-284-2775 For Tech Support 408-284-6578 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 outside U.S. Asia Pacific and Japan IDT Singapore Pte. Ltd. 1 Kallang Sector #07-01/06 KolamAyer Industrial Park Singapore 349276 Phone 65-6-744-3356 Fax 65-6-744-1764 Europe IDT Europe Limited 321 Kingston Road Leatherhead, Surrey KT22 7TU England Phone 44-1372-363339 Fax 44-1372-378851 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, ICS, and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA |
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