Digital Multi-Phase Buck Controller CHL8203/12/13/14
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PDF Datasheet Preview |
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Digital Multi-Phase Buck Controller CHL8203/12/13/14 • Dual output 2/3/4+1-phase PWM Controller CHL8212/13/14 and single output 3-phase PWM Controller CHL8203 • Easiest layout and fewest pins in the industry • Footprint compatible with CHL8225 CHL8213/14 for analog and power signals • Up to 3 VID select lines for dynamic voltage transitions • Slow OCP for Thermal Design Current TDC protection • Programmable ICRITICAL signal • I2C interface for configuration & telemetry • Pin programmable I2C address CHL8203/13/14 • Overclocking support with I2C voltage override and Vmax setting • Flexible I2C bus security features • I2C security enable pin CHL8203/13/14 • Independent loop switching frequencies from 200kHz to 1.2MHz per phase • IR Efficiency Shaping with Dynamic Phase Control DPC • 1-phase & Active Diode Emulation modes for light load efficiency • IR Adaptive Transient Algorithm ATA on both loops minimizes output bulk capacitors and system cost • Per-Loop Fault Protection OVP, UVP, OCP • Thermal Protection OTP and VRHOT# flag CHL8203/13/14 • Multiple time programmable MTP memory for custom configuration • Compatible with IR ATL and 3.3V tri-state Drivers • 3.3V +10%/-15% supply voltage 0ºC to 85ºC operation • Pb-Free, RoHS, QFN packages • Multi-phase GPU Systems • GDDR Memory The CHL8212/13/14 are dual-loop digital multi-phase buck controllers and the CHL8203 is a single-loop digital multiphase buck controller designed for GPU voltage regulation. Dynamic voltage control is provided by registers which are programmed through I2C and then selected using a 3-bit parallel bus for fast access. The CHL8203/12/13/14 include IR Efficiency Shaping Technology to deliver exceptional efficiency at minimum cost across the entire load range. IR Dynamic Phase Control adds/drops active phases based upon load current and can be configured to enter 1-phase operation and diode emulation mode automatically or by command. IR’s unique Adaptive Transient Algorithm ATA , based on proprietary non-linear digital PWM algorithms, minimizes output bulk capacitors and Multiple Time Programmable MTP storage saves pins and enables a small package size. Device configuration and fault parameters are easily defined using the IR Digital Power Design Center DPDC GUI and stored in on-chip MTP. The CHL8203/12/13/14 provides extensive OVP, UVP, OCP and OTP fault protection and the CHL8203/13/14 includes thermistor based temperature sensing with VRHOT signal. The CHL8203/12/13/14 includes numerous features like register diagnostics for fast design cycles and platform differentiation, truly simplifying VRD design and enabling fastest time-to-market TTM with “set-and-forget” methodology. PIN DIAGRAM IRTN 1 ISEN 1 IRTN 2 ISEN 2 IRTN 3 ISEN 3 IRTN41/NC2 ISEN41/NC2 IRTN_L2 ISEN_L2 40 39 38 37 36 35 34 33 32 31 RCSP 1 RCSM 2 VPGM2 3 VSEN 4 VRTN 5 RRES 6 TSEN1 7 V18A 8 VRRDY1 9 VRRDY2 10 CHL8213/4 40 Pin 6x6 QFN Top View 1 CHL8214 2 CHL8213 41 GND 30 RCSP_L2 29 RCSM_L2 28 VCC 27 VSEN_L2 26 VRTN_L2 25 PWM_L2 24 PWM41/NC2 23 PWM3 22 PWM2 21 PWM1 11 12 13 14 15 16 17 18 19 20 VINSEN VIDSEL2 VIDSEL1 VIDSEL0 VR_HOT# ENABLE ADDR/PROT/EN_L2 SMB_DAT SMB_CLK TSEN2 ORDERING INFORMATION CHL82 T Tape and Reel R Package Type QFN C Commercial Operating Temperature xx Configuration File Part Number 03 CHL8203 12 CHL8212 13 CHL8213 14 CHL8214 Package QFN Tape & Reel Qty 3000 CHL8203-00CRT CHL8203-xxCRT1 CHL8212-00CRT CHL8212-xxCRT1 CHL8213-00CRT CHL8213-xxCRT1 CHL8214-00CRT CHL8214-xxCRT1 Notes -xx indicates a customer specific configuration file. RCSM RCSP IRTN1 ISEN1 IRTN2 ISEN2 IRTN3 RCSP IRTN1 ISEN1 IRTN2 ISEN2 IRTN_L2 ISEN_L2 28 27 26 25 24 23 22 VPGM 1 21 ISEN3 VSEN 2 VRTN 3 RRES 4 CHL8203 28 Pin 5X5 QFN Top View 20 VCC 19 PWM3 18 PWM2 TSEN 5 V18A 6 VRRDY 7 29 GND 17 PWM1 16 SMB_CLK 15 SMB_DAT 10 11 12 13 14 28 27 26 25 24 23 22 RCSM 1 21 RCSP_L2 VPGM 2 20 RCSM_L2 VSEN 3 VRTN 4 CHL8212 28 Pin 5X5 QFN Top View 19 VCC 18 VSEN_L2 RRES 5 17 PWM_L2 V18A 6 VRRDY 7 29 GND 16 PWM2 15 PWM1 |
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