TC1167128F133HLADFXUMA1

TC1167128F133HLADFXUMA1 Datasheet


32-Bit TC1167

Part Datasheet
TC1167128F133HLADFXUMA1 TC1167128F133HLADFXUMA1 TC1167128F133HLADFXUMA1 (pdf)
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32-Bit TC1167
32-Bit Single-Chip Microcontroller

Data Sheet

V1.3 2009-10

Microcontrollers

Edition 2009-10

Published by Infineon Technologies AG 81726 Munich, Germany
2009 Infineon Technologies AG

All Rights Reserved.

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office

Warnings

Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
32-Bit TC1167
32-Bit Single-Chip Microcontroller

Data Sheet

V1.3 2009-10

Microcontrollers

TC1167

TC1167 Data Sheet

Previous Version V0.1

Typo of TTCAN-related text is deleted from the MultiCAN features.

Text which describes the endurance of PFlash and DFlash is enhanced

The text in the Data Access Overlay is enhanced

Input spike-filter is added to PORST.

A footnote is added to VDDMF

The spike-filters parameters are included, tSF1, tSF2

The maximum limit for IOZ1 is updated.

Footnote regarding switch capacitance at analog input is updated.

The temperature sensor measurement time parameter is added.

The condition for HWCFG is deleted from hold time from PORST rising
edge.

The power, pad, reset timing figure is updated.

The notes under the PLL section is updated

IDD at 80MHz for Infineon Power Loop and text for test condition are
updated.

Footnotes for application reset boot time, tB are enhanced.

The method used for the specified thermal resistance values is
included.
Ordering Information
The ordering code for Infineon microcontrollers provides an exact reference to the required product. This ordering code identifies
• The derivative itself, i.e. its function set, the temperature range, and the supply
voltage
• The package and the type of delivery. For the available ordering codes for the TC1167 please refer to the “Product Catalog Microcontrollers”, which summarizes all available microcontroller variants. This document describes the derivatives of the device.The Table 1 enumerates these derivatives and summarizes the differences.

Table 1

TC1167 Derivative Synopsis

Derivative SAF-TC1167-128F133HL

Ambient Temperature Range TA = -40oC to +85oC

Data Sheet

V1.3, 2009-10

TC1167

Introduction

Introduction

This Data Sheet describes the Infineon TC1167, a 32-bit microcontroller DSP, based on the Infineon TriCore Architecture.

About this Document

This document is designed to be read primarily by design engineers and software engineers who need a detailed description of the interactions of the TC1167 functional units, registers, instructions, and exceptions.

This TC1167 Data Sheet describes the features of the TC1167 with respect to the TriCore Architecture. Where the TC1167 directly implements TriCore architectural functions, this manual simply refers to those functions as features of the TC1167. In all cases where this manual describes a TC1167 feature without referring to the TriCore Architecture, this means that the TC1167 is a direct implementation of the TriCore Architecture.

Where the TC1167 implements a subset of TriCore architectural features, this manual describes the TC1167 implementation, and then describes how it differs from the TriCore Architecture. Such differences between the TC1167 and the TriCore Architecture are documented in the section covering each such subject.

Related Documentations

A complete description of the TriCore architecture is found in the document entitled “TriCore Architecture Manual”. The architecture of the TC1167 is described separately this way because of the configurable nature of the TriCore specification Different versions of the architecture may contain a different mix of systems components. The TriCore architecture, however, remains constant across all derivative designs in order to preserve compatibility.

This Data Sheets together with the “TriCore Architecture Manual” are required to understand the complete TC1167 micro controller functionality.

Text Conventions

This document uses the following text conventions for named components of the TC1167:
• Functional units of the TC1167 are given in plain UPPER CASE. For example “The SSC supports full-duplex and half-duplex synchronous communication”.
• Pins using negative logic are indicated by an overline. For example “The external reset pin, ESR0, has a dual function.”.
• Bit fields and bits in registers are in general referenced as “Module_Register name.Bit field” or “Module_Register name.Bit”. For example “The Current CPU Priority Number bit field CPU_ICR.CCPN is cleared”. Most of the

Data Sheet

V1.3, 2009-10

TC1167

Introduction
register names contain a module name prefix, separated by an underscore character “_” from the actual register name for example, “ASC0_CON”, where “ASC0” is the module name prefix, and “CON” is the kernel register name . In chapters describing the kernels of the peripheral modules, the registers are mainly referenced with their kernel register names. The peripheral module implementation sections mainly refer to the actual register names with module prefixes.
• Variables used to describe sets of processing units or registers appear in mixed upper and lower cases. For example, register name “MSGCFGn” refers to multiple “MSGCFG” registers with variable n. The bounds of the variables are always given where the register expression is first used for example, “n = 0-31” , and are repeated as needed in the rest of the text.
• The default radix is decimal. Hexadecimal constants are suffixed with a subscript letter “H”, as in 100H. Binary constants are suffixed with a subscript letter “B”, as in 111B.
• When the extent of register fields, groups register bits, or groups of pins are collectively named in the body of the document, they are represented as “NAME[A:B]”, which defines a range for the named group from B to A. Individual bits, signals, or pins are given as “NAME[C]” where the range of the variable C is given in the text. For example CFG[2:0] and SRPN[0].
• Units are abbreviated as follows MHz = Megahertz us = Microseconds kBaud, kbit = 1000 characters/bits per second MBaud, Mbit = 1,000,000 characters/bits per second Kbyte, KB = 1024 bytes of memory Mbyte, MB = 1048576 bytes of memory

In general, the k prefix scales a unit by 1000 whereas the K prefix scales a unit by Hence, the Kbyte unit scales the expression preceding it by The kBaud unit scales the expression preceding it by The M prefix scales by 1,000,000 or 1048576, and u scales by For example, 1 Kbyte is 1024 bytes, 1 Mbyte is 1024 x 1024 bytes, 1 kBaud/kbit are 1000 characters/bits per second, 1 MBaud/Mbit are characters/bits per second, and 1 MHz is 1,000,000 Hz.
• Data format quantities are defined as follows Byte = 8-bit quantity Half-word = 16-bit quantity Word = 32-bit quantity Double-word = 64-bit quantity

Data Sheet

V1.3, 2009-10

TC1167

Introduction

Reserved, Undefined, and Unimplemented Terminology

In tables where register bit fields are defined, the following conventions are used to indicate undefined and unimplemented function. Furthermore, types of bits and bit fields are defined using the abbreviations as shown in Table

Table 2

Bit Function Terminology

Function of Bits Description

Unimplemented, Reserved

Register bit fields named 0 indicate unimplemented functions with the following behavior.
• Reading these bit fields returns
• These bit fields should be written with 0 if the bit field is
defined as r or rh.
• These bit fields have to be written with 0 if the bit field is
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Datasheet ID: TC1167128F133HLADFXUMA1 638683