SLE 4432 M3.2

SLE 4432 M3.2 Datasheet

Intelligent 256-Byte EEPROM SLE 4432/SLE 4442

Part	Datasheet
SLE 4432 M3.2	SLE 4432 M3.2 (pdf)

Related Parts	Information
SLE 4442 C	SLE 4442 C
SLE 4432 C	SLE 4432 C
SLE 4442 M3.2	SLE 4442 M3.2

PDF Datasheet Preview
ICs for Chip Cards Intelligent 256-Byte EEPROM SLE 4432/SLE 4442 Data Sheet Semiconductor Group Edition This edition was realized using the software system Published by Siemens AG, Bereich Halbleiter, MarketingKommunikation, Balanstraße 73, 81541 München Siemens AG All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies. The information describes the type of component and shall not be considered as assured characteristics. Terms of delivery and rights to change design reserved. For questions on technology, delivery and prices please contact the Semiconductor Group Offices in Germany or the Siemens Companies and Representatives worldwide see address list . Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Siemens Office, Semiconductor Group. Siemens AG is an approved CECC manufacturer. Packing Please use the recycling operators known to you. We can also help you get in touch with your nearest sales office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred. Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components1 of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems2 with the express written approval of the Semiconductor Group of Siemens AG. 1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system. 2 Life support devices or systems are intended a to be implanted in the human body, or b to support and/or maintain and sustain human life. If they fail, it is reasonable to assume that the health of the user may be endangered. ICs for Chip Cards Intelligent 256-Byte EEPROM SLE 4432/SLE 4442 Data Sheet Original Version Previous Releases: Editorial changes This edition was realized using the software system Important: For further information please contact Siemens Semiconductor Group in Munich, Germany, Key Account Service Chip Card ICs and Identsystem ICs, Tel. + 49 89 4144-4362, Fax + 49 89 4144-2360 The supply of this component does not include a licence for its use in smart card applications. This licence is due to INNOVATRON Patents 137 Boulevard de Sébastopol, 75002 Paris, France, Fax + 33 1 40 13 39 09 General Information Contents Pin Configuration 6 Functional Description 7 Memory Overview 8 Transmission Protocol 9 Reset and Answer-to-Reset 10 Operational Modes 10 Commands 12 Read Main Memory SLE 4432 and SLE 4442 14 Read Protection Memory SLE 4432 and SLE 4442 15 Update Main Memory SLE 4432 and SLE 4442 16 Write Protection Memory SLE 4432 and SLE 4442 18 Read Security Memory SLE 4442 only 19 Update Security Memory SLE 4442 only 20 Compare Verification Data SLE 4442 only 20 PSC Verification SLE 4442 only 21 Reset Modes 23 Break 23 Failures 23 Coding of the Chip 23 Operational Information 26 Memory Map 26 Electrical Characteristics 26 Absolute Maximum Ratings 26 Operation Range 27 DC Characteristics 27 AC Characteristics 28 Timing Diagrams 29 Package and Dimensions 32 Semiconductor Group Published by Semiconductor Group Siemens Aktiengesellschaft Semiconductor Group Ordering No. B116-H6695-G1-X-7600 Printed in Germany DA Intelligent 256-Byte EEPROM with Write Protect Function Intelligent 256-Byte EEPROM with Write Protect Function and Programmable Security Code PSC SLE 4432 SLE 4442 q 256 x 8-bit EEPROM organization q Byte-wise addressing q Irreversible byte-wise write protection of lowest 32 addresses Byte 0 31 q 32 x 1-bit organization of protection memory q Two-wire link protocol q End of processing indicated at data output q Answer-to-Reset acc. to ISO standard 7816-3 q Programming time ms per byte for both erasing and writing q Minimum of 104 write/erase cycles1 q Data retention for minimum of ten years1 q Contact configuration and serial interface in accordance with ISO standard 7816 synchronous transmission Additional Feature of SLE 4442 q Data can only be changed after entry of the correct 3-byte programmable security code security memory M2.2 Type SLE 4432 M2.2 SLE 4432 C SLE 4442 M2.2 SLE 4442 C Ordering Code on request on request on request on request Package Wire-Bonded Module M2.2 Chip Wire-Bonded Module M2.2 Chip 1 Values are temperature dependent, for further information please refer to your Siemens sales office. Semiconductor Group 1 Pin Configuration top view SLE 4432 SLE 4442 M2.2 Card Contacts Pin Definitions and Functions Card Contact C1 C2 C3 C4 C5 C6 C7 C8 Symbol VCC RST CLK N.C. GND N.C. I/O N.C. Function Supply voltage Reset Clock input Not connected Ground Not connected Bidirectional data line open drain Not connected SLE 4432/SLE 4442 comes as a M2.2 wire-bonded module for embedding in plastic cards or as a die for customer packaging. Semiconductor Group 2 Functional Description SLE 4432 SLE 4442 Block Diagram Semiconductor Group Memory Overview SLE 4432 SLE 4442 Figure 1 Memory Overwiew SLE 4432 The SLE 4432 consists of 256 x 8 bit EEPROM main memory and a 32-bit protection memory with PROM functionality. The main memory is erased and written byte by byte. When erased, all 8 bits of a data byte are set to logical one. When written, the information in the individual EEPROM cells is, according to the input data, altered bit by bit to logical zeros logical AND between the old and the new data in the EEPROM . Normally a data change consists of an erase and write procedure. It depends on the contents of the data byte in the main memory and the new data byte whether the EEPROM is really erased and/or written. If none of the 8 bits in the addressed byte requires a zeroto-one transition the erase access will be suppressed. Vice versa the write access will be suppressed if no one-to-zero transition is necessary. The write and the erase operation takes at least ms each. Each of the first 32 bytes can be irreversibly protected against data change by writing the corresponding bit in the protection memory. Each data byte in this address range is assigned to one bit of the protection memory and has the same address as the data byte in the main memory which it is assigned to. Once written the protection bit cannot be erased PROM . Semiconductor Group SLE 4432 SLE 4442 SLE 4442 Additionally to the above functions the SLE 4442 provides a security code logic which controls the write/erase access to the memory. For this purpose the SLE 4442 contains a 4-byte security memory with an Error Counter EC bit 0 to bit 2 and 3 bytes reference data. These 3 bytes as a whole are called Programmable Security Code PSC . After power on the whole memory, except for the reference data, can only be read. Only after a successful comparison of verification data with the internal reference data the memory has the identical access functionality of the SLE 4432 until the power is switched off. After three successive unsuccessful comparisons the Error Counter blocks any subsequent attempt, and hence any possibility to write and erase. Transmission Protocol The transmission protocol is a two wire link protocol between the interface device IFD and the integrated circuit IC. It is identical to the protocol type “S = A”. All data changes on I/O are initiated by the falling edge on CLK. The transmission protocol consists of the 4 modes: Reset and Answer-to-Reset Command Mode Outgoing Data Mode Processing Mode Operational modes Note The I/O pin is open drain and therefore requires an external pull up resistor to achieve a high level. Semiconductor Group SLE 4432 SLE 4442 Reset and Answer-to-Reset Answer-to-Reset takes place according to ISO standard 7816-3 ATR . The reset can be given at any time during operation. In the beginning, the address counter is set to zero together with a clock pulse and the first data bit LSB is output to I/O when RST is set from level H to level L. Under a continuous input of additional 31 clock pulses the contents of the first 4 EEPROM addresses is read out. The 33rd clock pulse switches I/O to high impedance Z and finishes the ATR procedure. Answer-to-Reset Hex Byte 1 DO7 DO0 Byte 2 DO15 DO8 Byte 3 DO23 DO16

PDF Datasheet Preview

ICs for Chip Cards

Intelligent 256-Byte EEPROM SLE 4432/SLE 4442

Data Sheet

Semiconductor Group

Edition

This edition was realized using the software system

Published by Siemens AG, Bereich Halbleiter, MarketingKommunikation, Balanstraße 73, 81541 München Siemens AG All Rights Reserved.

Attention please!

As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies.

The information describes the type of component and shall not be considered as assured characteristics.

Terms of delivery and rights to change design reserved.

For questions on technology, delivery and prices please contact the Semiconductor Group Offices in Germany or the Siemens Companies and Representatives worldwide see address list .

Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Siemens Office, Semiconductor Group.

Siemens AG is an approved CECC manufacturer.

Packing

Please use the recycling operators known to you. We can also help you get in touch with your nearest sales office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport.

For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred.

Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components1 of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems2 with the express written approval of the Semiconductor Group of Siemens AG.
1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system.
2 Life support devices or systems are intended a to be implanted in the human body, or b to support and/or maintain and sustain human life. If they fail, it is reasonable to assume that the health of the user may be endangered.

ICs for Chip Cards

Intelligent 256-Byte EEPROM SLE 4432/SLE 4442

Data Sheet

Original Version

Previous Releases:

Editorial changes

This edition was realized using the software system

Important:

For further information please contact Siemens Semiconductor Group in Munich, Germany, Key Account Service Chip Card ICs and Identsystem ICs, Tel. + 49 89 4144-4362, Fax + 49 89 4144-2360

The supply of this component does not include a licence for its use in smart card applications. This licence is due to INNOVATRON Patents 137 Boulevard de Sébastopol, 75002 Paris, France, Fax + 33 1 40 13 39 09

General Information

Contents

Pin Configuration 6

Functional Description 7 Memory Overview 8 Transmission Protocol 9 Reset and Answer-to-Reset 10 Operational Modes 10 Commands 12 Read Main Memory SLE 4432 and SLE 4442 14 Read Protection Memory SLE 4432 and SLE 4442 15 Update Main Memory SLE 4432 and SLE 4442 16 Write Protection Memory SLE 4432 and SLE 4442 18 Read Security Memory SLE 4442 only 19 Update Security Memory SLE 4442 only 20 Compare Verification Data SLE 4442 only 20 PSC Verification SLE 4442 only 21 Reset Modes 23 Break 23 Failures 23 Coding of the Chip 23

Operational Information 26 Memory Map 26 Electrical Characteristics 26 Absolute Maximum Ratings 26 Operation Range 27 DC Characteristics 27 AC Characteristics 28 Timing Diagrams 29

Package and Dimensions 32

Semiconductor Group

Published by Semiconductor Group Siemens Aktiengesellschaft

Semiconductor Group
Ordering No. B116-H6695-G1-X-7600 Printed in Germany DA

Intelligent 256-Byte EEPROM with Write Protect Function

Intelligent 256-Byte EEPROM with Write Protect Function and Programmable Security Code PSC

SLE 4432 SLE 4442
q 256 x 8-bit EEPROM organization q Byte-wise addressing q Irreversible byte-wise write protection of lowest
32 addresses Byte 0 31 q 32 x 1-bit organization of protection memory q Two-wire link protocol q End of processing indicated at data output q Answer-to-Reset acc. to ISO standard 7816-3 q Programming time ms per byte for both erasing
and writing q Minimum of 104 write/erase cycles1 q Data retention for minimum of ten years1 q Contact configuration and serial interface in accordance
with ISO standard 7816 synchronous transmission

Additional Feature of SLE 4442
q Data can only be changed after entry of the correct 3-byte programmable security code security memory

M2.2

Type SLE 4432 M2.2 SLE 4432 C SLE 4442 M2.2 SLE 4442 C
Ordering Code on request on request on request on request

Package Wire-Bonded Module M2.2 Chip Wire-Bonded Module M2.2 Chip
1 Values are temperature dependent, for further information please refer to your Siemens sales office.

Semiconductor Group
1 Pin Configuration top view

SLE 4432 SLE 4442

M2.2 Card Contacts

Pin Definitions and Functions

Card Contact C1 C2 C3 C4 C5 C6 C7 C8

Symbol VCC RST CLK N.C. GND N.C. I/O N.C.

Function Supply voltage Reset Clock input Not connected Ground Not connected Bidirectional data line open drain Not connected

SLE 4432/SLE 4442 comes as a M2.2 wire-bonded module for embedding in plastic cards or as a die for customer packaging.

Semiconductor Group
2 Functional Description

SLE 4432 SLE 4442

Block Diagram

Semiconductor Group

Memory Overview

SLE 4432 SLE 4442

Figure 1 Memory Overwiew

SLE 4432

The SLE 4432 consists of 256 x 8 bit EEPROM main memory and a 32-bit protection memory with PROM functionality. The main memory is erased and written byte by byte. When erased, all 8 bits of a data byte are set to logical one. When written, the information in the individual EEPROM cells is, according to the input data, altered bit by bit to logical zeros logical AND between the old and the new data in the EEPROM . Normally a data change consists of an erase and write procedure. It depends on the contents of the data byte in the main memory and the new data byte whether the EEPROM is really erased and/or written. If none of the 8 bits in the addressed byte requires a zeroto-one transition the erase access will be suppressed. Vice versa the write access will be suppressed if no one-to-zero transition is necessary. The write and the erase operation takes at least ms each.

Each of the first 32 bytes can be irreversibly protected against data change by writing the corresponding bit in the protection memory. Each data byte in this address range is assigned to one bit of the protection memory and has the same address as the data byte in the main memory which it is assigned to. Once written the protection bit cannot be erased PROM .

Semiconductor Group

SLE 4432 SLE 4442

SLE 4442

Additionally to the above functions the SLE 4442 provides a security code logic which controls the write/erase access to the memory. For this purpose the SLE 4442 contains a 4-byte security memory with an Error Counter EC bit 0 to bit 2 and 3 bytes reference data. These 3 bytes as a whole are called Programmable Security Code PSC . After power on the whole memory, except for the reference data, can only be read. Only after a successful comparison of verification data with the internal reference data the memory has the identical access functionality of the SLE 4432 until the power is switched off. After three successive unsuccessful comparisons the Error Counter blocks any subsequent attempt, and hence any possibility to write and erase.

Transmission Protocol

The transmission protocol is a two wire link protocol between the interface device IFD and the integrated circuit IC. It is identical to the protocol type “S = A”. All data changes on I/O are initiated by the falling edge on CLK.

The transmission protocol consists of the 4 modes:

Reset and Answer-to-Reset Command Mode Outgoing Data Mode Processing Mode

Operational modes

Note The I/O pin is open drain and therefore requires an external pull up resistor to achieve a high level.

Semiconductor Group

SLE 4432 SLE 4442

Reset and Answer-to-Reset

Answer-to-Reset takes place according to ISO standard 7816-3 ATR . The reset can be given at any time during operation. In the beginning, the address counter is set to zero together with a clock pulse and the first data bit LSB is output to I/O when RST is set from level H to level L. Under a continuous input of additional 31 clock pulses the contents of the first 4 EEPROM addresses is read out. The 33rd clock pulse switches I/O to high impedance Z and finishes the ATR procedure.

Answer-to-Reset Hex

Byte 1 DO7 DO0

Byte 2 DO15 DO8

Byte 3 DO23 DO16

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived SLE4432M3.2 Datasheet file may be downloaded here without warranties.

Datasheet ID: SLE4432M3.2 638607