SEROCCO-M 2 Channel Serial Optimized Communication Controller PEB 20532 Version PEF 20532 Version
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PEB 20532 F V1.3 (pdf) |
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PEF 20532 F V1.3 |
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Data Sheet, DS 1, Sep. 2000 SEROCCO-M 2 Channel Serial Optimized Communication Controller PEB 20532 Version PEF 20532 Version Datacom Never stop thinking. Edition 2000-09-14 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany Infineon Technologies AG All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide see address list . Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet, DS 1, Sep. 2000 SEROCCO-M 2 Channel Serial Optimized Communication Controller PEB 20532 Version PEF 20532 Version Datacom Never stop thinking. PEB 20532 Previous Version: Page previous Version Page current Version 32-34 35-37 214, 222 218, 226 n.a. 263, 266 n.a. 2000-09-14 SEROCCO V1.1 Preliminary Data Sheet, DS1 Correction signal ’OSR’ is multiplexed with signal ’CD’, signal ’OST’ is multiplexed with ’CTS’ was vice versa corrected HDLC receive address recognition table Corrected location of TCD interrupt async/bisync modes only in registers ISR0 and IMR0 from bit 7 to bit Added timing diagram for external DMA support signals Added address timing diagram for Intel multiplexed mode signal ALE Chapter "Electrical Characteristics" updated with final characterization results. For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide see our webpage at PEB 20532 PEF 20532 Table of Contents Introduction 17 Features 18 Logic Symbol 21 Typical Applications 22 System Integration Example 22 Serial Configuration Examples 24 Differences between SEROCCO-M and the ESCC Family 26 Enhancements to the ESCC Serial Core 26 Simplifications to the ESCC Serial Core 26 |
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