CHL8318-20-01CR

CHL8318-20-01CR Datasheet

CHL8318

Part	Datasheet
CHL8318-20-01CR	CHL8318-20-01CR (pdf)

Related Parts	Information
CHL8318-03CRT	CHL8318-03CRT
CHL8318-20-04CR	CHL8318-20-04CR
CHL8318-04CRT	CHL8318-04CRT
CHL8318-20-04CRT	CHL8318-20-04CRT
CHL8318-01CRT	CHL8318-01CRT
CHL8318-02CRT	CHL8318-02CRT

PDF Datasheet Preview
CHL8318 DIGITAL MULTI-PHASE BUCK CONTROLLER SALERT# SDA SCL PSI# VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VR_READY VR_HOT • Intel VR11.x compliant Digital PWM Controller • Programmable 1-phase to 8-phase operation • Configurable switching frequency from 200 kHz to 1MHz per phase with accuracy better than 2% • Customized Digital Over-Clocking Features o Easy-to-use SMBus Gamer command o Gamer VID control up to 2.3V, Gamer Vmax, VID Override or Track, Digital Load-Line Adjust, Gamer OC/OVP, Gamer OFF pin, Gamer OTP • CHiL Efficiency Shaping Features o Variable Gate Drive o Dynamic Phase Control • 1-phase to 4-phase PSI for Light Loads • Adaptive Transient Algorithm minimizes output bulk capacitors • Designed for use with coupled inductors • Enables Thermal Phase Balancing • SMBus Fault Indicators OVP, UVP, OCP, OTP • SMBus interface for configuring and monitoring SMBus commands include monitoring input current and power • Compatible with CHiL ATL Drivers and tri-state Drivers • Nine bytes of NVM storage available for customer use • +3.3V supply voltage 0ºC to 85ºC Ambient operation • RoHS Compliant, MSL level 1 package IRTN1 ISEN1 IRTN2 ISEN2 IRTN3 ISEN3 IRTN4 ISEN4 IRTN5 ISEN5 IRTN6 ISEN6 IRTN7 ISEN7 RCSP RCSM VCC VCPU VRTN SADDR/ GAMER_OFF IMON RRES VINSEN TSEN1 TSEN2 TSEN3 EN V18A 56 55 54 53 52 51 50 49 48 47 46 45 44 43 CHiL CHL8318 56 Pin 8mmx8mm TOP VIEW 34 15 16 17 18 19 20 21 22 23 24 25 26 27 28 IRTN8 ISEN8 VCC PWM8 PWM7 PWM6 PWM5 PWM4 PWM3 PWM2 PWM1 NC VCC VAR_GATE The CHL8318 is a 8-phase digital synchronous buck controller for core regulation of high-performance VR11.1 and VR11.0 platforms. The CHL8318 is fully compliant with VR11.1 including Power Status Indicator PSI and for improved light load efficiency and accurate current output IMON . The CHiL CHL8318 includes a customized set of digital over-clocking features which require no external components. Gaming applications can use the SMBus interface to place the VRD into “Gamer Mode”. Gamer Mode features include Extended Gamer VID up to 2.3V with mV resolution, Gamer Vmax, CPU VID Override or Track, Digital Load-Line adjust, Gamer OC/OVP and Gamer OFF pin. The CHL8318 deploys a number of efficiency shaping features. The CHL8318 can be configured to optimize MOSFET gate drive versus load current, PSI can be programmed to be up to four phases for optimum light-load efficiency, and the controller can autonomously add/drop phases in low-current and mid-current regions to deliver 90+% efficiency across the entire load range. CHiL’s unique Adaptive Transient Algorithm, based on nonlinear digital PWM algorithms, minimizes output bulk capacitors. Coupled inductor mode of operation allows two phase PSI and add/drop of phases which are 180°out of phase for further improvement in transient response and form factor. CHL8318 supports three NTC temperature sensors to report temperature and trigger VR HOT and OTP faults. Digital thermal balancing allows proportional current imbalance between phases. The CHL8318 provides extensive OVP, UVP, OCP and OTP fault protection. Device and fault configuration parameters are easily defined using the CHiL Intuitive Power Designer IPD GUI and stored in on-chip non-volatile memory NVM . The 3-pin SMBus interface can be used to monitor a variety of operating parameters on up to seven CHL8318 based VRs. The controller includes a unique sensorless and lossless input current monitoring capability. The CHL8318 truly simplifies VRD design and enables fastest time-to-market with its “set-and-forget” methodology. • VR11.x CPU VRD and VRM DDR Memory • High Performance Desktops and Servers • Over-clocking and High-Efficiency Applications Figure CHL8318 56 Pin QFN Package Trademarks and registered trademarks are the property of the respective owners. One Highwood Drive, Tewksbury, MA 01876 Tel +1 978 -640-0011 2009 CHiL Semiconductor Corp. All rights reserved FUNCTIONAL BLOCK DIAGRAM CHL8318 DIGITAL MULTI-PHASE BUCK CONTROLLER VID0 VID1 VID2 VID3 VID4 VID5 VID6 VID7 VCPU VRTN ISEN1 IRTN1 ISEN2 IRTN2 ISEN3 IRTN3 ISEN4 IRTN4 ISEN5 IRTN5 ISEN6 IRTN6 ISEN7 IRTN7 ISEN8 IRTN8 ORDERING INFORMATION CHL8318 T Tape & Reel Package type R QFN Operating Temperature Range C Commercial Standard Package QFN Tape & Reel Qty Part Number 3000 CHL8318CRT PACKAGE INFORMATION

PDF Datasheet Preview

CHL8318

DIGITAL MULTI-PHASE BUCK CONTROLLER

SALERT# SDA SCL PSI# VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0

VR_READY VR_HOT
• Intel VR11.x compliant Digital PWM Controller
• Programmable 1-phase to 8-phase operation
• Configurable switching frequency from 200 kHz to
1MHz per phase with accuracy better than 2%
• Customized Digital Over-Clocking Features
o Easy-to-use SMBus Gamer command o Gamer VID control up to 2.3V, Gamer Vmax,

VID Override or Track, Digital Load-Line Adjust, Gamer OC/OVP, Gamer OFF pin, Gamer OTP
• CHiL Efficiency Shaping Features o Variable Gate Drive o Dynamic Phase Control
• 1-phase to 4-phase PSI for Light Loads
• Adaptive Transient Algorithm minimizes output bulk capacitors
• Designed for use with coupled inductors
• Enables Thermal Phase Balancing
• SMBus Fault Indicators OVP, UVP, OCP, OTP
• SMBus interface for configuring and monitoring SMBus commands include monitoring input current and power
• Compatible with CHiL ATL Drivers and tri-state Drivers
• Nine bytes of NVM storage available for customer use
• +3.3V supply voltage 0ºC to 85ºC Ambient operation
• RoHS Compliant, MSL level 1 package

IRTN1 ISEN1 IRTN2 ISEN2 IRTN3 ISEN3 IRTN4 ISEN4 IRTN5 ISEN5 IRTN6 ISEN6 IRTN7 ISEN7

RCSP RCSM

VCC VCPU VRTN SADDR/ GAMER_OFF IMON RRES VINSEN TSEN1

TSEN2 TSEN3

EN V18A
56 55 54 53 52 51 50 49 48 47 46 45 44 43

CHiL

CHL8318 56 Pin
8mmx8mm

TOP VIEW 34
15 16 17 18 19 20 21 22 23 24 25 26 27 28

IRTN8 ISEN8 VCC PWM8 PWM7 PWM6 PWM5 PWM4 PWM3 PWM2 PWM1 NC VCC VAR_GATE

The CHL8318 is a 8-phase digital synchronous buck controller for core regulation of high-performance VR11.1 and VR11.0 platforms. The CHL8318 is fully compliant with VR11.1 including Power Status Indicator PSI and for improved light load efficiency and accurate current output IMON .

The CHiL CHL8318 includes a customized set of digital over-clocking features which require no external components. Gaming applications can use the SMBus interface to place the VRD into “Gamer Mode”. Gamer Mode features include Extended Gamer VID up to 2.3V with mV resolution, Gamer Vmax, CPU VID Override or Track, Digital Load-Line adjust, Gamer OC/OVP and Gamer OFF pin.

The CHL8318 deploys a number of efficiency shaping features. The CHL8318 can be configured to optimize MOSFET gate drive versus load current, PSI can be programmed to be up to four phases for optimum light-load efficiency, and the controller can autonomously add/drop phases in low-current and mid-current regions to deliver 90+% efficiency across the entire load range.

CHiL’s unique Adaptive Transient Algorithm, based on nonlinear digital PWM algorithms, minimizes output bulk capacitors. Coupled inductor mode of operation allows two phase PSI and add/drop of phases which are 180°out of phase for further improvement in transient response and form factor.

CHL8318 supports three NTC temperature sensors to report temperature and trigger VR HOT and OTP faults. Digital thermal balancing allows proportional current imbalance between phases.

The CHL8318 provides extensive OVP, UVP, OCP and OTP fault protection. Device and fault configuration parameters are easily defined using the CHiL Intuitive Power Designer IPD GUI and stored in on-chip non-volatile memory NVM .

The 3-pin SMBus interface can be used to monitor a variety of operating parameters on up to seven CHL8318 based VRs. The controller includes a unique sensorless and lossless input current monitoring capability.

The CHL8318 truly simplifies VRD design and enables fastest time-to-market with its “set-and-forget” methodology.
• VR11.x CPU VRD and VRM DDR Memory
• High Performance Desktops and Servers
• Over-clocking and High-Efficiency Applications

Figure CHL8318 56 Pin QFN Package

Trademarks and registered trademarks are the property of the respective owners.

One Highwood Drive, Tewksbury, MA 01876 Tel +1 978 -640-0011
2009 CHiL Semiconductor Corp. All rights reserved

FUNCTIONAL BLOCK DIAGRAM

CHL8318

DIGITAL MULTI-PHASE BUCK CONTROLLER

VID0 VID1 VID2 VID3 VID4 VID5 VID6 VID7

VCPU VRTN

ISEN1 IRTN1 ISEN2 IRTN2 ISEN3 IRTN3 ISEN4 IRTN4 ISEN5 IRTN5 ISEN6 IRTN6 ISEN7 IRTN7 ISEN8 IRTN8
ORDERING INFORMATION

CHL8318

T Tape & Reel

Package type R QFN

Operating Temperature Range C Commercial Standard

Package QFN

Tape & Reel Qty Part Number
3000

CHL8318CRT

PACKAGE INFORMATION

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Datasheet ID: CHL8318-20-01CR 637986