CHL8112A-01CRT

CHL8112A-01CRT Datasheet

CHL8112A/B

Part	Datasheet
CHL8112A-01CRT	CHL8112A-01CRT (pdf)

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PDF Datasheet Preview
PRODUCT BRIEF PRELIMINARY CHL8112A/B DIGITAL MULTI-PHASE BUCK CONTROLLER 5-phase dual output PWM Controller Phases are flexibly assigned between Loops 1 & 2 SVI/G34 & Memory MPoL modes Dual OCP support for I-spike enhanced AMD CPUs SMB_Alert Pin for Servers PMBus Address pin or Variable Gate Drive CHL8112A 2nd Temperature Sense CHL8112B Overclocking & Gaming Mode with Vmax setting Switching frequency from 200kHz to 1.2MHz per phase CHiL Efficiency Shaping Features including Variable Gate Drive CHL8112A only , Dynamic Phase Control Programmable 1-phase or 2-phase for Light Loads and Active Diode Emulation for Very Light Loads CHiL Adaptive Transient Algorithm ATA on both loops minimizes output bulk capacitors and system cost Designed for use with coupled inductors Auto-Phase Detection with auto-compensation Per-Loop Fault Protection OVP, UVP, OCP, OTP, CFP I2C/SMBus/PMBus system interface for telemetry of Temperature, Voltage, Current & Power for both loops Non-Volatile Memory NVM for custom configuration Compatible with CHiL ATL and 3.3V tri-state Drivers +3.3V supply voltage 0ºC to 85ºC ambient operation Pb-Free, RoHS, 6x6 40 pin QFN package The CHL8112A/B are dual-loop digital multi-phase buck controllers that drive up to 5 phases. The CHL8112A/B is fully SVI compliant on both loops and provides a Vtt tracking function for DDR memory. The I2C/PMBus interface can communicate with up to 16 CHL8112A/B based VR loops. Device configuration and fault parameters are easily defined using the CHiL Intuitive Power Designer IPD GUI and stored in on-chip NVM. The CHL8112A/B provides extensive OVP, UVP, OCP and OTP fault protection and includes thermistor based temperature sensing with VRHOT signal. The CHL8112A/B also includes numerous features like register diagnostics for fast design cycles and platform differentiation, truly simplifying VRD design and enabling fastest time-to-market with its “set-and-forget” methodology. IRTN1 ISEN1 IRTN2 ISEN2 IRTN3 ISEN3 IRTN4 ISEN4 IRTN5 ISEN5 40 39 38 37 36 35 34 33 32 31 RCSP 1 30 RCSP_L2 RCSM 2 29 RCSM_L2 VCC 3 28 VCC VSEN 4 VRTN 5 RRES 6 TSEN 7 CHL8112A/B 40 Pin 6x6 QFN Top View 27 VSEN_L2 26 VRTN_L2 25 PWM5 24 PWM4 V18A 8 VR_READY1 / PWRGD2 VR_READY_L21 / PWROK2 Notes 1 Pin definition in MPoL mode 2 Pin definition in AMD mode 41 GND 23 PWM3 22 PWM2 21 PWM1 11 12 13 14 15 16 17 18 19 20 VINSEN NC1 / VFIXEN2 NC1 / SVC2 NC1 / SVD2 VR_HOT#1 / VRHOT_ICRIT#2 ENABLE SMB_ALERT# SMB_DIO SMB_CLK VAR_GATE_PM_ADDR CHL8112A TSEN2 CHL8112B NVM storage saves pins and enables a small package size. The CHL8112A/B includes the CHiL Efficiency Shaping Technology to deliver exceptional efficiency at minimum cost across the entire load range. CHiL Variable Gate Drive optimizes the MOSFET gate drive voltage as a function of real-time load current. CHiL Dynamic Phase Control adds/drops active phases based upon load current. The CHL8112A/B can be configured to enter 1-phase operation and active diode emulation mode automatically or by command. CHiL’s unique Adaptive Transient Algorithm ATA , based on proprietary non-linear digital PWM algorithms, minimizes output bulk capacitors. In addition, a coupled inductor mode, with phases added/dropped in pairs, enables further improvement in transient response and form factor. Figure CHL8112A & CHL8112B Packages SVI based systems DDR Memory with Vtt tracking Overclocked & Gaming platforms Trademarks and registered trademarks are the property of the respective owners. One Highwood Drive, Tewksbury, MA 01876 Tel +1 978 -640-0011 2010 CHiL Semiconductor Corp. All rights reserved CHL8112A/B DIGITAL MULTI-PHASE BUCK CONTROLLER ORDERING INFORMATION CHL8112 - T Tape & Reel Package type R QFN Operating Temperature C Commercial Standard Range xxR C QonFfNiguration file Package QFN Tape & Reel Qty 3000 CHL8112A-00CRT1 CHL8112A-xxCRT2 CHL8112B-00CRT1 CHL8112B-xxCRT2 Notes For unprogrammed/default parts, use configuration file Unprogrammed parts will not start up until programmed in order to insure a safe power up. -xx indicates a customer specific configuration file Part A CHL8112A B CHL8112B

PDF Datasheet Preview

PRODUCT BRIEF PRELIMINARY

CHL8112A/B

DIGITAL MULTI-PHASE BUCK CONTROLLER
5-phase dual output PWM Controller Phases are flexibly assigned between Loops 1 & 2 SVI/G34 & Memory MPoL modes Dual OCP support for I-spike enhanced AMD CPUs SMB_Alert Pin for Servers PMBus Address pin or Variable Gate Drive CHL8112A 2nd Temperature Sense CHL8112B Overclocking & Gaming Mode with Vmax setting Switching frequency from 200kHz to 1.2MHz per phase CHiL Efficiency Shaping Features including Variable Gate Drive CHL8112A only , Dynamic Phase Control Programmable 1-phase or 2-phase for Light Loads and Active Diode Emulation for Very Light Loads CHiL Adaptive Transient Algorithm ATA on both loops minimizes output bulk capacitors and system cost Designed for use with coupled inductors Auto-Phase Detection with auto-compensation Per-Loop Fault Protection OVP, UVP, OCP, OTP, CFP I2C/SMBus/PMBus system interface for telemetry of Temperature, Voltage, Current & Power for both loops Non-Volatile Memory NVM for custom configuration Compatible with CHiL ATL and 3.3V tri-state Drivers +3.3V supply voltage 0ºC to 85ºC ambient operation Pb-Free, RoHS, 6x6 40 pin QFN package

The CHL8112A/B are dual-loop digital multi-phase buck controllers that drive up to 5 phases. The CHL8112A/B is fully SVI compliant on both loops and provides a Vtt tracking function for DDR memory.

The I2C/PMBus interface can communicate with up to 16 CHL8112A/B based VR loops. Device configuration and fault parameters are easily defined using the CHiL Intuitive Power Designer IPD GUI and stored in on-chip NVM.

The CHL8112A/B provides extensive OVP, UVP, OCP and OTP fault protection and includes thermistor based temperature sensing with VRHOT signal.

The CHL8112A/B also includes numerous features like register diagnostics for fast design cycles and platform differentiation, truly simplifying VRD design and enabling fastest time-to-market with its “set-and-forget” methodology.

IRTN1 ISEN1 IRTN2 ISEN2 IRTN3 ISEN3 IRTN4 ISEN4 IRTN5 ISEN5
40 39 38 37 36 35 34 33 32 31

RCSP 1
30 RCSP_L2

RCSM 2
29 RCSM_L2

VCC 3
28 VCC

VSEN 4 VRTN 5 RRES 6 TSEN 7

CHL8112A/B 40 Pin 6x6 QFN

Top View
27 VSEN_L2 26 VRTN_L2 25 PWM5 24 PWM4

V18A 8

VR_READY1 / PWRGD2

VR_READY_L21 / PWROK2

Notes 1 Pin definition in MPoL mode 2 Pin definition in AMD mode
41 GND
23 PWM3 22 PWM2 21 PWM1
11 12 13 14 15 16 17 18 19 20

VINSEN NC1 / VFIXEN2

NC1 / SVC2 NC1 / SVD2 VR_HOT#1 / VRHOT_ICRIT#2

ENABLE SMB_ALERT#

SMB_DIO SMB_CLK VAR_GATE_PM_ADDR CHL8112A TSEN2 CHL8112B

NVM storage saves pins and enables a small package size.

The CHL8112A/B includes the CHiL Efficiency Shaping Technology to deliver exceptional efficiency at minimum cost across the entire load range. CHiL Variable Gate Drive optimizes the MOSFET gate drive voltage as a function of real-time load current. CHiL Dynamic Phase Control adds/drops active phases based upon load current. The CHL8112A/B can be configured to enter 1-phase operation and active diode emulation mode automatically or by command.

CHiL’s unique Adaptive Transient Algorithm ATA , based on proprietary non-linear digital PWM algorithms, minimizes output bulk capacitors. In addition, a coupled inductor mode, with phases added/dropped in pairs, enables further improvement in transient response and form factor.

Figure CHL8112A & CHL8112B Packages

SVI based systems DDR Memory with Vtt tracking Overclocked & Gaming platforms

Trademarks and registered trademarks are the property of the respective owners.

One Highwood Drive, Tewksbury, MA 01876 Tel +1 978 -640-0011
2010 CHiL Semiconductor Corp. All rights reserved

CHL8112A/B

DIGITAL MULTI-PHASE BUCK CONTROLLER
ORDERING INFORMATION

CHL8112 -

T Tape & Reel

Package type R QFN Operating Temperature C Commercial Standard Range xxR C QonFfNiguration file

Package QFN

Tape & Reel Qty 3000

CHL8112A-00CRT1 CHL8112A-xxCRT2 CHL8112B-00CRT1 CHL8112B-xxCRT2

Notes For unprogrammed/default parts, use configuration
file Unprogrammed parts will not start up until programmed in order to insure a safe power up. -xx indicates a customer specific configuration file

Part A CHL8112A B CHL8112B

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CHL8112A-01CRT Datasheet file may be downloaded here without warranties.

Datasheet ID: CHL8112A-01CRT 637984