ADM8511/X
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ADM8511X-CC-T-1 (pdf) |
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ADM8511/X USB/Fast Ethernet/HomePNA Controller Communications Never stop thinking. The information in this document is subject to change without notice. Edition 2005-11-30 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany Infineon Technologies AG All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. USB/Fast Ethernet/HomePNA Controller Previous Version: Page62/ 2000-12 2005-11-30 Minor change. Included Green package information Trademarks are registered trademarks of Infineon Technologies AG. 10BaseS , EasyPort , VDSLite are trademarks of Infineon Technologies AG. is a registered trademark of Microsoft Corporation, of Linus Torvalds, of Visio Corporation, and of Adobe Systems Incorporated. Template com_tmplt_a4.fm / 1 / 2003-07-04 ADM8511/X Table of Contents General Description 9 Package Information 10 Features 10 Industry Standard 10 USB I/F 10 MAC/Phy 11 EEPROM I/F 11 FIFO 11 LED Display 11 Miscellaneous 11 LAN Driver Support 11 Utility 11 Interface Description 13 Pin Diagram 13 Pin Description 14 Host Interface 15 MII Interface 15 1M8 Interface 16 Physical Interface 17 LED Display 18 SRAM Interface 18 EEPROM Interface 19 Miscellaneous 19 Power Pins 20 Function Description 21 USB Interface 21 SIE 21 USB Command & EP Decoder 21 MAC Interface 21 MII 21 Adaptive Equalizer 21 LEDs 21 Jabber and SQE 22 Auto Polarity 22 Auto-Negotiation 22 Baseline Wander Compensation 22 FIFO Controller 22 TX FIFO and RX FIFO 23 1/10/100 Ethernet/HomePNA MAC 23 10/100M Ethernet PHY 23 Registers Description 24 System Registers 25 29 Transceiver Registers 65 Electrical Characteristics 84 Absolute Maximum Ratings 84 DC Characteristics 84 Reset Timing 85 USB Interface Timing 86 Home PNA Interface Timing 87 Data Sheet ADM8511/X Table of Contents Packaging 90 APPENDIX 1 - Layout Guide 92 Placement 92 Trace routing 92 Power and Ground 94 APPENDIX 2 - EEPROM Interface & Example 96 Ordering Number Q67801H 26A101 Industry Standard • IEEE802.3 u 100BASE-TX and IEEE802.3 10BASE-T compliant • Supports for IEEE 802.3x flow control • IEEE802.3 u Auto-Negotiation support for 10BASE-T and 100BASE-TX • USB specification and compliant USB I/F • Full-Speed USB Device • Supports 1 USB configuration and 1 interface • Supports all USB standard commands • Supports two vendor specific commands • Supports USB Suspend/Resume detection logic • Supports 4 endpoints 1 control endpoint with maximum 8-byte packet, 1 bulk IN endpoint with maximum 64-byte packet, 1 bulk OUT endpoint with maximum 64-byte packet and 1 interrupt IN endpoint with maximum 8-byte packet Data Sheet ADM8511/X MAC/Phy • Integrates the whole physical layer functions of 100BASE-TX and 10BASE-T by using phy address 1 • Be programmed to isolate the internal PHY, the I/F to external PHY could be either IEEE MII 10M8 for HomePNA Supports configurable threshold for transmitting PAUSE frame • Supports wakeup frame, link status change and magic packet wake-up • Provides full-duplex operation on both 100 Mbit/s and 10 Mbit/s Ethernet modes • Provides Auto-negotiation NWAY function of full/half duplex operation for both 10/100 Mbit/s • Provides transmit wave-shaper, receive filters, and adaptive equalizer • Provides MLT-3 transceiver with DC restoration for Base-Line Wander compensation • Provides MAC and Transceiver loop-back modes for diagnostic • Supports external transmit transformer with turn ratio 1:1 • Supports external receive transformer with turn ratio 1:1 EEPROM I/F • Provides serial interface for read/write 93C46 EEPROM • Automatically load device ID, vendor ID from EEPROM after power-on reset FIFO • Supports internal 2 Kbytes SRAM for transmission • Supports external 32 Kbytes SRAM or internal 24 Kbytes synchronous SRAM for receiving. • Supports “receive 32 packets” or “receive 16 packets” queue in the receive buffer LED Display • Provides LED display • LEDSP Speed - 100 Mbit/s on or 10 Mbit/s off • LEDL Link keeps on when link ok or Active will be blinking with 10 Hz • LEDFD/COL FD keeps on when in Full duplex mode or Collision will be blinking with 20 Hz when colliding Miscellaneous • Supports 6 GPIO pins • Provides 100-pin LQFP package • V power supply with 5 V/3.3 V I/O tolerance LAN Driver Support • Windows Networks NDIS • Linux Utility • EEPROM burn-in program Data Sheet • MFG testing program ADM8511/X Data Sheet Interface Description Pin Diagram ADM8511/X Interface Description Figure 2 Pin Diagram Data Sheet ADM8511/X Pin Description Interface Description Table 1 Abbreviations for Pin Type Abbreviations Standard input-only pin. Digital levels. Output. Digital levels. I/O is a bidirectional input/output signal. |
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