XRT5897IV

XRT5897IV Datasheet

XRT5897

Part	Datasheet
XRT5897IV	XRT5897IV (pdf)

PDF Datasheet Preview
XRT5897 Seven-Channel E1 Line Interface December 2001-3 D Compliant with ITU G.703 Pulse Mask Template for 2.048Mbps E1 Rates D Seven Independent CEPT Transceivers D Supports Differential Transformer Coupled Receivers and Transmitters D On Chip Pulse Shaping for Both 75W and 120W Line Drivers D Compliant with ITU G.775 LOS Declaration/Clearing Recommendation D Optional User Selectable LOS Declaration/Clearing Delay D Compliant with ITU--T G.823 Jitter Tolerance Requirements D Logical Inputs Accept either 3.3V or 5.0V Levels D Ultra-Low Power Dissipation D +3.3V Supply Operation D Individual Transmit Channel Over Temperature Protection D SDH Multiplexer D Digital Cross Connects The XRT5897 is an optimized seven channel 3.3V line interface unit fabricated using low power CMOS technology. The device contains seven independent E1 channels. It is primarily targeted toward SDH multiplexers that accommodate TU12 Tributary Unit Frames. Line cards in these units multiplex 21 E1 interfaces into higher SDH rates. Devices with seven E1 interfaces such as the XRT5897 provide the most efficient method of implementing 21 channel line cards. Each channel performs the driver and receiver functions necessary to convert bipolar signals to logical levels and vice versa. The device requires transformers on both receiver and transmitter sides, and supports both balanced and unbalanced interfaces. The device offers two distinct modes of LOS detection. The first method, which does not require an external clock, provides an LOS output indication signal with thresholds and delay that comply with the ITU G.775 requirements. In the second mode, the user provides an external clock that increases the delay for LOS declaration and clearing. This feature provides the user with the flexibility to implement LOS specifications that require a delay greater than the G.775 requirements. ORDERING INFORMATION Part No. XRT5897IV Package 100 Lead TQFP 14 x 14 x 1.4mm Operating Temperature Range -40°C to +75°C EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z 510 668-7000 z FAX 510 668-7017 XRT5897 BLOCK DIAGRAM 1:2 TIP RX INPUT RING RTIP7 69 R1 R2 RRING7 68 LOSCNT 73 LOSSEL 38 Tranceiver 1 Tranceiver 2 Tranceiver 3 Tranceiver 4 Tranceiver 5 Tranceiver 6 Tranceiver 7 Singnal DPeteeacktor RXPOS7 5 Receive Comparators RXNEG7 6 VCC LOS Detect Loss Delay 1 MUX O LOS7 4 Counter Transmit Line Drivers TTIP7 89 TX OUTPUT RING TRING7 91 Pulse Shaping MUX 1 NRTRoZZ CDyuctlye Adjust TXCLK7 87 TXPOS7 85 TXNEG7 86 Figure XRT5897 Block Diagram Receiver Notes D The same type 1:2CT ratio transformer may be used at the receiver input and transmitter output. D R1 and R2 are both 150W for 75W operation, or 240W for 120W operation. D Return loss exceeds ITU G.703 specification with these resistors and a 1:2CT ratio input transformer. LOS Loss of Signal Notes D LOSSEL pin 38 is connected to logic “1” for ITU G.775 compliant LOS delay, or to logic 0 for user programmable additional delay. D LOSCNT pin 73 is unconnected when LOSSEL is logic 1, or connected to an external clock when LOSSEL is logic

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XRT5897

Seven-Channel E1 Line Interface

December 2001-3

D Compliant with ITU G.703 Pulse Mask Template for 2.048Mbps E1 Rates

D Seven Independent CEPT Transceivers

D Supports Differential Transformer Coupled Receivers and Transmitters

D On Chip Pulse Shaping for Both 75W and 120W Line Drivers

D Compliant with ITU G.775 LOS Declaration/Clearing Recommendation

D Optional User Selectable LOS Declaration/Clearing Delay

D Compliant with ITU--T G.823 Jitter Tolerance Requirements

D Logical Inputs Accept either 3.3V or 5.0V Levels D Ultra-Low Power Dissipation D +3.3V Supply Operation D Individual Transmit Channel Over Temperature

Protection

D SDH Multiplexer D Digital Cross Connects

The XRT5897 is an optimized seven channel 3.3V line interface unit fabricated using low power CMOS technology. The device contains seven independent E1 channels. It is primarily targeted toward SDH multiplexers that accommodate TU12 Tributary Unit Frames. Line cards in these units multiplex 21 E1 interfaces into higher SDH rates. Devices with seven E1 interfaces such as the XRT5897 provide the most efficient method of implementing 21 channel line cards. Each channel performs the driver and receiver functions necessary to convert bipolar signals to logical levels and vice versa. The device requires transformers on both receiver and transmitter sides, and supports both balanced and unbalanced interfaces.

The device offers two distinct modes of LOS detection. The first method, which does not require an external clock, provides an LOS output indication signal with thresholds and delay that comply with the ITU G.775 requirements. In the second mode, the user provides an external clock that increases the delay for LOS declaration and clearing. This feature provides the user with the flexibility to implement LOS specifications that require a delay greater than the G.775 requirements.
ORDERING INFORMATION

Part No. XRT5897IV

Package 100 Lead TQFP 14 x 14 x 1.4mm

Operating Temperature Range
-40°C to +75°C

EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z 510 668-7000 z FAX 510 668-7017

XRT5897

BLOCK DIAGRAM
1:2 TIP RX INPUT RING

RTIP7 69 R1

R2 RRING7 68

LOSCNT 73 LOSSEL 38

Tranceiver 1 Tranceiver 2 Tranceiver 3 Tranceiver 4 Tranceiver 5 Tranceiver 6 Tranceiver 7

Singnal DPeteeacktor

RXPOS7 5 Receive Comparators

RXNEG7 6

VCC LOS Detect

Loss Delay
1 MUX O

LOS7 4

Counter

Transmit Line

Drivers

TTIP7 89

TX OUTPUT

RING

TRING7 91

Pulse Shaping

MUX 1

NRTRoZZ

CDyuctlye Adjust

TXCLK7 87

TXPOS7 85 TXNEG7 86

Figure XRT5897 Block Diagram

Receiver Notes D The same type 1:2CT ratio transformer may be
used at the receiver input and transmitter output. D R1 and R2 are both 150W for 75W operation, or
240W for 120W operation. D Return loss exceeds ITU G.703 specification with
these resistors and a 1:2CT ratio input transformer.

LOS Loss of Signal Notes

D LOSSEL pin 38 is connected to logic “1” for ITU G.775 compliant LOS delay, or to logic 0 for user programmable additional delay.

D LOSCNT pin 73 is unconnected when LOSSEL is logic 1, or connected to an external clock when LOSSEL is logic

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Datasheet ID: XRT5897IV 512936