XR19L220IL40TR-F

XR19L220IL40TR-F Datasheet


XR19L210

Part Datasheet
XR19L220IL40TR-F XR19L220IL40TR-F XR19L220IL40TR-F (pdf)
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XR19L210IL40TR-F XR19L210IL40TR-F XR19L210IL40TR-F
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XR19L210

SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER

JULY 2007

The XR19L210 L210 is a highly integrated device that combines a full-featured single channel Universal Asynchronous Receiver and Transmitter UART and an RS-232 transceiver. The L210 is designed to operate with a single 3.3V or 5V power supply. The L210 is fully compliant with EIA/TIA-232-F Standards from a +3.0V to +5.5V power supply. The device operates at 250 Kbps data rate with worst case 3K ohms load. Both RS-232 driver outputs and receiver inputs can operate in harsh electrical environments of +/-15V without damage and can survive multiple +/-15kV ESD on the RS-232 lines, while maintaining RS-232 output levels.

The L210 operates in four different modes Awake, Partial Sleep, Full Sleep and Power-Save. Each mode can be invoked via hardware and/or software. In the Awake mode, all functions are active. In the Partial Sleep mode, the internal crystal oscillator or charge pump is turned off. In Full Sleep mode, the internal crystal oscillator and the charge pump is shut down. In the Power-Save mode, the core logic is isolated from the control signals chip select, read/write strobes, address and data bus lines . All the RS232 receivers remain active in any of these four modes.
• Battery-Powered Equipment
• Handheld and Mobile Devices
• Handheld Terminals
• Industrial Peripheral Interfaces
• Point-of-Sale POS Systems
• Meets true EIA/TIA-232-F Standards from a V to 5.5V
operation
• Up to 250 Kbps data transmission rate
• 45us sleep mode exit charge pump to full power
• ESD protection for RS-232 I/O pins at
• +/-15kV - Human Body Model
• +/-15kV - IEC 61000-4-2, Air-Gap Discharge
• +/- 8kV - IEC 61000-4-2, Contact Discharge
• Software compatible with industry standard 16550 UART
• Intel/Motorola bus select
• Half-modem interface TXD, RXD, RTS, CTS
• Sleep and Power-save modes to conserve battery power
• Wake-up interrupt upon exiting low power modes

FIGURE BLOCK DIAGRAM

XTAL1 XTAL2 VCC to 5.5V GND ACP C2+ C2C1+ C1-

PwrSave A2:A0 D7:D0 IOR#

IOW# R/W# CS#

INT IRQ# RESET#

I/M#

Intel or Motorola Bus Interface UART Registers

Crystal Osc/Buffer
16 Byte

TX FIFO
16 Byte

RX FIFO

Charge Pump
*5 V Tolerant

Inputs

UART

RTS#

Modem

I/Os

CTS#

XR19L210

RS-232 Transceiver

VREF+

VREFTXD RXD

RTS CTS

Exar Corporation 48720 Kato Road, Fremont CA, 94538
• 510 668-7000
• FAX 510 668-7017


XR19L210

SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER

FIGURE PIN OUT OF THE DEVICE

NC D4 D3 D2 D1 D0 VCC VREF+ NC D4 D3 D2 D1 D0 VCC VREF+ NC
ORDERING INFORMATION

PART NUMBER XR19L210IL40

PACKAGE 40-QFN

OPERATING TEMPERATURE RANGE -40°C to +85°C

DEVICE STATUS Active

PIN DESCRIPTIONS

Pin Descriptions

XR19L210

SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER

NAME
40-QFN PIN#

TYPE

DATA BUS INTERFACE CMOS/TTL Voltage Levels

I Address bus lines These 3 address lines select one of the internal registers in the

UART during a data bus transaction.

I/O Data bus lines [7:0] bidirectional .

IOR#

I When I/M# pin is HIGH, the Intel bus interface is selected and this input becomes read
strobe active LOW . The falling edge instigates an internal read cycle and retrieves the
data byte from an internal register pointed by the address lines [A2:A0], puts the data byte
on the data bus to allow the host processor to read it on the rising edge.

When I/M# pin is LOW, the Motorola bus interface is selected and this input is not used.

IOW#

R/W#

I When I/M# pin is HIGH, it selects Intel bus interface and this input becomes write strobe active LOW . The falling edge instigates the internal write cycle and the rising edge transfers the data byte on the data bus to an internal register pointed by the address lines.

When I/M# pin is LOW, the Motorola bus interface is selected and this input becomes read HIGH and write LOW signal.

I This input is chip select active LOW to enable the device.

INT IRQ#

O When I/M# pin is HIGH, it selects Intel bus interface and this output become the active

OD HIGH device interrupt output. This output is enabled through the software setting of MCR[3] set to the active mode when MCR[3] is set to a logic 1, and set to the three state mode when

MCR[3] is set to a logic See MCR[3].

When I/M# pin is LOW, it selects Motorola bus interface and this output becomes the active

LOW, open-drain interrupt output. An external pull-up resistor is required for proper operation. MCR[3] must be set to a logic 0 for proper operation of the interrupt.

MODEM OR SERIAL I/O INTERFACE EIA-232/RS-232 Voltage Levels

O UART Transmit Data. The TX signal will be LOW < -5V during reset or idle no data .

I UART Receive Data. The RX data input must idle LOW < -3V .

O UART Request-to-Send or general purpose output. This output must be asserted prior to
using auto RTS flow control, see EFR[6], MCR[1] and IER[6].

I UART Clear-to-Send or general purpose input. It can be used for auto CTS flow control,
see EFR[7], MSR[4] and IER[7]. This input has an internal pull-down resistor and can be left
unconnected when not used.
DESCRIPTION Preliminary Datasheet Clarified Partial Sleep Mode and Full Sleep Mode descriptions. Ordering part number changed to XR19L210IL40 Removed "Wireless Portable Devices" from list of applications since the XR19L210 does not have infrared mode. Final Datasheet. Updated DC Electrical Characteristics. Updated the QFN package drawing and added the parameter "k". Corrected IEC spec # on page

NOTICE

EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked no responsibility, however, is assumed for inaccuracies.

EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that a the risk of injury or damage has been minimized b the user assumes all such risks c potential liability of EXAR Corporation is adequately protected under the circumstances.

Copyright 2007 EXAR Corporation

Datasheet July

Send your UART technical inquiry with technical details to hotline:

Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.

XR19L210

SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER

TABLE OF CONTENTS

GENERAL DESCRIPTION 1
1 FEATURES 1

FIGURE BLOCK DIAGRAM 1 FIGURE PIN OUT OF THE 2
ORDERING 2

PIN DESCRIPTIONS 3

PRODUCT 5 FUNCTIONAL 6

CPU 6

FIGURE XR19L210 TYPICAL INTEL/MOTOROLA DATA BUS INTERCONNECTIONS 6
5-VOLT TOLERANT INPUTS 7 DEVICE HARDWARE RESET 7 DEVICE IDENTIFICATION AND 7 INTERNAL 7 DMA 7 INT IRQ# OUTPUT 7

TABLE 1 INT IRQ# PIN OPERATION FOR TRANSMITTER 7 TABLE 2 INT IRQ# PIN OPERATION FOR RECEIVER 8

CRYSTAL OR EXTERNAL CLOCK INPUT 8

FIGURE TYPICAL CRYSTAL 8

PROGRAMMABLE BAUD RATE GENERATOR 8

FIGURE BAUD RATE GENERATOR AND PRESCALER 9 TABLE 3 TYPICAL DATA RATES WITH A MHZ CRYSTAL OR EXTERNAL CLOCK 9

TRANSMITTER 9

TRANSMIT HOLDING REGISTER THR - WRITE ONLY 9 TRANSMITTER OPERATION IN NON-FIFO MODE 10 FIGURE TRANSMITTER OPERATION IN NON-FIFO MODE 10 TRANSMITTER OPERATION IN FIFO MODE 10 FIGURE TRANSMITTER OPERATION IN FIFO AND FLOW CONTROL MODE 10

RECEIVER 10

RECEIVE HOLDING REGISTER RHR - READ-ONLY 11 FIGURE RECEIVER OPERATION IN NON-FIFO MODE 11 FIGURE RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE 11

AUTO RTS HARDWARE FLOW CONTROL 12 AUTO RTS 12 AUTO CTS FLOW CONTROL 12

FIGURE AUTO RTS AND CTS FLOW CONTROL 13

AUTO XON/XOFF SOFTWARE FLOW 13

TABLE 4 AUTO XON/XOFF SOFTWARE FLOW CONTROL 14

SPECIAL CHARACTER DETECT 14 SLEEP MODES AND POWER-SAVE FEATURE WITH WAKE-UP INTERRUPT 14

PARTIAL SLEEP 14 UART IN SLEEP MODE, RS-232 TRANSCEIVER 14 UART ACTIVE, CHARGE PUMP OF RS-232 TRANSCEIVER SHUT DOWN 15

FULL SLEEP MODE 15 POWER-SAVE FEATURE 16

INTERNAL LOOPBACK 17

FIGURE INTERNAL LOOP BACK 17

UART INTERNAL REGISTERS 18

TABLE 5 UART INTERNAL REGISTERS 18 TABLE 6 INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1 19

INTERNAL REGISTER 20 RECEIVE HOLDING REGISTER RHR - READ- ONLY 20 TRANSMIT HOLDING REGISTER THR - WRITE-ONLY 20 BAUD RATE GENERATOR DIVISORS DLL AND DLM - READ/WRITE 20 INTERRUPT ENABLE REGISTER IER - 20

IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION 20 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION 21

XR19L210

SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER

INTERRUPT STATUS REGISTER ISR - READ-ONLY 22

INTERRUPT GENERATION 22 INTERRUPT CLEARING 22 TABLE 7 INTERRUPT SOURCE AND PRIORITY LEVEL 23

FIFO CONTROL REGISTER FCR - WRITE-ONLY 23

TABLE 8 TRANSMIT AND RECEIVE FIFO TRIGGER LEVEL SELECTION 24

LINE CONTROL REGISTER LCR - READ/WRITE 24

TABLE 9 PARITY SELECTION 25

TABLE 10 SOFTWARE FLOW CONTROL FUNCTIONS 29

SOFTWARE FLOW CONTROL REGISTERS XOFF1, XOFF2, XON1, XON2 - WRITE ONLY................... 30

TABLE 11 UART RESET CONDITIONS FOR CHANNEL A AND B 31

ABSOLUTE MAXIMUM RATINGS 31 TYPICAL PACKAGE THERMAL RESISTANCE DATA MARGIN OF ERROR ± 15% 31

AC ELECTRICAL 33
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Datasheet ID: XR19L220IL40TR-F 512924