W134SH

W134SH Datasheet

W134M/W134S

Part	Datasheet
W134SH	W134SH (pdf)

Related Parts	Information
W134MH	W134MH

PDF Datasheet Preview
W134M/W134S Direct Rambus Clock Generator • Differential clock source for Direct Rambus memory subsystem for up to 800-MHz data transfer rate • Provide synchronization flexibility the Channel can optionally be synchronous to an external system or processor clock • Power-managed output allows Rambus Channel clock to be turned off to minimize power consumption for mobile applications • Works with Cypress CY2210, W133, W158, W159, W161, and W167 to support architecture platforms • Low-power CMOS design packaged in a 24- pin QSOP 150-mil SSOP package The Cypress W134M/W134S provides the differential clock signals for a Direct Rambus memory subsystem. It includes signals to synchronize the Direct Rambus Channel clock to an external system clock but can also be used in systems that do not require synchronization of the Rambus clock. Block Diagram REFCLK MULT0:1 PCLKM SYNCLKN Phase Alignment Output Logic CLK CLKB Pin Configuration VDDIR REFCLK PCLKM SYNCLKN VDDIPD STOPB PWRDNB CLKB MULT0 MULT1 S0:1 STOPB Test Logic Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 W134M/W134S Pin Definitions Pin Name REFCLK PCLKM SYNCLKN STOPB PWRDNB MULT 0:1 No. 2 6 11 12 15, 14 Type I Reference Clock Input. Reference clock input, normally supplied by a system frequency synthesizer Cypress W133 . I Phase Detector Input. The phase difference between this signal and SYNCLKN is used to synchronize the Rambus Channel Clock with the system clock. Both PCLKM and SYNCLKN are provided by the Gear Ratio Logic in the memory controller. If Gear Ratio Logic is not used, this pin would be connected to Ground. I Phase Detector Input. The phase difference between this signal and PCLKM is used to synchronize the Rambus Channel Clock with the system clock. Both PCLKM and SYNCLKN are provided by the Gear Ratio Logic in the memory controller. If Gear Ratio Logic is not used, this pin would be connected to Ground. I Clock Output Enable. When this input is driven to active LOW, it disables the differential Rambus Channel clocks. I Active LOW Power-down. When this input is driven to active LOW, it disables the differential Rambus Channel clocks and places the W134M/W134S in power-down mode. Ordering Information Ordering Code W134M/W134SH W134M/W134SHT W134M/W134SSQC W134M/W134SSQCT W134SH W134SHT Package Type 24-pin QSOP 150 mils, SSOP 24-pin QSOP 150 mils, SSOP Tape and Reel 24-pin QSOP 150 mils, SSOP Lead-free 24-pin QSOP 150 mils, SSOP Tape and Reel Lead-free 24-pin QSOP 150 mils, SSOP 24-pin QSOP 150 mils, SSOP Tape and Reel Page 10 of 12 Package Diagram 24-Lead Quarter Size Outline Q13 W134M/W134S 51-85055-*B Direct Rambus is a trademark and Rambus is a registered trademark of Rambus Inc. Intel is a registered trademark of Intel Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Page 11 of 12 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. W134M/W134S Document History Page Document Title W134M/W134S Direct Rambus Clock Generator Document Number 38-07426 Orig. of ECN NO. Issue Date Change Description of Change 115531 05/10/02 DSG Change from Spec number 38-00822 to 38-07246 122927 12/14/02 RBI Add power-up requirements to operating information 131671 12/15/03 RGL Added Lead-free to the W134M device in the ordering information table Page 12 of 12

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W134M/W134S

Direct Rambus Clock Generator
• Differential clock source for Direct Rambus memory subsystem for up to 800-MHz data transfer rate
• Provide synchronization flexibility the Channel can optionally be synchronous to an external system or processor clock
• Power-managed output allows Rambus Channel clock to be turned off to minimize power consumption for mobile applications
• Works with Cypress CY2210, W133, W158, W159, W161, and W167 to support architecture platforms
• Low-power CMOS design packaged in a 24- pin QSOP 150-mil SSOP package

The Cypress W134M/W134S provides the differential clock signals for a Direct Rambus memory subsystem. It includes signals to synchronize the Direct Rambus Channel clock to an external system clock but can also be used in systems that do not require synchronization of the Rambus clock.

Block Diagram

REFCLK MULT0:1

PCLKM SYNCLKN

Phase Alignment

Output Logic

CLK CLKB

Pin Configuration

VDDIR

REFCLK

PCLKM

SYNCLKN

VDDIPD

STOPB

PWRDNB

CLKB

MULT0

MULT1

S0:1 STOPB

Test Logic

Cypress Semiconductor Corporation
• 3901 North First Street
• San Jose, CA 95134
• 408-943-2600

W134M/W134S

Pin Definitions

Pin Name REFCLK PCLKM

SYNCLKN

STOPB PWRDNB MULT 0:1

No. 2 6
11 12 15, 14

Type

I Reference Clock Input. Reference clock input, normally supplied by a system frequency synthesizer Cypress W133 .

I Phase Detector Input. The phase difference between this signal and SYNCLKN is used to synchronize the Rambus Channel Clock with the system clock. Both PCLKM and SYNCLKN are provided by the Gear Ratio Logic in the memory controller. If Gear Ratio Logic is not used, this pin would be connected to Ground.

I Phase Detector Input. The phase difference between this signal and PCLKM is used to synchronize the Rambus Channel Clock with the system clock. Both PCLKM and SYNCLKN are provided by the Gear Ratio Logic in the memory controller. If Gear Ratio Logic is not used, this pin would be connected to Ground.

I Clock Output Enable. When this input is driven to active LOW, it disables the differential Rambus Channel clocks.

I Active LOW Power-down. When this input is driven to active LOW, it disables the differential Rambus Channel clocks and places the W134M/W134S in power-down mode.
Ordering Information
Ordering Code W134M/W134SH W134M/W134SHT W134M/W134SSQC W134M/W134SSQCT W134SH W134SHT

Package Type 24-pin QSOP 150 mils, SSOP 24-pin QSOP 150 mils, SSOP Tape and Reel 24-pin QSOP 150 mils, SSOP Lead-free 24-pin QSOP 150 mils, SSOP Tape and Reel Lead-free 24-pin QSOP 150 mils, SSOP 24-pin QSOP 150 mils, SSOP Tape and Reel

Page 10 of 12

Package Diagram
24-Lead Quarter Size Outline Q13

W134M/W134S
51-85055-*B

Direct Rambus is a trademark and Rambus is a registered trademark of Rambus Inc. Intel is a registered trademark of Intel Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders.

Page 11 of 12

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

W134M/W134S

Document History Page

Document Title W134M/W134S Direct Rambus Clock Generator Document Number 38-07426

Orig. of ECN NO. Issue Date Change

Description of Change
115531 05/10/02

DSG Change from Spec number 38-00822 to 38-07246
122927 12/14/02

RBI Add power-up requirements to operating information
131671 12/15/03
RGL Added Lead-free to the W134M device in the ordering information table

Page 12 of 12

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Datasheet ID: W134SH 508348