CYW15G0201DXB-BBI

CYW15G0201DXB-BBI Datasheet

CYP15G0201DXB CYV15G0201DXB CYW15G0201DXB

Part	Datasheet
CYW15G0201DXB-BBI	CYW15G0201DXB-BBI (pdf)

Related Parts	Information
CYV15G0201DXB-BBC	CYV15G0201DXB-BBC
CYP15G0201DXB-BBXI	CYP15G0201DXB-BBXI
CYV15G0201DXB-BBXC	CYV15G0201DXB-BBXC
CYV15G0201DXB-BBXI	CYV15G0201DXB-BBXI
CYW15G0201DXB-BBC	CYW15G0201DXB-BBC

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CYP15G0201DXB CYV15G0201DXB CYW15G0201DXB Dual-channel HOTLink II Transceiver • Second-generation technology • Compliant to multiple standards ESCON, DVB-ASI, Fibre Channel and Gigabit Ethernet IEEE802.3z CPRI compliant CYW15G0201DXB compliant to OBSAI-RP3 CYV15G0201DXB compliant to SMPTE 259M and SMPTE 292M 8B/10B encoded or 10-bit unencoded data • Dual channel transceiver operates from 195 to 1500 MBaud serial data rate CYW15G0201DXB operates from 195 to 1540 MBaud serial data rate Aggregate throughput of 6 GBits/second • Selectable parity check/generate • Selectable dual-channel bonding option One 16-bit channels • Skew alignment support for multiple bytes of offset • Selectable input/output clocking options • MultiFrame Receive Framer Bit and Byte alignment Comma or full K28.5 detect Single- or multi-byte framer for byte alignment Low-latency option • Synchronous LVTTL parallel interface • Internal phase-locked loops PLLs with no external PLL components • Optional Phase-Align Buffer in transmit path • Optional Elasticity Buffer in receive path • Dual differential PECL-compatible serial inputs per channel Internal DC-restoration • Dual differential PECL-compatible serial outputs per channel Source matched for transmission lines No external bias resistors required Signaling-rate controlled edge-rates • Compatible with Fiber-optic modules Copper cables Circuit board traces • JTAG boundary scan • Built-In Self-Test BIST for at-speed link testing • Per-channel Link Quality Indicator Analog signal detect Digital signal detect • Low power 1.8W 3.3V typical • Single 3.3V supply • 196-ball BGA • Pb-Free package option available • BiCMOS technology Functional Description The CYP V 15G0201DXB[1] Dual-channel HOTLink II Transceiver is a point-to-point or point-to-multipoint communications building block allowing the transfer of data over high-speed serial links optical fiber, balanced, and unbalanced copper transmission lines at signaling speeds ranging from 195- to 1500-MBaud per serial link. The CYV15G0201DXB satisfies the SMPTE 259M and SMPTE 292M compliance as per the EG34-1999 Pathological Test Requirements. CYP V W 15G0201DXB CYP V W 15G0201DXB System Host System Host Serial Links Serial Links Backplane or Cabled Connections Figure HOTLink II System Connections Note: CYV15G0201DXB refers to SMPTE 259M and SMPTE 292M compliant devices. CYW15G0201DXB refers to OBSAI RP3 compliant devices maximum operating data rate is 1540 MBaud . CYP15G0201DXB refers to devices not compliant to SMPTE 259M and SMPTE 292M pathological test requirements and also OBSAI RP3 operating datarate of 1536 MBaud. CYP V W 15G0201DXB refers to all three devices. Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 CYP15G0201DXB CYV15G0201DXB CYW15G0201DXB The following information describes how the tables shall be used for both generating valid Transmission Characters encoding and checking the validity of received Transmission Characters decoding . It also specifies the ordering rules to be followed when transmitting the bits within a character and the characters within any higher-level constructs specified by the standard. Transmission Order Within the definition of the 8B/10B Transmission Code, the bit positions of the Transmission Characters are labeled a, b, c, d, e, i, f, g, h, j. Bit “a” is transmitted first followed by bits b, c, d, e, i, f, g, h, and j in that order. Note that bit i is transmitted between bit e and bit f, rather than in alphabetical order. Valid and Invalid Transmission Characters The following tables define the valid Data Characters and valid Special Characters K characters , respectively. The tables are used for both generating valid Transmission Characters encoding and checking the validity of received Transmission Characters decoding . In the tables, each Valid-Data-byte or Special-Character-code entry has two columns that represent two not necessarily different Transmission Characters. The two columns correspond to the current value of the running disparity “Current RD−” or “Current RD+” . Running disparity is a binary parameter with either a negative − or positive + value. After powering on, the Transmitter may assume either a positive or negative value for its initial running disparity. Upon transmission of any Transmission Character, the transmitter will select the proper version of the Transmission Character based on the current running disparity value, and the Trans- Page 38 of 46 CYP15G0201DXB CYV15G0201DXB CYW15G0201DXB mitter calculates a new value for its running disparity based on the contents of the transmitted character. Special Character codes C1.7 and C2.7 can be used to force the transmission of a specific Special Character with a specific running disparity as required for some special sequences in X3.230. After powering on, the Receiver may assume either a positive or negative value for its initial running disparity. Upon reception of any Transmission Character, the Receiver decides whether the Transmission Character is valid or invalid according to the following rules and tables and calculates a new value for its Running Disparity based on the contents of the received character. The following rules for running disparity are used to calculate the new running-disparity value for Transmission Characters that have been transmitted and that have been received. Running disparity for a Transmission Character is calculated from sub-blocks, where the first six bits abcdei form one sub-block and the second four bits fghj form the other sub-block. Running disparity at the beginning of the 6-bit sub-block is the running disparity at the end of the previous Transmission Character. Running disparity at the beginning of the 4-bit sub-block is the running disparity at the end of the 6-bit sub-block. Running disparity at the end of the Transmission Character is the running disparity at the end of the 4-bit sub-block. Running disparity for the sub-blocks is calculated as follows: Running disparity at the end of any sub-block is positive if the sub-block contains more ones than zeros. It is also positive at the end of the 6-bit sub-block if the 6-bit sub-block is 000111, and it is positive at the end of the 4-bit sub-block if the 4-bit sub-block is Running disparity at the end of any sub-block is negative if the sub-block contains more zeros than ones. It is also negative at the end of the 6-bit sub-block if the 6-bit sub-block is 111000, and it is negative at the end of the 4-bit sub-block if the 4-bit sub-block is Otherwise, running disparity at the end of the sub-block is the same as at the beginning of the sub-block Use of the Tables for Generating Transmission Characters The appropriate entry in Table 24 for the Valid Data byte or Table 25 for the Special Character byte for which Transmission Character is to be generated encoded . The current value of the Transmitter’s running disparity is used to select the Transmission Character from its corresponding column. For each Transmission Character transmitted, a new value of the running disparity is calculated. This new value shall be used as the Transmitter’s current running disparity for the next Valid Data byte or Special Character byte to be encoded and transmitted. Table 22 shows naming notations and examples of valid transmission characters. Use of the Tables for Checking the Validity of Received Transmission Characters The column corresponding to the current value of the Receiver’s running disparity is searched for the received Transmission Character. If the received Transmission Character is found in the proper column, then the Transmission Character is valid and the associated Data byte or Special Character code is determined decoded . If the received Transmission Character is not found in that column, then the Transmission Character is invalid. This is called a code violation. Independent of the Transmission Character’s validity, the received Transmission Character is used to calculate a new value of running disparity. The new value is used as the Receiver’s current running disparity for the next received Transmission Character. Table Valid Transmission Characters Byte Name D0.0 Data DIN or QOUT 765 43210 000 Hex Value 00 D1.0 000 00001 D2.0 000 00010 D5.2 010 000101 D30.7 111 11110 D31.7 Detection of a code violation does not necessarily show that the Transmission Character in which the code violation was detected is in error. Code violations may result from a prior error that altered the running disparity of the bit stream which did not result in a detectable error at the Transmission Character in which the error occurred. Table 23 shows an example of this behavior. Table Code Violations Resulting from Prior Errors Character Character Character Transmitted data character Ordering Information Speed Standard OBSAI Standard OBSAI Ordering Code CYP15G0201DXB-BBC CYP15G0201DXB-BBI CYV15G0201DXB-BBC CYV15G0201DXB-BBI CYW15G0201DXB-BBC CYW15G0201DXB-BBI CYP15G0201DXB-BBXC CYP15G0201DXB-BBXI CYV15G0201DXB-BBXC CYV15G0201DXB-BBXI CYW15G0201DXB-BBXC CYW15G0201DXB-BBXI Package Name BB196A Package Type 196-ball Grid Array 196-ball Grid Array 196-ball Grid Array 196-ball Grid Array 196-ball Grid Array 196-ball Grid Array Pb-Free 196-ball Grid Array Pb-Free 196-ball Grid Array Pb-Free 196-ball Grid Array Pb-Free 196-ball Grid Array Pb-Free 196-ball Grid Array Pb-Free 196-ball Grid Array Package Diagram 196-ball FBGA 15 x 15 x mm BB196A Operating Range Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial 51-85156-*A HOTLink is a registered trademark, and HOTLink II and MultiFrame are trademarks, of Cypress Semiconductor Corporation. CPRI is a trademark of Siemens AG. IBM, ESCON, and FICON are registered trademarks of International Business Machines. All product and company names mentioned in this document may be the trademarks of their respective holders. Page 45 of 46 Cypress Semiconductor Corporation, 2005 The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CYP15G0201DXB CYV15G0201DXB CYW15G0201DXB Document History Page Document Title CYP V W 15G0201DXB Dual-channel HOTLink II Transceiver Document Number 38-02058 ISSUE ORIG. OF ECN NO. DATE CHANGE DESCRIPTION OF CHANGE 116633 07/16/02 SDR New Data Sheet 119705 10/30/02 Changed TXPERx description Changed TXCLKO description Corrected RXCLKB- description in REFCLK clocking mode to be disabled Removed reference to ATM support Removed the LOW setting for FRAMCHAR and related references Changed the IOST boundary values Changed VODIF and VOLC for CML output Changed the tTXCLKR and tTXCLKF min. values Changed tTXDS and tTXDH and tTREFDS and tTREFDH Changed and tREFCDV+ Changed the JTAG ID from 0C80C069 to 1C80C069 Added a section for characterization and Standards compliance Changed I/O type of RXCLKC in I/O coordinates table 122212 12/28/02 RBI Document Control minor change 122547 12/9/2002 CGX Changed Minimum tRISE/tFALL for CML Changed tRXLOCK Changed tDJ, tRJ Changed tJTOL Changed tTXLOCK Changed tRXCLKH, tRXCLKL Changed tTXCLKOD+, tTXCLKOD- Changed Power specs Changed verbiage...Paragraph Clock/Data Recovery Changed verbiage...Paragraph Range Control Added Power-up Requirements 124548 02/13/03 LJN Minor Change Corrected errors and Power-up notes

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CYP15G0201DXB CYV15G0201DXB CYW15G0201DXB

Dual-channel HOTLink II Transceiver
• Second-generation technology
• Compliant to multiple standards

ESCON, DVB-ASI, Fibre Channel and Gigabit Ethernet IEEE802.3z

CPRI compliant

CYW15G0201DXB compliant to OBSAI-RP3

CYV15G0201DXB compliant to SMPTE 259M and SMPTE 292M
8B/10B encoded or 10-bit unencoded data
• Dual channel transceiver operates from 195 to
1500 MBaud serial data rate CYW15G0201DXB operates from 195 to 1540 MBaud
serial data rate

Aggregate throughput of 6 GBits/second
• Selectable parity check/generate
• Selectable dual-channel bonding option

One 16-bit channels
• Skew alignment support for multiple bytes of offset
• Selectable input/output clocking options
• MultiFrame Receive Framer

Bit and Byte alignment

Comma or full K28.5 detect

Single- or multi-byte framer for byte alignment

Low-latency option
• Synchronous LVTTL parallel interface
• Internal phase-locked loops PLLs with no external

PLL components
• Optional Phase-Align Buffer in transmit path
• Optional Elasticity Buffer in receive path
• Dual differential PECL-compatible serial inputs per
channel

Internal DC-restoration
• Dual differential PECL-compatible serial outputs per
channel Source matched for transmission lines

No external bias resistors required

Signaling-rate controlled edge-rates
• Compatible with

Fiber-optic modules

Copper cables

Circuit board traces
• JTAG boundary scan
• Built-In Self-Test BIST for at-speed link testing
• Per-channel Link Quality Indicator

Analog signal detect

Digital signal detect
• Low power 1.8W 3.3V typical
• Single 3.3V supply
• 196-ball BGA
• Pb-Free package option available
• BiCMOS technology

Functional Description

The CYP V 15G0201DXB[1] Dual-channel HOTLink II Transceiver is a point-to-point or point-to-multipoint communications building block allowing the transfer of data over high-speed serial links optical fiber, balanced, and unbalanced copper transmission lines at signaling speeds ranging from 195- to 1500-MBaud per serial link.

The CYV15G0201DXB satisfies the SMPTE 259M and SMPTE 292M compliance as per the EG34-1999 Pathological Test Requirements.

CYP V W 15G0201DXB CYP V W 15G0201DXB

System Host

System Host

Serial Links

Serial Links

Backplane or Cabled

Connections

Figure HOTLink II System Connections Note:

CYV15G0201DXB refers to SMPTE 259M and SMPTE 292M compliant devices. CYW15G0201DXB refers to OBSAI RP3 compliant devices maximum operating data rate is 1540 MBaud . CYP15G0201DXB refers to devices not compliant to SMPTE 259M and SMPTE 292M pathological test requirements and also OBSAI RP3 operating datarate of 1536 MBaud. CYP V W 15G0201DXB refers to all three devices.

Cypress Semiconductor Corporation
• 3901 North First Street
• San Jose, CA 95134
• 408-943-2600

CYP15G0201DXB CYV15G0201DXB CYW15G0201DXB
The following information describes how the tables shall be used for both generating valid Transmission Characters encoding and checking the validity of received Transmission Characters decoding . It also specifies the ordering rules to be followed when transmitting the bits within a character and the characters within any higher-level constructs specified by the standard.

Transmission Order

Within the definition of the 8B/10B Transmission Code, the bit positions of the Transmission Characters are labeled a, b, c, d, e, i, f, g, h, j. Bit “a” is transmitted first followed by bits b, c, d, e, i, f, g, h, and j in that order.

Note that bit i is transmitted between bit e and bit f, rather than in alphabetical order.

Valid and Invalid Transmission Characters

The following tables define the valid Data Characters and valid Special Characters K characters , respectively. The tables are used for both generating valid Transmission Characters encoding and checking the validity of received Transmission Characters decoding . In the tables, each Valid-Data-byte or Special-Character-code entry has two columns that represent two not necessarily different Transmission Characters. The two columns correspond to the current value of the running disparity “Current RD−” or “Current RD+” . Running disparity is a binary parameter with either a negative − or positive + value.

After powering on, the Transmitter may assume either a positive or negative value for its initial running disparity. Upon transmission of any Transmission Character, the transmitter will select the proper version of the Transmission Character based on the current running disparity value, and the Trans-

Page 38 of 46

CYP15G0201DXB CYV15G0201DXB CYW15G0201DXB
mitter calculates a new value for its running disparity based on the contents of the transmitted character. Special Character codes C1.7 and C2.7 can be used to force the transmission of a specific Special Character with a specific running disparity as required for some special sequences in X3.230.

After powering on, the Receiver may assume either a positive or negative value for its initial running disparity. Upon reception of any Transmission Character, the Receiver decides whether the Transmission Character is valid or invalid according to the following rules and tables and calculates a new value for its Running Disparity based on the contents of the received character.

The following rules for running disparity are used to calculate the new running-disparity value for Transmission Characters that have been transmitted and that have been received.

Running disparity for a Transmission Character is calculated from sub-blocks, where the first six bits abcdei form one sub-block and the second four bits fghj form the other sub-block. Running disparity at the beginning of the 6-bit sub-block is the running disparity at the end of the previous Transmission Character. Running disparity at the beginning of the 4-bit sub-block is the running disparity at the end of the 6-bit sub-block. Running disparity at the end of the Transmission Character is the running disparity at the end of the 4-bit sub-block.

Running disparity for the sub-blocks is calculated as follows:

Running disparity at the end of any sub-block is positive if the sub-block contains more ones than zeros. It is also positive at the end of the 6-bit sub-block if the 6-bit sub-block is 000111, and it is positive at the end of the 4-bit sub-block if the 4-bit sub-block is

Running disparity at the end of any sub-block is negative if the sub-block contains more zeros than ones. It is also negative at the end of the 6-bit sub-block if the 6-bit sub-block is 111000, and it is negative at the end of the 4-bit sub-block if the 4-bit sub-block is

Otherwise, running disparity at the end of the sub-block is the same as at the beginning of the sub-block

Use of the Tables for Generating Transmission Characters

The appropriate entry in Table 24 for the Valid Data byte or Table 25 for the Special Character byte for which Transmission Character is to be generated encoded . The current value of the Transmitter’s running disparity is used to select the Transmission Character from its corresponding column. For each Transmission Character transmitted, a new value of the running disparity is calculated. This new value shall be used as the Transmitter’s current running disparity for the next Valid

Data byte or Special Character byte to be encoded and transmitted. Table 22 shows naming notations and examples of valid transmission characters.

Use of the Tables for Checking the Validity of Received Transmission Characters

The column corresponding to the current value of the Receiver’s running disparity is searched for the received Transmission Character. If the received Transmission Character is found in the proper column, then the Transmission Character is valid and the associated Data byte or Special Character code is determined decoded . If the received Transmission Character is not found in that column, then the Transmission Character is invalid. This is called a code violation. Independent of the Transmission Character’s validity, the received Transmission Character is used to calculate a new value of running disparity. The new value is used as the Receiver’s current running disparity for the next received Transmission Character.

Table Valid Transmission Characters

Byte Name D0.0

Data DIN or QOUT 765 43210 000

Hex Value 00

D1.0
000 00001

D2.0
000 00010

D5.2
010 000101

D30.7
111 11110

D31.7

Detection of a code violation does not necessarily show that the Transmission Character in which the code violation was detected is in error. Code violations may result from a prior error that altered the running disparity of the bit stream which did not result in a detectable error at the Transmission Character in which the error occurred. Table 23 shows an example of this behavior.

Table Code Violations Resulting from Prior Errors

Character

Character

Character

Transmitted data character
Ordering Information

Speed Standard OBSAI Standard OBSAI
Ordering Code CYP15G0201DXB-BBC CYP15G0201DXB-BBI CYV15G0201DXB-BBC CYV15G0201DXB-BBI CYW15G0201DXB-BBC CYW15G0201DXB-BBI CYP15G0201DXB-BBXC CYP15G0201DXB-BBXI CYV15G0201DXB-BBXC CYV15G0201DXB-BBXI CYW15G0201DXB-BBXC CYW15G0201DXB-BBXI

Package Name BB196A

Package Type 196-ball Grid Array 196-ball Grid Array 196-ball Grid Array 196-ball Grid Array 196-ball Grid Array 196-ball Grid Array Pb-Free 196-ball Grid Array Pb-Free 196-ball Grid Array Pb-Free 196-ball Grid Array Pb-Free 196-ball Grid Array Pb-Free 196-ball Grid Array Pb-Free 196-ball Grid Array

Package Diagram
196-ball FBGA 15 x 15 x mm BB196A

Operating Range Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial
51-85156-*A

HOTLink is a registered trademark, and HOTLink II and MultiFrame are trademarks, of Cypress Semiconductor Corporation. CPRI is a trademark of Siemens AG. IBM, ESCON, and FICON are registered trademarks of International Business Machines. All product and company names mentioned in this document may be the trademarks of their respective holders.

Page 45 of 46

Cypress Semiconductor Corporation, 2005 The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

CYP15G0201DXB CYV15G0201DXB CYW15G0201DXB

Document History Page

Document Title CYP V W 15G0201DXB Dual-channel HOTLink II Transceiver Document Number 38-02058

ISSUE ORIG. OF ECN NO. DATE CHANGE

DESCRIPTION OF CHANGE
116633 07/16/02

SDR New Data Sheet
119705 10/30/02

Changed TXPERx description

Changed TXCLKO description

Corrected RXCLKB- description in REFCLK clocking mode to be disabled

Removed reference to ATM support

Removed the LOW setting for FRAMCHAR and related references

Changed the IOST boundary values Changed VODIF and VOLC for CML output Changed the tTXCLKR and tTXCLKF min. values Changed tTXDS and tTXDH and tTREFDS and tTREFDH Changed and tREFCDV+ Changed the JTAG ID from 0C80C069 to 1C80C069

Added a section for characterization and Standards compliance

Changed I/O type of RXCLKC in I/O coordinates table
122212 12/28/02

RBI Document Control minor change
122547 12/9/2002 CGX Changed Minimum tRISE/tFALL for CML

Changed tRXLOCK

Changed tDJ, tRJ

Changed tJTOL

Changed tTXLOCK

Changed tRXCLKH, tRXCLKL

Changed tTXCLKOD+, tTXCLKOD-

Changed Power specs

Changed verbiage...Paragraph Clock/Data Recovery

Changed verbiage...Paragraph Range Control

Added Power-up Requirements
124548 02/13/03

LJN Minor Change Corrected errors and Power-up notes

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CYW15G0201DXB-BBI Datasheet file may be downloaded here without warranties.

Datasheet ID: CYW15G0201DXB-BBI 508212