CYK256K16SCCB
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CYK256K16SCBU-70BVXI (pdf) |
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CYK256K16SCCB 4-Mbit 256K x 16 Pseudo Static RAM • Advanced low-power architecture • High speed 55 ns, 60 ns and 70 ns • Wide voltage range 2.7V to 3.3V • Typical active current 1 mA f = 1 MHz • Low standby power • Automatic power-down when deselected Functional Description[1] The CYK256K16SCCB is a high-performance CMOS pseudo static RAM PSRAM organized as 256K words by 16 bits that supports an asynchronous memory interface. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life MoBL in portable applications such as cellular telephones. The device can be put into standby mode reducing power consumption dramatically when deselected CE1 LOW, CE2 HIGH or both BHE and BLE are HIGH . The input/output pins I/O0 through I/O15 are placed in a high-impedance state when deselected CE1 HIGH, CE2 LOW, OE is deasserted HIGH , or during a write operation Chip Enabled and Write Enable WE LOW . Reading from the device is accomplished by asserting the Chip Enables CE1 LOW and CE2 HIGH and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins A0 through A17 will appear on I/O0 to I/O7. If Byte High Enable BHE is LOW, then data from memory will appear on I/O8 to I/O15. See the Truth Table for a complete description of read and write modes. ROW DECODER A11 A12 A13 A14 A15 A16 A17 SENSE AMPS Logic Block Diagram A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 DATA IN DRIVERS 256K x 16 RAM Array COLUMN DECODER Power -Down Circuit BHE BLE BHE WE OE BLE CE2 CE1 CE2 CE1 Note For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback Pin Configuration[3, 4, 5] CYK256K16SCCB 48-ball VFBGA Top View BLE OE A0 A1 A2 CE2 I/O8 BHE A3 A4 CE1 I/O0 I/O9 I/O10 A5 A6 I/O1 I/O2 VSS I/O11 A17 A7 I/O3 VCC VCC I/O12 DNU A16 I/O4 VSS I/O14 I/O13 A14 A15 I/O5 I/O6 I/O15 NC A12 A13 WE I/O7 NC A8 A9 A10 A11 NC Product Portfolio Product CYK256K16SCCB VCC Range V Min. Typ. Max. Speed ns Ordering Information Speed ns 55 60 70 Ordering Code CYK256K16SCCBU-55BVI CYK256K16SCBU-55BVXI CYK256K16SCCBU-60BVI CYK256K16SCCBU-70BVI CYK256K16SCBU-70BVXI Package Diagram Package Type Operating Range 51-85150 48-ball Very Fine Pitch BGA x mm Industrial 48-ball Very Fine Pitch BGA x mm Pb-Free 51-85150 48-ball Very Fine Pitch BGA x mm Industrial 51-85150 48-ball Very Fine Pitch BGA x mm Industrial 48-ball Very Fine Pitch BGA x mm Pb-Free Package Diagram TOP VIEW 48-ball VFBGA 6 x 8 x 1 mm 51-85150 A1 CORNER 12 3 4 5 6 BOTTOM VIEW A1 CORNER M C M C A B Ø0.30±0.05 48X 6 54 3 2 1 B 0.15 4X C MAX. SEATING PLANE C 51-85150-*D MAX. MoBL is a registered trademark, and MoBL3 and More Battery Life are trademarks, of Cypress Semiconductor Corporation. All product and company names mentioned in this document are the trademarks of their respective holders. Page 9 of 10 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. [+] Feedback CYK256K16SCCB Document History Page Document Title CYK256K16SCCB 4-Mbit 256K x 16 Pseudo Static RAM Document Number 38-05526 Orig. of ECN NO. Issue Date Change Description of Change 215621 See ECN REF New data sheet 218183 See ECN REF Changed ball E3 on package pinout from DNU to NC 230855 See ECN AJU Changed from Advance Information to Preliminary Modified MAX limit on DC Input voltage in ‘Maximum Ratings’ section Changed ordering code from CYK256K16SCCB to CYK256K16SCCBU in ‘Ordering Information’ section 234474 See ECN SYT Changed ball E3 on package pinout from NC to DNU. 260330 See ECN PCI Changed from Preliminary to Final 298651 See ECN PCI Added 60-ns speed bin 314013 See ECN RKF Added Pb-Free parts to the Ordering information 522566 See ECN NXR Changed VIL Max spec from V to V in DC Electrical Characteristics table 562386 See ECN NXR Changed VIL Max spec from V to V in DC Electrical Characteristics table Page 10 of 10 [+] Feedback |
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