CY8CLED16P01-48LFXI

CY8CLED16P01-48LFXI Datasheet

CY8CLED16P01

Part	Datasheet
CY8CLED16P01-48LFXI	CY8CLED16P01-48LFXI (pdf)

Related Parts	Information
CY8CLED16P01-48LTXIT	CY8CLED16P01-48LTXIT
CY8CLED16P01-28PVXIT	CY8CLED16P01-28PVXIT
CY8CLED16P01-28PVXI	CY8CLED16P01-28PVXI
CY8CLED16P01-48LTXI	CY8CLED16P01-48LTXI

PDF Datasheet Preview
CY8CLED16P01 Powerline Communication Solution • Powerline Communication Solution Integrated Powerline Modem PHY Frequency Shift Keying Modulation Configurable baud rates up to 2400 bps Powerline Optimized Network Protocol Integrates Data Link, Transport, and Network Layers Supports Bidirectional Half Duplex Communication 8-bit CRC Error Detection to Minimize Data Loss I2C enabled Powerline Application Layer Supports I2C Frequencies of 50, 100, and 400 kHz Reference Designs for 110V/240V AC and 12V/24V AC/DC Powerlines Reference Designs comply with CENELEC EN 50065-1:2001 and FCC Part 15 • HB LED Controller Configurable Dimmers Support up to 16 Independent LED Channels 8 to 32 Bits of Resolution per Channel PrISM Modulation technology to reduce radiated EMI and Low Frequency Blinking Additional communication interfaces for lighting control such as DALI, DMX512 etc. • Powerful Harvard Architecture Processor M8C Processor Speeds to 24 MHz Two 8x8 Multiply, 32-Bit Accumulate • Programmable System Resources Blocks 12 Rail-to-Rail Analog PSoC Blocks provide • Up to 14-Bit ADCs • Up to 9-Bit DACs • Programmable Gain Amplifiers • Programmable Filters and Comparators 16 Digital PSoC Blocks provide • 8 to 32-Bit Timers, Counters, and PWMs • CRC and PRS Modules • Up to Four Full Duplex UARTs • Multiple SPITM Masters or Slaves • Connectable to all GPIO Pins Complex Peripherals by Combining Blocks • Flexible On-Chip Memory 32 KB Flash Program Storage 50,000 Erase or Write Cycles 2 KB SRAM Data Storage EEPROM Emulation in Flash • Programmable Pin Configurations 25 mA Sink, 10 mA Source on all GPIO Pull Up, Pull Down, High Z, Strong, or Open Drain Drive Modes on all GPIO Up to 12 Analog Inputs on GPIO Configurable Interrupt on all GPIO • Additional System Resources I2C Slave, Master, and Multi-Master to 400 kHz Watchdog and Sleep Timers User-Configurable Low Voltage Detection Logic Block Diagram Powerline Communication Solution CY8CLED16P01 Powerline Network Protocol Physical Layer FSK Modem PLC Core Embedded Application Programmable System Resources Digital and Analog Peripherals Additional System Resources MAC, Decimator, I2C, SPI, UART etc. PSoC Core Modulation Technology PrISM, PWM etc. Additional Communication Interface DALI, DMX512 HB LED Controller Powerline Transceiver Packet AC/DC Powerline Coupling Circuit 110V/240V AC, 12V/24V AC/DC etc. Powerline • San Jose, CA 95134-1709 • 408-943-2600 For up to date ordering, packaging, and electrical specification information, see the latest PLC device data sheets on the web at Application Notes Application notes are an excellent introduction to the wide variety of possible PLC designs. They are located here Select Application Notes under the Support tab. Development Kits PLC Development Kits are available online from Cypress at and through a growing number of regional and global distributors, which include Arrow, Avnet, Digi-Key, Farnell, Future Electronics, and Newark. Training Free PLC technical training on demand, webinars, and workshops is available online at The training covers a wide variety of topics and skill levels to assist you in your designs. CYPros Consultants Certified PSoC Consultants offer everything from technical assistance to completed PSoC designs. To contact or become a PSoC Consultant go to Solutions Library Visit our growing library of solution focused designs at Here you can find various application designs that include firmware and hardware design files that enable you to complete your designs quickly. Technical Support For assistance with technical issues, search KnowledgeBase articles and forums at If you cannot find an answer to your question, call technical support at Page 13 of 46 [+] Feedback CY8CLED16P01 Development Tools PSoC Designer is a Windows-based, integrated development environment for the Programmable System-on-Chip PSoC devices. The PSoC Designer IDE runs on Windows XP or Windows Vista. This system provides design database management by project, an integrated debugger with In-Circuit Emulator, in-system programming support, and built in support for third party assemblers and C compilers. PSoC Designer also supports C language compilers developed specifically for the devices in the PSoC family. PSoC Designer Software Subsystems System-Level View A drag-and-drop visual embedded system design environment based on PSoC Express. In the system level view you create a model of your system inputs, outputs, and communication interfaces. You define when and how an output device changes state based upon any or all other system devices. Based upon the design, PSoC Designer automatically selects one or more PSoC Programmable System-on-Chip Controllers that match your system requirements. PSoC Designer generates all embedded code, then compiles and links it into a programming file for a specific PSoC device. Chip-Level View The chip-level view is a more traditional integrated development environment IDE based on PSoC Designer Choose a base device to work with and then select different onboard analog and digital components called user modules that use the PSoC blocks. Examples of user modules are ADCs, DACs, Amplifiers, and Filters. Configure the user modules for your chosen application and connect them to each other and to the proper pins. Then generate your project. This prepopulates your project with APIs and libraries that you can use to program your application. The device editor also supports easy development of multiple configurations and dynamic reconfiguration. Dynamic configuration allows for changing configurations at run time. Hybrid Designs You can begin in the system-level view, allow it to choose and configure your user modules, routing, and generate code, then switch to the chip-level view to gain complete control over on-chip resources. All views of the project share a common code editor, builder, and common debug, emulation, and programming tools. Code Generation Tools PSoC Designer supports multiple third party C compilers and assemblers. The code generation tools work seamlessly within the PSoC Designer interface and have been tested with a full range of debugging tools. The choice is yours. Assemblers. The assemblers allow assembly code to merge seamlessly with C code. Link libraries automatically use absolute addressing or are compiled in relative mode, and linked with other software modules to get absolute addressing. C Language Compilers. C language compilers are available that support the PSoC family of devices. The products allow you to create complete C programs for the PSoC family devices. The optimizing C compilers provide all the features of C tailored to the PSoC architecture. They come complete with embedded libraries providing port and bus operations, standard keypad and display support, and extended math functionality. Debugger The PSoC Designer Debugger subsystem provides hardware in-circuit emulation, allowing you to test the program in a physical system while providing an internal view of the PSoC device. Debugger commands allow the designer to read and program and read and write data memory, read and write IO registers, read and write CPU registers, set and clear breakpoints, and provide program run, halt, and step control. The debugger also allows the designer to create a trace buffer of registers and memory locations of interest. Online Help System The online help system displays online, context-sensitive help for the user. Designed for procedural and quick reference, each functional subsystem has its own context-sensitive help. This system also provides tutorials and links to FAQs and an Online Support Forum to aid the designer in getting started. In-Circuit Emulator ICE A low cost, high functionality In-Circuit Emulator ICE is available for development support. This hardware has the capability to program single devices. The emulator consists of a base unit that connects to the PC by way of a USB port. The base unit is universal and operates with all PSoC devices. Emulation pods for each device family are available separately. The emulation pod takes the place of the PSoC device in the target board and performs full speed 24 MHz operation. Ordering Information The following table lists the CY8CLED16P01 PLC device family key package features and ordering codes. Table CY8CLED16P01 PLC Device Key Features and Ordering Information Package Ordering Code Flash Bytes RAM Bytes Temperature Range Digital PSoC Blocks Analog PSoC Blocks Digital IO Pins Analog Inputs Analog Outputs XRES Pin 28-Pin 210 Mil SSOP CY8CLED16P01-28PVXI 28-Pin 210 Mil SSOP CY8CLED16P01-28PVXIT Tape and Reel 48-Pin QFN CY8CLED16P01-48LFXI 48-Pin QFN Sawn CY8CLED16P01-48LTXI 48-Pin QFN Sawn Tape CY8CLED16P01-48LTXIT and Reel 100-Pin OCD TQFP[14] CY8CLED16P01-OCD 32K 2K -40°C to +85°C 16 32K 2K -40°C to +85°C 16 32K 2K -40°C to +85°C 16 32K 2K -40°C to +85°C 16 32K 2K -40°C to +85°C 16 32K 2K -40°C to +85°C 16 Ordering Code Definitions CY 8 C LED 16 P01- PC xxx Package Type PVX = SSOP Pb-Free LFX/LTX = QFN Pb-Free 24 12 4 Yes 24 12 4 Yes 44 12 4 Yes 44 12 4 Yes 44 12 4 Yes 64 12 4 Yes Pin Count 28/48 Powerline Communication capability with Programmability Family Code HB LED Controllers with 16 channels Technology Code C = CMOS Marketing Code 8 = Cypress PSoC Company ID CY = Cypress Note This part may be used for in-circuit debugging. It is not available for production. Page 44 of 46 [+] Feedback CY8CLED16P01 Document History Page Document Title CY8CLED16P01 Powerline Communication Solution Document Number 001-49263 Orig. of Submission Change Description of Change ** 2575716 GHH/PYRS 10/01/08 New Datasheet A 2731927 GHH/HMT/ 07/06/09 Added - Configurable baud rates and FSK Frequencies - PLC Pod Kits for development purposes Modified - Pin information for all packages B 2748537 See ECN Added Sections on ‘Getting Started’ and ‘Document Conventions’ Modified the following Electrical Parameters - FIMO6 Min Changed from MHz to MHz - FIMO6 Max Changed from MHz to MHz - SPIS Maximum input clock frequency Changed from ns to MHz - TWRITE Flash Block Write Time Changed from 40 ms to 10 ms C 2752799 08/17/09 Posting to external web. D 2759000 09/02/2009 Fixed typos in the data sheet. Updated Figure on page 2 and Figure on page *E 2778970 10/05/2009 Added a table for DC POR and LVD Specifications Updated DC GPIO, AC Chip-Level, and AC Programming Specifications as follows - Modified FIMO6, TWRITE, and Power Up IMO to Switch specifications - Added IOH, IOL, DCILO, F32K_U, TPOWERUP, TERASEALL, and SRPOWER_UP specifications Added 48-Pin QFN Sawn package diagram and CY8CLED16P01-48LTXI and CY8CLED16P01-48LTXIT part details in the Ordering Information table Updated section 5 and Tables 10-1, 10-2, and 10-3 to state the requirement to use the external crystal for PLC protocol timing Table 10-1 and Figure 10-1 Changed pins 9 and 25 from NC to RSVD Table 10-2 and Figure 10-2 Changed pins 7 and 39 from NC to RSVD Table 10-3 and Figure 10-3 Changed pins 14 and 77 from NC to RSVD Tables 10-1, 10-2, 10-3 Added explanation to Connect a uF capacitor between XTAL_Stability and VSS. Fixed minor typos Page 45 of 46 [+] Feedback CY8CLED16P01 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Page 46 of 46 and are registered trademarks and PSoC Designer and EZ-Color are trademarks of Cypress Semiconductor Corp. All products and company names mentioned in this document may be the trademarks of their respective holders. [+] Feedback

PDF Datasheet Preview

CY8CLED16P01

Powerline Communication Solution
• Powerline Communication Solution

Integrated Powerline Modem PHY Frequency Shift Keying Modulation Configurable baud rates up to 2400 bps Powerline Optimized Network Protocol Integrates Data Link, Transport, and Network Layers Supports Bidirectional Half Duplex Communication 8-bit CRC Error Detection to Minimize Data Loss I2C enabled Powerline Application Layer Supports I2C Frequencies of 50, 100, and 400 kHz Reference Designs for 110V/240V AC and 12V/24V AC/DC

Powerlines Reference Designs comply with CENELEC EN
50065-1:2001 and FCC Part 15
• HB LED Controller

Configurable Dimmers Support up to 16 Independent LED Channels
8 to 32 Bits of Resolution per Channel PrISM Modulation technology to reduce radiated EMI and

Low Frequency Blinking Additional communication interfaces for lighting control such
as DALI, DMX512 etc.
• Powerful Harvard Architecture Processor

M8C Processor Speeds to 24 MHz Two 8x8 Multiply, 32-Bit Accumulate
• Programmable System Resources Blocks
12 Rail-to-Rail Analog PSoC Blocks provide
• Up to 14-Bit ADCs
• Up to 9-Bit DACs
• Programmable Gain Amplifiers
• Programmable Filters and Comparators
16 Digital PSoC Blocks provide
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Up to Four Full Duplex UARTs
• Multiple SPITM Masters or Slaves
• Connectable to all GPIO Pins

Complex Peripherals by Combining Blocks
• Flexible On-Chip Memory
32 KB Flash Program Storage 50,000 Erase or Write Cycles 2 KB SRAM Data Storage EEPROM Emulation in Flash
• Programmable Pin Configurations 25 mA Sink, 10 mA Source on all GPIO Pull Up, Pull Down, High Z, Strong, or Open Drain Drive

Modes on all GPIO Up to 12 Analog Inputs on GPIO Configurable Interrupt on all GPIO
• Additional System Resources I2C Slave, Master, and Multi-Master to 400 kHz Watchdog and Sleep Timers User-Configurable Low Voltage Detection

Logic Block Diagram

Powerline Communication Solution

CY8CLED16P01

Powerline Network Protocol

Physical Layer FSK Modem

PLC Core

Embedded Application

Programmable System Resources

Digital and Analog Peripherals

Additional System Resources

MAC, Decimator, I2C, SPI, UART etc.

PSoC Core

Modulation Technology

PrISM, PWM etc.

Additional Communication

Interface

DALI, DMX512

HB LED Controller

Powerline Transceiver Packet

AC/DC Powerline Coupling Circuit 110V/240V AC, 12V/24V AC/DC etc.

Powerline
• San Jose, CA 95134-1709
• 408-943-2600
For up to date ordering, packaging, and electrical specification information, see the latest PLC device data sheets on the web at

Application Notes

Application notes are an excellent introduction to the wide variety of possible PLC designs. They are located here Select Application Notes under the Support tab.

Development Kits

PLC Development Kits are available online from Cypress at and through a growing number of regional and global distributors, which include Arrow, Avnet, Digi-Key, Farnell, Future Electronics, and Newark.

Training

Free PLC technical training on demand, webinars, and workshops is available online at The training covers a wide variety of topics and skill levels to assist you in your designs.

CYPros Consultants

Certified PSoC Consultants offer everything from technical assistance to completed PSoC designs. To contact or become a PSoC Consultant go to

Solutions Library

Visit our growing library of solution focused designs at Here you can find various application designs that include firmware and hardware design files that enable you to complete your designs quickly.

Technical Support

For assistance with technical issues, search KnowledgeBase articles and forums at If you cannot find an answer to your question, call technical support at

Page 13 of 46
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CY8CLED16P01

Development Tools

PSoC Designer is a Windows-based, integrated development environment for the Programmable System-on-Chip PSoC devices. The PSoC Designer IDE runs on Windows XP or Windows Vista.

This system provides design database management by project, an integrated debugger with In-Circuit Emulator, in-system programming support, and built in support for third party assemblers and C compilers.

PSoC Designer also supports C language compilers developed specifically for the devices in the PSoC family.

PSoC Designer Software Subsystems

System-Level View

A drag-and-drop visual embedded system design environment based on PSoC Express. In the system level view you create a model of your system inputs, outputs, and communication interfaces. You define when and how an output device changes state based upon any or all other system devices. Based upon the design, PSoC Designer automatically selects one or more PSoC Programmable System-on-Chip Controllers that match your system requirements.

PSoC Designer generates all embedded code, then compiles and links it into a programming file for a specific PSoC device.

Chip-Level View

The chip-level view is a more traditional integrated development environment IDE based on PSoC Designer Choose a base device to work with and then select different onboard analog and digital components called user modules that use the PSoC blocks. Examples of user modules are ADCs, DACs, Amplifiers, and Filters. Configure the user modules for your chosen application and connect them to each other and to the proper pins. Then generate your project. This prepopulates your project with APIs and libraries that you can use to program your application.

The device editor also supports easy development of multiple configurations and dynamic reconfiguration. Dynamic configuration allows for changing configurations at run time.

Hybrid Designs

You can begin in the system-level view, allow it to choose and configure your user modules, routing, and generate code, then switch to the chip-level view to gain complete control over on-chip resources. All views of the project share a common code editor, builder, and common debug, emulation, and programming tools.

Code Generation Tools

PSoC Designer supports multiple third party C compilers and assemblers. The code generation tools work seamlessly within the PSoC Designer interface and have been tested with a full range of debugging tools. The choice is yours.

Assemblers. The assemblers allow assembly code to merge seamlessly with C code. Link libraries automatically use absolute addressing or are compiled in relative mode, and linked with other software modules to get absolute addressing.

C Language Compilers. C language compilers are available that support the PSoC family of devices. The products allow you to create complete C programs for the PSoC family devices.

The optimizing C compilers provide all the features of C tailored to the PSoC architecture. They come complete with embedded libraries providing port and bus operations, standard keypad and display support, and extended math functionality.

Debugger

The PSoC Designer Debugger subsystem provides hardware in-circuit emulation, allowing you to test the program in a physical system while providing an internal view of the PSoC device. Debugger commands allow the designer to read and program and read and write data memory, read and write IO registers, read and write CPU registers, set and clear breakpoints, and provide program run, halt, and step control. The debugger also allows the designer to create a trace buffer of registers and memory locations of interest.

Online Help System

The online help system displays online, context-sensitive help for the user. Designed for procedural and quick reference, each functional subsystem has its own context-sensitive help. This system also provides tutorials and links to FAQs and an Online Support Forum to aid the designer in getting started.

In-Circuit Emulator ICE

A low cost, high functionality In-Circuit Emulator ICE is available for development support. This hardware has the capability to program single devices.

The emulator consists of a base unit that connects to the PC by way of a USB port. The base unit is universal and operates with all PSoC devices. Emulation pods for each device family are available separately. The emulation pod takes the place of the PSoC device in the target board and performs full speed 24 MHz operation.
Ordering Information
The following table lists the CY8CLED16P01 PLC device family key package features and ordering codes. Table CY8CLED16P01 PLC Device Key Features and Ordering Information
Package Ordering

Code Flash Bytes RAM Bytes Temperature Range Digital PSoC Blocks Analog PSoC Blocks Digital IO Pins Analog Inputs Analog Outputs XRES Pin
28-Pin 210 Mil SSOP CY8CLED16P01-28PVXI
28-Pin 210 Mil SSOP CY8CLED16P01-28PVXIT Tape and Reel
48-Pin QFN

CY8CLED16P01-48LFXI
48-Pin QFN Sawn

CY8CLED16P01-48LTXI
48-Pin QFN Sawn Tape CY8CLED16P01-48LTXIT and Reel
100-Pin OCD TQFP[14] CY8CLED16P01-OCD
32K 2K -40°C to +85°C 16 32K 2K -40°C to +85°C 16
32K 2K -40°C to +85°C 16 32K 2K -40°C to +85°C 16 32K 2K -40°C to +85°C 16
32K 2K -40°C to +85°C 16
Ordering Code Definitions

CY 8 C LED 16 P01- PC xxx

Package Type PVX = SSOP Pb-Free LFX/LTX = QFN Pb-Free
24 12 4 Yes
24 12 4 Yes
44 12 4 Yes
44 12 4 Yes
44 12 4 Yes
64 12 4 Yes

Pin Count 28/48 Powerline Communication capability with Programmability Family Code HB LED Controllers with 16 channels Technology Code C = CMOS Marketing Code 8 = Cypress PSoC Company ID CY = Cypress

Note This part may be used for in-circuit debugging. It is not available for production.

Page 44 of 46
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CY8CLED16P01

Document History Page

Document Title CY8CLED16P01 Powerline Communication Solution Document Number 001-49263

Orig. of Submission

Change

Description of Change
** 2575716 GHH/PYRS 10/01/08 New Datasheet
*A 2731927 GHH/HMT/ 07/06/09 Added
- Configurable baud rates and FSK Frequencies
- PLC Pod Kits for development purposes

Modified
- Pin information for all packages
*B 2748537

See ECN

Added Sections on ‘Getting Started’ and ‘Document Conventions’ Modified the following Electrical Parameters - FIMO6 Min Changed from MHz to MHz - FIMO6 Max Changed from MHz to MHz - SPIS Maximum input clock frequency Changed from ns to MHz - TWRITE Flash Block Write Time Changed from 40 ms to 10 ms
*C 2752799
08/17/09 Posting to external web.
*D 2759000
09/02/2009 Fixed typos in the data sheet. Updated Figure on page 2 and Figure on page
*E 2778970
10/05/2009
Added a table for DC POR and LVD Specifications Updated DC GPIO, AC Chip-Level, and AC Programming Specifications as follows - Modified FIMO6, TWRITE, and Power Up IMO to Switch specifications - Added IOH, IOL, DCILO, F32K_U, TPOWERUP, TERASEALL, and SRPOWER_UP specifications Added 48-Pin QFN Sawn package diagram and CY8CLED16P01-48LTXI and CY8CLED16P01-48LTXIT part details in the Ordering Information table Updated section 5 and Tables 10-1, 10-2, and 10-3 to state the requirement to use the external crystal for PLC protocol timing Table 10-1 and Figure 10-1 Changed pins 9 and 25 from NC to RSVD Table 10-2 and Figure 10-2 Changed pins 7 and 39 from NC to RSVD Table 10-3 and Figure 10-3 Changed pins 14 and 77 from NC to RSVD Tables 10-1, 10-2, 10-3 Added explanation to Connect a uF capacitor between XTAL_Stability and VSS. Fixed minor typos

Page 45 of 46
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CY8CLED16P01

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Page 46 of 46
and are registered trademarks and PSoC Designer and EZ-Color are trademarks of Cypress Semiconductor Corp. All products and company names mentioned in this document may be the trademarks of their respective holders.
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More datasheets: FQP5P10 | SEGP510-2SFP-T | 3ADL-201 | 3368 | ADRV9375-W/PCBZ | EG1260CSQ | M4451 SL005 | M4451 SL001 | M4451 SL002 | PCR_740

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY8CLED16P01-48LFXI Datasheet file may be downloaded here without warranties.

Datasheet ID: CY8CLED16P01-48LFXI 508185