CY8C26233-24PVIT

CY8C26233-24PVIT Datasheet

Not Recommended for New Designs Use CY8C27xxx

Part	Datasheet
CY8C26233-24PVIT	CY8C26233-24PVIT (pdf)

Related Parts	Information
CY8C26643-24PVXI	CY8C26643-24PVXI
CY8C26233-24PXI	CY8C26233-24PXI
CY8C26443-24PVXI	CY8C26443-24PVXI
CY8C26643-24AXI	CY8C26643-24AXI
CY8C25122-24PXI	CY8C25122-24PXI
CY8C26443-24PXI	CY8C26443-24PXI
CY8C26233-24PVXI	CY8C26233-24PVXI
CY8C26443-24SXI	CY8C26443-24SXI
CY8C26233-24SXI	CY8C26233-24SXI
CY8C26643-24AIT	CY8C26643-24AIT
CY8C26233-24SIT	CY8C26233-24SIT
CY8C26443-24SIT	CY8C26443-24SIT
CY8C26643-24PVIT	CY8C26643-24PVIT
CY8C26443-24PVIT	CY8C26443-24PVIT
CY8C26443-24PI	CY8C26443-24PI
CY8C26233-24PI	CY8C26233-24PI
CY8C26233-24PVI	CY8C26233-24PVI
CY8C25122-24PI	CY8C25122-24PI
CY8C26233-24SI	CY8C26233-24SI
CY8C26443-24PVI	CY8C26443-24PVI
CY8C26443-24SI	CY8C26443-24SI
CY8C26643-24AI	CY8C26643-24AI
CY8C26643-24PVI	CY8C26643-24PVI

PDF Datasheet Preview
Not Recommended for New Designs Use CY8C27xxx Configurable Mixed-Signal Array with On-board Controller Programmable System-on-Chip PSoC May 17, 2005 CY8C25122/CY8C26233/CY8C26443/CY8C26643 Device Family Data Sheet Getting Started in the PSoC World! The award winning PSoC Designer software and PSoC silicon are an integrated unit. The quickest path to understanding the PSoC silicon is through the PSoC Designer software GUI. This data sheet is useful for understanding the details of the PSOC integrated circuit, but is not a good starting point for a new PSoC developer seeking to get a general overview of this new technology. PSoC developers are NOT required to build their own ADCs, DACs, and other peripherals. Embedded in the PSoC Designer software are the individual data sheets, performance graphs, and PSoC User Modules graphically selected code packets for the peripherals, such as the incremental ADCs, DACs, LCD controllers, op amps, low-pass filters, etc. With simple GUI-based selection, placement, and connection, the basic architecture of a design may be developed within PSoC Designer software without ever writing a single line of code. Development Kits are available from the following distributors Digi-Key, Avnet, Arrow, and Future. The Cypress Online Store also contains development kits, C compilers, and all accessories for PSoC development. Go to the Cypress Online Store web site at click the Online Store shopping cart icon at the bottom of the web page, and click PSoC Programmable System-on-Chip to view a current list of available items. Free PSoC technical training is available for beginners and is taught by a marketing or application engineer over the phone. PSoC training classes cover designing, debugging, advanced analog, as well as application-specific classes covering topics such as PSoC and the LIN bus. Go to click on Design Support located on the left side of the web page, and select Technical Training for more details. Certified PSoC Consultants offer everything from technical assistance to completed PSoC designs. To contact or become a PSoC Consultant go to click on Design Support located on the left side of the web page, and select CYPros Consultants. PSoC application engineers take pride in fast and accurate response. They can be reached with a 4-hour guaranteed response at Cypress Semiconductor 2700 162nd Street SW, Building D Lynnwood, WA 98037 Phone: Fax Application Support Hotline: Cypress Semiconductor Corporation. All rights reserved. PSoC , PSoC Designer , and Programmable System-on-Chip are PSoCrelated trademarks of Cypress Semiconductor Corporation. All other trademarks or registered trademarks referenced herein are property of the respective corporations. The information contained herein is subject to change without notice. Cypress Semiconductor assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. Cypress Semiconductor products are not warranted nor intended to be used for medical, life-support, life-saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress Semiconductor. Note the following details of the Flash code protection features on Cypress Semiconductor PSoC devices. Cypress Semiconductor products meet the specifications contained in their particular Cypress Semiconductor Data Sheets. Cypress Semiconductor believes that its family of products is one of the most secure families of its kind on the market today, regardless of how they are used. There may be methods, unknown to Cypress Semiconductor, that can breach the code protection features. Any of these methods, to our knowledge, would be dishonest and possibly illegal. Neither Cypress Semiconductor nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Cypress Semiconductor is willing to work with the customer who is concerned about the integrity of their code. Code protection is constantly evolving. We at Cypress Semiconductor are committed to continuously improving the code protection features of our products. May 17, 2005 The PSoC CY8C25122/CY8C26233/CY8C26443/CY8C26643 family of programmable sys- Not Recommended for New Designs Use CY8C27xxx tem-on-chip devices replace multiple MCU-based system components with one single-chip, con- figurable device. A PSoC device includes configurable analog and digital peripheral blocks, a fast CPU, Flash program memory, and SRAM data memory in a range of convenient pin-outs and memory sizes. The driving force behind this innovative programmable system-on-chip comes from user configurability of the analog and digital arrays the PSoC blocks. Programmable System-on-Chip PSoC Blocks Partial Flash updates On-chip, user configurable analog and digital peripheral blocks PSoC blocks can be used individually or in combina- tion 12 Analog PSoC blocks provide Up to 11-bit Delta-Sigma ADC Up to 8-bit Successive Approximation ADC Up to 12-bit Incremental ADC Up to 9-bit DAC Programmable gain amplifier Programmable filters Differential comparators 8 Digital PSoC blocks provide Multipurpose timers event timing, real-time clock, pulse width modulation PWM and PWM with deadband CRC modules Full-duplex UARTs SPI master or slave configuration Flexible clocking sources for analog PSoC blocks Powerful Harvard Architecture Processor with Fast Multiply/Accumulate M8C processor instruction set Processor speeds to 24 MHz Register speed memory transfers Flexible addressing modes Bit manipulation on I/O and memory 8x8 multiply, 32-bit accumulate Flexible On-Chip Memory Flash program storage, 4K to 16K bytes, depending on device 50,000 erase/write cycles 256 bytes SRAM data storage In-System Serial Programming ISSP Flexible protection modes EEPROM emulation in Flash, up to 2,304 bytes Programmable Pin Configurations Schmitt trigger TTL I/O pins Logic output drive to 25 mA with internal pull-up or pull-down resistors, High Z, or strong driver Interrupt on pin change Analog output drive to 40 mA May 17, 2005 List of Tables Table 1 Device Family Key Table 2 Pin-out 8 Pin Table 3 Pin-out 20 Pin Table 4 Pin-out 28 Pin Table 5 Pin-out 44 Pin Table 6 Pin-out 48 Pin Table 7 CPU Registers and Mnemonics Table 8 Flags Register Table 9 Accumulator Register Table 10 Index Register CPU_X Table 11 Stack Pointer Register CPU_SP Table 12 Program Counter Register Table 13 Source Immediate Table 14 Source Table 15 Source Indexed Table 16 Destination Direct Table 17 Destination Table 18 Destination Direct Immediate Table 19 Destination Indexed Immediate Table 20 Destination Direct Table 21 Source Indirect Post Increment Table 22 Destination Indirect Post Table 23 Instruction Set Summary Sorted by Table 24 Flash Program Memory Map Table 25 RAM Data Memory Map Table 26 Bank 0 Table 27 Bank 1 Table 28 Port Data Registers Table 29 Port Interrupt Enable Registers Table 30 Port Global Select Registers Table 31 Port Drive Mode 0 Registers Table 32 Port Drive Mode 1 Registers Table 33 Port Interrupt Control 0 Table 34 Port Interrupt Control 1 Table 35 Internal Main Oscillator Trim Register Table 36 Internal Low Speed Oscillator Trim Register Table 37 External Crystal Oscillator Trim Table 38 Typical Package Capacitances Table 39 System Clocking Signals and Definitions Table 40 Oscillator Control 0 Table 41 Oscillator Control 1 Table 42 24V1/24V2 Frequency Selection Table 43 Interrupt Vector Table 44 General Interrupt Mask Register Table 45 Digital PSoC Block Interrupt Mask Register May 17, 2005 CY8C25122/CY8C26233/CY8C26443/CY8C26643 Device Family Data Sheet Table 46 Interrupt Vector Register Table 47 Digital Basic Type A/ Communications Type A Block xx Function Table 48 Digital Basic Type A / Communications Type A Block xx Input Register Table 49 Digital Function Data Input Definitions Table 50 Digital Basic Type A / Communications Type A Block xx Output Table 51 Digital Function Outputs Table 52 Digital Basic Type A / Communications Type A Block xx Data Register Table 53 R/W Variations per User Module Selection Table 54 Digital Basic Type A / Communications Type A Block xx Control Register 0 Table 55 Digital Basic Type A/Communications Type A Block xx Control Register Table 56 Digital Communications Type A Block xx Control Register Table 57 Digital Communications Type A Block xx Control Register Table 58 Digital Communications Type A Block xx Control Register Table 59 Global Input Table 60 Global Output Table 61 Analog System Clocking Table 62 AGND, RefHI, RefLO Operating Parameters Table 63 Analog Reference Control Table 64 Analog Column Clock Select Table 65 Analog Clock Select Register Table 66 Analog Continuous Time Block xx Control 0 Table 67 Analog Continuous Time Block xx Control 1 Table 68 Analog Continuous Time Type A Block xx Control 2 Register Table 69 Analog Switch Cap Type A Block xx Control 0 Register Table 70 Analog Switch Cap Type A Block xx Control 1 Register Table 71 Analog Switch Cap Type A Block xx Control 2 Register Table 72 Analog Switch Cap Type A Block xx Control 3 Register Table 73 Analog Switch Cap Type B Block xx Control 0 Register Table 74 Analog Switch Cap Type B Block xx Control 1 Register Table 75 Analog Switch Cap Type B Block xx Control 2 Register Table 76 Analog Switch Cap Type B Block xx Control 3 Register Table 77 Analog Comparator Control Register Table 78 Analog Frequency Table 79 Analog Synchronization Control Table 80 Analog Input Select Register Table 81 Analog Output Buffer Control Register Table 82 Analog Modulator Control Register Table 83 Multiply Input X Table 84 Multiply Input Y Table 85 Multiply Result High Register Table 86 Multiply Result Low Register Table 87 Accumulator Result 1 / Multiply/Accumulator Input X Register Table 88 Accumulator Result 0 / Multiply/Accumulator Input Y Register Table 89 Accumulator Result 3 / Multiply/Accumulator Clear 0 Register Table 90 Accumulator Result 2 / Multiply/Accumulator Clear 1 Register Table 91 Decimator/Incremental Control Register Table 92 Decimator Data High Table 93 Decimator Data Low Table 94 Processor Status and Control Register Table 95 Reset WDT Table 96 Voltage Monitor Control Register Table 97 Bandgap Trim Table 98 CY8C25122, CY8C26233, CY8C26443, CY8C26643 256 Bytes of SRAM Table 99 Table Read for Supervisory Call Functions May 17, 2005 May 17, 2005 CY8C25122/CY8C26233/CY8C26443/CY8C26643 Device Family Data Sheet May 17, 2005 List of Figures Figure 1 Block Diagram Figure 2 CY8C25122 Figure 3 CY8C26233 Figure 4 26443 PDIP/SOIC/SSOP Figure 5 26643 TQFP Figure 6 26643 PDIP/SSOP Figure 7 General Purpose I/O Pins Figure 8 External Crystal Oscillator Connections Figure 9 PSoC MCU Clock Tree of Signals Figure 10 Interrupts Overview Figure 11 GPIO Interrupt Enable Diagram Figure 12 Digital Basic and Digital Communications PSoC Blocks Figure 13 Polynomial LFSR Figure 14 Polynomial PRS Figure 15 SPI Waveforms Figure 16 Array of Analog PSoC Blocks Figure 17 Analog Reference Control Schematic Figure 18 NMux Connections Figure 19 PMux Connections Figure 20 RBotMux Connections Figure 21 Analog Continuous Time PSoC Blocks Figure 22 Analog Switch Cap Type A PSoC Blocks Figure 23 AMux Connections Figure 24 CMux Connections Figure 25 BMuxSCA/SCB Connections Figure 26 Analog Switch Cap Type B PSoC Blocks Figure 27 Analog Input Muxing Figure 28 Analog Output Buffers Figure 29 Multiply/Accumulate Block Diagram Figure 30 Decimator Coefficients Figure 31 Execution Reset Figure 32 Three Sleep States Figure 33 Switch Mode Pump Figure 34 Programming Wave Forms Figure 35 PSoC Designer Functional Flow Figure 36 CY8C25xxx/CY8C26xxx Voltage Frequency Graph Figure 37 44-Lead Thin Plastic Quad Flat Pack A44 Figure 38 20-Pin Shrunk Small Outline Package O20 Figure 39 28-Lead 210-Mil Shrunk Small Outline Package O28 Figure 40 48-Lead Shrunk Small Outline Package O48 Figure 41 20-Lead 300-Mil Molded DIP P5 Figure 42 28-Lead 300-Mil Molded DIP P21 Figure 43 48-Lead 600-Mil Molded DIP P25 Figure 44 20-Lead 300-Mil Molded SOIC S5 Figure 45 28-Lead 300-Mil Molded SOIC S21 May 17, 2005 CY8C25122/CY8C26233/CY8C26443/CY8C26643 Device Family Data Sheet Figure 46 8-Lead 300-Mil Molded DIP May 17, 2005 P0 P1 P2 P3 P4 P5 Analog Input Muxing I/O Ports Analog Output Drivers Array of Analog PSoC Blocks Clocks to Analog Global I/O Programmable Interconnect Comparator Outputs Array of Digital PSoC Blocks SRAM Memory Flash Program Memory Oscillator and PLL M8C CPU Core MAC Multiply Accumulate Internal System Bus Decimator Watchdog/ Sleep Timer LVD/POR Interrupt Controller Figure 1 Block Diagram May 17, 2005 CY8C25122/CY8C26233/CY8C26443/CY8C26643 Device Family Data Sheet Functional Overview The CPU heart of this next generation family of microcontrollers is a high performance, 8-bit, M8C Harvard architecture microprocessor. Separate program and memory busses allow for faster overall throughput. Processor clock speeds to 24 MHz are available. The processor may also be run at lower clock speeds for powersensitive applications. A rich instruction set allows for efficient low-level language support. All devices in this family include both analog and digital configurable peripherals PSoC blocks . These blocks enable the user to define unique functions during configuration of the device. Included are twelve analog PSoC blocks and eight digital PSoC blocks. Potential applications for the digital PSoC blocks are timers, counters, UARTs, CRC generators, PWMs, and other functions. The analog PSoC blocks can be used for SAR ADCs, Multi-slope ADCs, programmable gain amplifiers, programmable filters, DACs, and other functions. Higher order User Modules such as modems, complex motor controllers, and complete sensor signal chains can be created from these building blocks. This allows for an unprecedented level of flexibility and integration in microcontroller-based systems. A Multiplier/Accumulator MAC is available on all devices in this family. The MAC is implemented on this device as a peripheral that is mapped into the register space. When an instruction writes to the MAC input registers, the result of an 8x8 multiply and a 32-bit accumulate are available to be read from the output registers on the next instruction cycle. The number of general purpose I/Os available in this family of parts range from 6 to Each of these I/O pins has a variety of programmable options. In the output mode, the user can select the drive strength desired. Any pin can serve as an interrupt source, and can be selected to trigger on positive edges, negative edges, or any change. Digital signal sources can be routed directly from a pin to the digital PSoC blocks. Some pins have additional capability to route analog signals to the analog PSoC blocks. Multiple oscillator options are available for use in clocking the CPU, analog PSoC blocks and digital PSoC blocks. These options include an internal main oscillator running at 48/24 MHz, an external crystal oscillator for use with a kHz watch crystal, and an internal lowspeed oscillator for use in clocking the PSoC blocks and the Watchdog/Sleep timer. User selectable clock divisors allow for optimizing code execution speed and power trade-offs. The different device types in this family provide various amounts of code and data memory. The code space ranges in size from 4K to 16K bytes of user programmable Flash memory. This memory can be programmed serially in either a programming Pod or on the user board. The endurance on the Flash memory is 50,000 erase/write cycles. The data space is 256 bytes of user SRAM. A powerful and flexible protection model secures the user’s sensitive information. This model allows the user to selectively lock blocks of memory for read and write protection. This allows partial code updates without exposing proprietary information. Ordering Guide Table 123 Ordering Guide Leaded 1 Type 8 Pin 300 Mil Molded DIP 20 Pin 300 Mil Molded DIP 20 Pin 300 Mil Molded SOIC 20 Pin 210 Mil SSOP 28 Pin 300 Mil Molded DIP 28 Pin 300 Mil Molded SOIC 28 Pin 210 Mil SSOP 48 Pin 600 Mil Molded DIP Ordering Code CY8C25122-24PI CY8C26233-24PI CY8C26233-24SI CY8C26233-24PVI CY8C26443-24PI CY8C26443-24SI CY8C26443-24PVI CY8C26643-24PI2 Flash KBytes 4 8 16 RAM Bytes 48 Pin 300 Mil SSOP CY8C26643-24PVI 44 Pin Thin Plastic Quad Flatpack CY8C26643-24AI Orders for leaded devices will not be accepted after July 48-PDIP package not offered Pb-Free. No Yes Temperature Range Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Table 124 Ordering Guide Pb-Free Denoted with an “X” in Ordering Code Type Ordering Code Flash KBytes Bytes 8 Pin 300 Mil Molded DIP 20 Pin 300 Mil Molded DIP 20 Pin 300 Mil Molded SOIC CY8C25122-24PXI CY8C26233-24PXI CY8C26233-24SXI 20 Pin 300 Mil Molded SOIC Tape and Reel 20 Pin 210 Mil SSOP 20 Pin 210 Mil SSOP Tape and Reel 28 Pin 300 Mil Molded DIP CY8C26233-24SXIT CY8C26233-24PVXI CY8C26233-24PVXIT CY8C26443-24PXI 28 Pin 300 Mil Molded SOIC CY8C26443-24SXI 28 Pin 300 Mil Molded SOIC Tape and Reel CY8C26443-24SXIT 28 Pin 210 Mil SSOP CY8C26443-24PVXI 28 Pin 210 Mil SSOP Tape and Reel CY8C26443-24PVXIT 48 Pin 300 Mil SSOP CY8C26643-24PVXI 48 Pin 300 Mil SSOP Tape and Reel CY8C26643-24PVXIT 44 Pin Thin Plastic Quad Flatpack CY8C26643-24AXI 44 Pin Thin Plastic Quad Flatpack Tape and Reel CY8C26643-24AXIT No Yes Temperature Range Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Yes Ind. -40C to +85C Yes Ind. -40C to +85C Yes Ind. -40C to +85C Yes Ind. -40C to +85C Yes Ind. -40C to +85C Yes Ind. -40C to +85C Yes Ind. -40C to +85C Yes Ind. -40C to +85C Yes Ind. -40C to +85C Yes Ind. -40C to +85C Yes Ind. -40C to +85C

PDF Datasheet Preview

Not Recommended for New Designs Use CY8C27xxx

Configurable Mixed-Signal Array with On-board Controller

Programmable System-on-Chip PSoC

May 17, 2005

CY8C25122/CY8C26233/CY8C26443/CY8C26643 Device Family Data Sheet

Getting Started in the PSoC World!

The award winning PSoC Designer software and PSoC silicon are an integrated unit. The quickest path to understanding the PSoC silicon is through the PSoC Designer software GUI. This data sheet is useful for understanding the details of the PSOC integrated circuit, but is not a good starting point for a new PSoC developer seeking to get a general overview of this new technology.

PSoC developers are NOT required to build their own ADCs, DACs, and other peripherals. Embedded in the PSoC Designer software are the individual data sheets, performance graphs, and PSoC User Modules graphically selected code packets for the peripherals, such as the incremental ADCs, DACs, LCD controllers, op amps, low-pass filters, etc. With simple GUI-based selection, placement, and connection, the basic architecture of a design may be developed within PSoC Designer software without ever writing a single line of code.

Development Kits are available from the following distributors Digi-Key, Avnet, Arrow, and Future. The Cypress Online Store also contains development kits, C compilers, and all accessories for PSoC development. Go to the Cypress Online Store web site at click the Online Store shopping cart icon at the bottom of the web page, and click PSoC Programmable System-on-Chip to view a current list of available items.

Free PSoC technical training is available for beginners and is taught by a marketing or application engineer over the phone. PSoC training classes cover designing, debugging, advanced analog, as well as application-specific classes covering topics such as PSoC and the LIN bus. Go to click on Design Support located on the left side of the web page, and select Technical Training for more details.

Certified PSoC Consultants offer everything from technical assistance to completed PSoC designs. To contact or become a PSoC Consultant go to click on Design Support located on the left side of the web page, and select CYPros Consultants.

PSoC application engineers take pride in fast and accurate response. They can be reached with a 4-hour guaranteed response at

Cypress Semiconductor 2700 162nd Street SW, Building D

Lynnwood, WA 98037 Phone:

Fax Application Support Hotline:

Cypress Semiconductor Corporation. All rights reserved. PSoC , PSoC Designer , and Programmable System-on-Chip are PSoCrelated trademarks of Cypress Semiconductor Corporation. All other trademarks or registered trademarks referenced herein are property of the respective corporations. The information contained herein is subject to change without notice. Cypress Semiconductor assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. Cypress Semiconductor products are not warranted nor intended to be used for medical, life-support, life-saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress Semiconductor. Note the following details of the Flash code protection features on Cypress Semiconductor PSoC devices. Cypress Semiconductor products meet the specifications contained in their particular Cypress Semiconductor Data Sheets. Cypress Semiconductor believes that its family of products is one of the most secure families of its kind on the market today, regardless of how they are used. There may be methods, unknown to Cypress Semiconductor, that can breach the code protection features. Any of these methods, to our knowledge, would be dishonest and possibly illegal. Neither Cypress Semiconductor nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Cypress Semiconductor is willing to work with the customer who is concerned about the integrity of their code. Code protection is constantly evolving. We at Cypress Semiconductor are committed to continuously improving the code protection features of our products.

May 17, 2005

The PSoC CY8C25122/CY8C26233/CY8C26443/CY8C26643 family of programmable sys-

Not Recommended for New Designs Use CY8C27xxx tem-on-chip devices replace multiple MCU-based system components with one single-chip, con-
figurable device. A PSoC device includes configurable analog and digital peripheral blocks, a fast CPU, Flash program memory, and SRAM data memory in a range of convenient pin-outs and memory sizes. The driving force behind this innovative programmable system-on-chip comes from user configurability of the analog and digital arrays the PSoC blocks.

Programmable System-on-Chip PSoC Blocks

Partial Flash updates

On-chip, user configurable analog and digital
peripheral blocks

PSoC blocks can be used individually or in combina-
tion
12 Analog PSoC blocks provide Up to 11-bit Delta-Sigma ADC Up to 8-bit Successive Approximation ADC Up to 12-bit Incremental ADC Up to 9-bit DAC Programmable gain amplifier Programmable filters Differential comparators
8 Digital PSoC blocks provide Multipurpose timers event timing, real-time clock,
pulse width modulation PWM and PWM with deadband

CRC modules Full-duplex UARTs SPI master or slave configuration Flexible clocking sources for analog PSoC blocks

Powerful Harvard Architecture Processor with Fast Multiply/Accumulate

M8C processor instruction set Processor speeds to 24 MHz Register speed memory transfers Flexible addressing modes Bit manipulation on I/O and memory 8x8 multiply, 32-bit accumulate

Flexible On-Chip Memory

Flash program storage, 4K to 16K bytes, depending
on device
50,000 erase/write cycles 256 bytes SRAM data storage In-System Serial Programming ISSP

Flexible protection modes EEPROM emulation in Flash, up to 2,304 bytes

Programmable Pin Configurations

Schmitt trigger TTL I/O pins Logic output drive to 25 mA with internal pull-up or
pull-down resistors, High Z, or strong driver

Interrupt on pin change Analog output drive to 40 mA
May 17, 2005

List of Tables

Table 1 Device Family Key Table 2 Pin-out 8 Pin Table 3 Pin-out 20 Pin Table 4 Pin-out 28 Pin Table 5 Pin-out 44 Pin Table 6 Pin-out 48 Pin Table 7 CPU Registers and Mnemonics Table 8 Flags Register Table 9 Accumulator Register Table 10 Index Register CPU_X Table 11 Stack Pointer Register CPU_SP Table 12 Program Counter Register Table 13 Source Immediate Table 14 Source Table 15 Source Indexed Table 16 Destination Direct Table 17 Destination Table 18 Destination Direct Immediate Table 19 Destination Indexed Immediate Table 20 Destination Direct Table 21 Source Indirect Post Increment Table 22 Destination Indirect Post Table 23 Instruction Set Summary Sorted by Table 24 Flash Program Memory Map Table 25 RAM Data Memory Map Table 26 Bank 0 Table 27 Bank 1 Table 28 Port Data Registers Table 29 Port Interrupt Enable Registers Table 30 Port Global Select Registers Table 31 Port Drive Mode 0 Registers Table 32 Port Drive Mode 1 Registers Table 33 Port Interrupt Control 0 Table 34 Port Interrupt Control 1 Table 35 Internal Main Oscillator Trim Register Table 36 Internal Low Speed Oscillator Trim Register Table 37 External Crystal Oscillator Trim Table 38 Typical Package Capacitances Table 39 System Clocking Signals and Definitions Table 40 Oscillator Control 0 Table 41 Oscillator Control 1 Table 42 24V1/24V2 Frequency Selection Table 43 Interrupt Vector Table 44 General Interrupt Mask Register Table 45 Digital PSoC Block Interrupt Mask Register

May 17, 2005

CY8C25122/CY8C26233/CY8C26443/CY8C26643 Device Family Data Sheet

Table 46 Interrupt Vector Register Table 47 Digital Basic Type A/ Communications Type A Block xx Function Table 48 Digital Basic Type A / Communications Type A Block xx Input Register Table 49 Digital Function Data Input Definitions Table 50 Digital Basic Type A / Communications Type A Block xx Output Table 51 Digital Function Outputs Table 52 Digital Basic Type A / Communications Type A Block xx Data Register Table 53 R/W Variations per User Module Selection Table 54 Digital Basic Type A / Communications Type A Block xx Control Register 0 Table 55 Digital Basic Type A/Communications Type A Block xx Control Register Table 56 Digital Communications Type A Block xx Control Register Table 57 Digital Communications Type A Block xx Control Register Table 58 Digital Communications Type A Block xx Control Register Table 59 Global Input Table 60 Global Output Table 61 Analog System Clocking Table 62 AGND, RefHI, RefLO Operating Parameters Table 63 Analog Reference Control Table 64 Analog Column Clock Select Table 65 Analog Clock Select Register Table 66 Analog Continuous Time Block xx Control 0 Table 67 Analog Continuous Time Block xx Control 1 Table 68 Analog Continuous Time Type A Block xx Control 2 Register Table 69 Analog Switch Cap Type A Block xx Control 0 Register Table 70 Analog Switch Cap Type A Block xx Control 1 Register Table 71 Analog Switch Cap Type A Block xx Control 2 Register Table 72 Analog Switch Cap Type A Block xx Control 3 Register Table 73 Analog Switch Cap Type B Block xx Control 0 Register Table 74 Analog Switch Cap Type B Block xx Control 1 Register Table 75 Analog Switch Cap Type B Block xx Control 2 Register Table 76 Analog Switch Cap Type B Block xx Control 3 Register Table 77 Analog Comparator Control Register Table 78 Analog Frequency Table 79 Analog Synchronization Control Table 80 Analog Input Select Register Table 81 Analog Output Buffer Control Register Table 82 Analog Modulator Control Register Table 83 Multiply Input X Table 84 Multiply Input Y Table 85 Multiply Result High Register Table 86 Multiply Result Low Register Table 87 Accumulator Result 1 / Multiply/Accumulator Input X Register Table 88 Accumulator Result 0 / Multiply/Accumulator Input Y Register Table 89 Accumulator Result 3 / Multiply/Accumulator Clear 0 Register Table 90 Accumulator Result 2 / Multiply/Accumulator Clear 1 Register Table 91 Decimator/Incremental Control Register Table 92 Decimator Data High Table 93 Decimator Data Low Table 94 Processor Status and Control Register Table 95 Reset WDT Table 96 Voltage Monitor Control Register Table 97 Bandgap Trim Table 98 CY8C25122, CY8C26233, CY8C26443, CY8C26643 256 Bytes of SRAM Table 99 Table Read for Supervisory Call Functions

May 17, 2005
May 17, 2005

CY8C25122/CY8C26233/CY8C26443/CY8C26643 Device Family Data Sheet

May 17, 2005

List of Figures

Figure 1 Block Diagram Figure 2 CY8C25122 Figure 3 CY8C26233 Figure 4 26443 PDIP/SOIC/SSOP Figure 5 26643 TQFP Figure 6 26643 PDIP/SSOP Figure 7 General Purpose I/O Pins Figure 8 External Crystal Oscillator Connections Figure 9 PSoC MCU Clock Tree of Signals Figure 10 Interrupts Overview Figure 11 GPIO Interrupt Enable Diagram Figure 12 Digital Basic and Digital Communications PSoC Blocks Figure 13 Polynomial LFSR Figure 14 Polynomial PRS Figure 15 SPI Waveforms Figure 16 Array of Analog PSoC Blocks Figure 17 Analog Reference Control Schematic Figure 18 NMux Connections Figure 19 PMux Connections Figure 20 RBotMux Connections Figure 21 Analog Continuous Time PSoC Blocks Figure 22 Analog Switch Cap Type A PSoC Blocks Figure 23 AMux Connections Figure 24 CMux Connections Figure 25 BMuxSCA/SCB Connections Figure 26 Analog Switch Cap Type B PSoC Blocks Figure 27 Analog Input Muxing Figure 28 Analog Output Buffers Figure 29 Multiply/Accumulate Block Diagram Figure 30 Decimator Coefficients Figure 31 Execution Reset Figure 32 Three Sleep States Figure 33 Switch Mode Pump Figure 34 Programming Wave Forms Figure 35 PSoC Designer Functional Flow Figure 36 CY8C25xxx/CY8C26xxx Voltage Frequency Graph Figure 37 44-Lead Thin Plastic Quad Flat Pack A44 Figure 38 20-Pin Shrunk Small Outline Package O20 Figure 39 28-Lead 210-Mil Shrunk Small Outline Package O28 Figure 40 48-Lead Shrunk Small Outline Package O48 Figure 41 20-Lead 300-Mil Molded DIP P5 Figure 42 28-Lead 300-Mil Molded DIP P21 Figure 43 48-Lead 600-Mil Molded DIP P25 Figure 44 20-Lead 300-Mil Molded SOIC S5 Figure 45 28-Lead 300-Mil Molded SOIC S21

May 17, 2005

CY8C25122/CY8C26233/CY8C26443/CY8C26643 Device Family Data Sheet

Figure 46 8-Lead 300-Mil Molded DIP

May 17, 2005

P0 P1 P2 P3 P4 P5

Analog Input Muxing

I/O Ports

Analog Output Drivers

Array of Analog PSoC Blocks

Clocks to Analog

Global I/O Programmable Interconnect

Comparator

Outputs

Array of Digital PSoC Blocks

SRAM Memory

Flash Program Memory

Oscillator and PLL

M8C CPU Core

MAC Multiply Accumulate

Internal System Bus

Decimator

Watchdog/ Sleep Timer

LVD/POR

Interrupt Controller

Figure 1 Block Diagram

May 17, 2005

CY8C25122/CY8C26233/CY8C26443/CY8C26643 Device Family Data Sheet

Functional Overview

The CPU heart of this next generation family of microcontrollers is a high performance, 8-bit, M8C Harvard architecture microprocessor. Separate program and memory busses allow for faster overall throughput. Processor clock speeds to 24 MHz are available. The processor may also be run at lower clock speeds for powersensitive applications. A rich instruction set allows for efficient low-level language support.

All devices in this family include both analog and digital configurable peripherals PSoC blocks . These blocks enable the user to define unique functions during configuration of the device. Included are twelve analog PSoC blocks and eight digital PSoC blocks. Potential applications for the digital PSoC blocks are timers, counters, UARTs, CRC generators, PWMs, and other functions. The analog PSoC blocks can be used for SAR ADCs, Multi-slope ADCs, programmable gain amplifiers, programmable filters, DACs, and other functions. Higher order User Modules such as modems, complex motor controllers, and complete sensor signal chains can be created from these building blocks. This allows for an unprecedented level of flexibility and integration in microcontroller-based systems.

A Multiplier/Accumulator MAC is available on all devices in this family. The MAC is implemented on this device as a peripheral that is mapped into the register space. When an instruction writes to the MAC input registers, the result of an 8x8 multiply and a 32-bit accumulate are available to be read from the output registers on the next instruction cycle.

The number of general purpose I/Os available in this family of parts range from 6 to Each of these I/O pins has a variety of programmable options. In the output
mode, the user can select the drive strength desired. Any pin can serve as an interrupt source, and can be selected to trigger on positive edges, negative edges, or any change. Digital signal sources can be routed directly from a pin to the digital PSoC blocks. Some pins have additional capability to route analog signals to the analog PSoC blocks.

Multiple oscillator options are available for use in clocking the CPU, analog PSoC blocks and digital PSoC blocks. These options include an internal main oscillator running at 48/24 MHz, an external crystal oscillator for use with a kHz watch crystal, and an internal lowspeed oscillator for use in clocking the PSoC blocks and the Watchdog/Sleep timer. User selectable clock divisors allow for optimizing code execution speed and power trade-offs.

The different device types in this family provide various amounts of code and data memory. The code space ranges in size from 4K to 16K bytes of user programmable Flash memory. This memory can be programmed serially in either a programming Pod or on the user board. The endurance on the Flash memory is 50,000 erase/write cycles. The data space is 256 bytes of user SRAM.

A powerful and flexible protection model secures the user’s sensitive information. This model allows the user to selectively lock blocks of memory for read and write protection. This allows partial code updates without exposing proprietary information.
Ordering Guide
Table 123 Ordering Guide Leaded 1

Type
8 Pin 300 Mil Molded DIP 20 Pin 300 Mil Molded DIP 20 Pin 300 Mil Molded SOIC 20 Pin 210 Mil SSOP 28 Pin 300 Mil Molded DIP 28 Pin 300 Mil Molded SOIC 28 Pin 210 Mil SSOP 48 Pin 600 Mil Molded DIP
Ordering Code

CY8C25122-24PI CY8C26233-24PI CY8C26233-24SI CY8C26233-24PVI CY8C26443-24PI CY8C26443-24SI CY8C26443-24PVI CY8C26643-24PI2

Flash KBytes
4 8 16

RAM Bytes
48 Pin 300 Mil SSOP

CY8C26643-24PVI
44 Pin Thin Plastic Quad Flatpack

CY8C26643-24AI

Orders for leaded devices will not be accepted after July 48-PDIP package not offered Pb-Free.

No Yes

Temperature Range

Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C

Ind. -40C to +85C Ind. -40C to +85C
Table 124 Ordering Guide Pb-Free Denoted with an “X” in Ordering Code

Type
Ordering Code

Flash

KBytes Bytes
8 Pin 300 Mil Molded DIP 20 Pin 300 Mil Molded DIP 20 Pin 300 Mil Molded SOIC

CY8C25122-24PXI CY8C26233-24PXI CY8C26233-24SXI
20 Pin 300 Mil Molded SOIC Tape and Reel
20 Pin 210 Mil SSOP
20 Pin 210 Mil SSOP Tape and Reel
28 Pin 300 Mil Molded DIP

CY8C26233-24SXIT

CY8C26233-24PVXI

CY8C26233-24PVXIT

CY8C26443-24PXI
28 Pin 300 Mil Molded SOIC

CY8C26443-24SXI
28 Pin 300 Mil Molded SOIC Tape and Reel

CY8C26443-24SXIT
28 Pin 210 Mil SSOP

CY8C26443-24PVXI
28 Pin 210 Mil SSOP Tape and Reel

CY8C26443-24PVXIT
48 Pin 300 Mil SSOP

CY8C26643-24PVXI
48 Pin 300 Mil SSOP Tape and Reel

CY8C26643-24PVXIT
44 Pin Thin Plastic Quad Flatpack CY8C26643-24AXI
44 Pin Thin Plastic Quad Flatpack Tape and Reel

CY8C26643-24AXIT

No Yes

Temperature Range

Ind. -40C to +85C Ind. -40C to +85C Ind. -40C to +85C

Yes Ind. -40C to +85C

Yes Ind. -40C to +85C

Yes Ind. -40C to +85C

Yes Ind. -40C to +85C Yes Ind. -40C to +85C

Yes Ind. -40C to +85C

Yes Ind. -40C to +85C

Yes Ind. -40C to +85C

Yes Ind. -40C to +85C

Yes Ind. -40C to +85C

Yes Ind. -40C to +85C

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY8C26233-24PVIT Datasheet file may be downloaded here without warranties.

Datasheet ID: CY8C26233-24PVIT 508160