CY8C21434-24LCXI

CY8C21434-24LCXI Datasheet

CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234

Part	Datasheet
CY8C21434-24LCXI	CY8C21434-24LCXI (pdf)

Related Parts	Information
CY8C21434-24LCXIT	CY8C21434-24LCXIT

PDF Datasheet Preview
CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234 Programmable System-on-Chip • Powerful Harvard Architecture Processor M8C Processor Speeds to 24 MHz Low power at high speed 2.4V to 5.25V Operating Voltage Operating Voltages Down to 1.0V using On-Chip Switch Mode Pump SMP Industrial Temperature Range -40°C to +85°C • Advanced Peripherals Blocks 4 Analog Type “E” PSoC Blocks provide • 2 Comparators with DAC Refs • Single or Dual 8-Bit 28 Channel ADC 4 Digital PSoC Blocks provide • 8 to 32-Bit Timers, Counters, and PWMs • CRC and PRS Modules • Full-Duplex UART, SPI Master or Slave • Connectable to All GPIO Pins Complex Peripherals by Combining Blocks • Flexible On-Chip Memory 8K Flash Program Storage 50,000 Erase/Write Cycles 512 Bytes SRAM Data Storage In-System Serial Programming ISSP Partial Flash Updates Flexible Protection Modes EEPROM Emulation in Flash • Complete Development Tools Free Development Software PSoC Designer Full-Featured, In-Circuit Emulator and Programmer Full Speed Emulation Complex Breakpoint Structure 128K Trace Memory • Precision, Programmable Clocking Internal 24/48 MHz Oscillator Internal Oscillator for Watchdog and Sleep • Programmable Pin Configurations 25 mA Sink, 10 mA Drive on All GPIO Pull Up, Pull Down, High Z, Strong, or Open Drain Drive Modes on All GPIO Up to 8 Analog Inputs on GPIO Configurable Interrupt on All GPIO • Versatile Analog Mux Common Internal Analog Bus Simultaneous Connection of IO Combinations Capacitive Sensing Application Capability • Additional System Resources I2C Master, Slave and Multi-Master to 400 kHz Watchdog and Sleep Timers User-Configurable Low Voltage Detection Integrated Supervisory Circuit On-Chip Precision Voltage Reference Logic Block Diagram • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234 PSoC Functional Overview The PSoC family consists of many Mixed-Signal Array with On-Chip Controller devices. These devices are designed to replace multiple traditional MCU-based system components with one low cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture enables the user to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast CPU, Flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts. The PSoC architecture, shown in Figure 1, consists of four main areas the Core, the System Resources, the Digital System, and the Analog System. Configurable global bus resources allow combining all the device resources into a complete custom system. Each CY8C21x34 PSoC device includes four digital blocks and four analog blocks. Depending on the PSoC package, up to 28 general purpose IO GPIO are also included. The GPIO provide access to the global digital and analog interconnects. The PSoC Core The PSoC Core is a powerful engine that supports a rich instruction set. It encompasses SRAM for data storage, an interrupt controller, sleep and watchdog timers, and IMO internal main oscillator and ILO internal low speed oscillator . The CPU core, called the M8C, is a powerful processor with speeds up to 24 MHz. The M8C is a four MIPS 8-bit Harvard architecture microprocessor. System Resources provide the following additional capabilities: • Digital clocks to increase the flexibility of the PSoC mixed-signal arrays. • I2C functionality to implement an I2C master and slave. • An internal voltage reference, MultiMaster, that provides an absolute value of 1.3V to a number of PSoC subsystems. • A switch mode pump SMP that generates normal operating voltages off a single battery cell. • Various system resets supported by the M8C. The Digital System consists of an array of digital PSoC blocks that may be configured into any number of digital peripherals. The digital blocks are connected to the GPIO through a series of global buses that can route any signal to any pin, freeing designs from the constraints of a fixed peripheral controller. The Analog System consists of four analog PSoC blocks, supporting comparators and analog-to-digital conversion up to 8 bits in precision. The Digital System The Digital System consists of 4 digital PSoC blocks. Each block is an 8-bit resource that is used alone or combined with other blocks to form 8, 16, 24, and 32-bit peripherals, which are called user module references. Digital peripheral configurations include the following. • PWMs 8 to 32 bit • PWMs with Dead band 8 to 32 bit • Counters 8 to 32 bit • Timers 8 to 32 bit • UART 8 bit with selectable parity • SPI master and slave • I2C slave and multi-master • Cyclical Redundancy Checker/Generator 8 to 32 bit • IrDA • Pseudo Random Sequence Generators 8 to 32 bit The digital blocks are connected to any GPIO through a series of global buses that can route any signal to any pin. The buses also allow for signal multiplexing and for performing logic operations. This configurability frees your designs from the constraints of a fixed peripheral controller. Digital blocks are provided in rows of four, where the number of blocks varies by PSoC device family. This allows the optimum choice of system resources for your application. Family resources are shown in Table 1 on page Figure Digital System Block Diagram Port 3 Port 2 For up-to-date ordering, packaging, and electrical specification information, see the latest PSoC device data sheets on the web at Application Notes Application notes are an excellent introduction to the wide variety of possible PSoC designs. They are located here Select Application Notes under the Documentation tab. Development Kits PSoC Development Kits are available online from Cypress at and through a growing number of regional and global distributors, which include Arrow, Avnet, Digi-Key, Farnell, Future Electronics, and Newark. Training Free PSoC technical training on demand, webinars, and workshops is available online at The training covers a wide variety of topics and skill levels to assist you in your designs. Cypros Consultants Certified PSoC Consultants offer everything from technical assistance to completed PSoC designs. To contact or become a PSoC Consultant go to Solutions Library Visit our growing library of solution focused designs at Here you can find various application designs that include firmware and hardware design files that enable you to complete your designs quickly. Technical Support For assistance with technical issues, search KnowledgeBase articles and forums at If you cannot find an answer to your question, call technical support at Notes Limited analog functionality. Two analog blocks and one CapSense. Page 4 of 45 [+] Feedback CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234 Development Tools PSoC Designer is a Windows-based, integrated development environment for the Programmable System-on-Chip PSoC devices. The PSoC Designer IDE runs on Windows XP or Windows Vista. This system provides design database management by project, an integrated debugger with In-Circuit Emulator, in-system programming support, and built-in support for third-party assemblers and C compilers. PSoC Designer also supports C language compilers developed specifically for the devices in the PSoC family. PSoC Designer Software Subsystems System-Level View A drag-and-drop visual embedded system design environment based on PSoC Express. In the system level view you create a model of your system inputs, outputs, and communication interfaces. You define when and how an output device changes state based upon any or all other system devices. Based upon the design, PSoC Designer automatically selects one or more PSoC Mixed-Signal Controllers that match your system requirements. PSoC Designer generates all embedded code, then compiles and links it into a programming file for a specific PSoC device. Chip-Level View The chip-level view is a more traditional Integrated Development Environment IDE based on PSoC Designer Choose a base device to work with and then select different onboard analog and digital components called user modules that use the PSoC blocks. Examples of user modules are ADCs, DACs, Amplifiers, and Filters. Configure the user modules for your chosen application and connect them to each other and to the proper pins. Then generate your project. This prepopulates your project with APIs and libraries that you can use to program your application. The device editor also supports easy development of multiple configurations and dynamic reconfiguration. Dynamic configuration allows for changing configurations at run time. Hybrid Designs You can begin in the system-level view, allow it to choose and configure your user modules, routing, and generate code, then switch to the chip-level view to gain complete control over on-chip resources. All views of the project share a common code editor, builder, and common debug, emulation, and programming tools. Code Generation Tools PSoC Designer supports multiple third party C compilers and assemblers. The code generation tools work seamlessly within the PSoC Designer interface and have been tested with a full range of debugging tools. The choice is yours. Assemblers. The assemblers allow assembly code to merge seamlessly with C code. Link libraries automatically use absolute addressing or are compiled in relative mode, and linked with other software modules to get absolute addressing. C Language Compilers. C language compilers are available that support the PSoC family of devices. The products allow you to create complete C programs for the PSoC family devices. The optimizing C compilers provide all the features of C tailored to the PSoC architecture. They come complete with embedded libraries providing port and bus operations, standard keypad and display support, and extended math functionality. Debugger The PSoC Designer Debugger subsystem provides hardware in-circuit emulation, allowing you to test the program in a physical system while providing an internal view of the PSoC device. Debugger commands allow the designer to read and program and read and write data memory, read and write I/O registers, read and write CPU registers, set and clear breakpoints, and provide program run, halt, and step control. The debugger also allows the designer to create a trace buffer of registers and memory locations of interest. Online Help System The online help system displays online, context-sensitive help for the user. Designed for procedural and quick reference, each functional subsystem has its own context-sensitive help. This system also provides tutorials and links to FAQs and an Online Support Forum to aid the designer in getting started. In-Circuit Emulator Programming adapter converts non-DIP package to DIP footprint. Specific details and ordering information for each of the adapters can be found at Third-Party Tools Several tools have been specially designed by the following 3rd-party vendors to accompany PSoC devices during development and production. Specific details for each of these tools can be found at under DESIGN RESOURCES >> Evaluation Boards. Build a PSoC Emulator into Your Board For details on how to emulate your circuit before going to volume production using an on-chip debug OCD non-production PSoC device, see Application Note AN2323 “Debugging - Build a PSoC Emulator into Your Board”. Notes Flex-Pod kit includes a practice flex-pod and a practice PCB, in addition to two flex-pods. Foot kit includes surface mount feet that can be soldered to the target PCB. Page 41 of 45 [+] Feedback Ordering Information CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234 Package Ordering Code Flash Bytes SRAM Bytes Switch Mode Pump Temperature Range Digital Blocks Analog Blocks Digital IO Pins Analog Inputsa Analog Outputs XRES Pin 16 Pin 150-Mil SOIC CY8C21234-24SXI 8K 512 Yes -40°C to +85°C 4 12[27] 0 16 Pin 150-Mil SOIC Tape and Reel CY8C21234-24SXIT 8K 512 Yes -40°C to +85°C 4 12[27] 0 20 Pin 210-Mil SSOP CY8C21334-24PVXI 8K 512 No -40°C to +85°C 4 16[27] 0 20 Pin 210-Mil SSOP Tape and Reel CY8C21334-24PVXIT 8K 512 No -40°C to +85°C 4 16[27] 0 28 Pin 210-Mil SSOP CY8C21534-24PVXI 8K 512 No -40°Cto +85°C 4 24[27] 0 28 Pin 210-Mil SSOP Tape and Reel CY8C21534-24PVXIT 8K 512 No -40°C to +85°C 4 24[27] 0 32 Pin 5x5 mm MAX CY8C21434-24LFXI 8K 512 No -40°C to +85°C 4 28[27] 0 QFN [27] 32 Pin 5x5 mm MAX QFN CY8C21434-24LFXIT 8K 512 No -40°C to +85°C 4 28[27] 0 b Tape and Reel 32 Pin 5x5 mm MAX QFN CY8C21434-24LKXI 8K 512 No -40°C to +85°C 4 28[27] 0 [28] 32 Pin 5x5 mm MAX QFN CY8C21434-24LKXIT 8K 512 No -40°C to +85°C 4 28[27] 0 [28] Tape and Reel 32 Pin 5x5 mm MAX QFN CY8C21634-24LFXI 8K 512 Yes -40°C to +85°C 4 26[27] 0 [28] 32 Pin 5x5 mm MAX QFN CY8C21634-24LFXIT 8K 512 Yes -40°C to +85°C 4 26[27] 0 [28] Tape and Reel 32 Pin 5x5 mm MAX SAWN QFN Ordering Code Definitions CY 8 C 21 xxx-24xx CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234 Package Type: Thermal Rating: PX = PDIP Pb-Free C = Commercial SX = SOIC Pb-Free I = Industrial PVX = SSOP Pb-Free E = Extended LFX/LKX = QFN Pb-Free AX = TQFP Pb-Free Speed 24 MHz Family Code Technology Code C = CMOS Marketing Code 8 = Cypress PSoC Company ID CY = Cypress Page 43 of 45 [+] Feedback CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234 Document History Page Document Title Programmable System-on-Chip Document Number 38-12025 Orig. of Change Submission Date Description of Change 227340 HMT See ECN 235992 SFV See ECN 248572 SFV See ECN Changed title to include all part #s. Changed 28-pin SSOP from CY8C21434 to CY8C21534. Changed pin 9 on the 28-pin SSOP from SMP pin to Vss pin. Added SMP block to architecture diagram. Update Electrical Specifications. Added another 32-pin MLF part CY8C21634. 277832 HMT See ECN Verify data sheet standards from SFV memo. Add Analog Input Mux to applicable pin outs. Update PSoC Characteristics table. Update diagrams and specs. Final. 285293 HMT See ECN Update 2.7V DC GPIO spec. Add Reflow Peak Temp. table. 301739 HMT See ECN DC Chip-Level Specification changes. Update links to new CY.com Portal. Added 32-Pin QFN Sawn pin diagram, package diagram, and ordering infor- mation. 2273246 UVS/AESA 04/01/08 Added 32 pin thin sawn package diagram. 2618124 OGNE/PYRS 12/09/08 Added Note in Ordering Information section. Changed title from PSoC Mixed-Signal Array to PSoC Programmable System-on-Chip 2684145 SNV/AESA 04/06/2009 Updated 32-Pin Sawn QFN package dimension for CY8C21434-24LTXIT Updated Getting Started, Development Tools, and Designing with PSoC Designer Sections 2693024 DPT/PYRS 04/16/2009 Updated 32-Pin Sawn QFN package diagram Page 44 of 45 [+] Feedback CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com PSoC Solutions General psoc.cypress.com/solutions Low Power/Low Voltage psoc.cypress.com/low-power Precision Analog psoc.cypress.com/precision-analog LCD Drive psoc.cypress.com/lcd-drive CAN 2.0b psoc.cypress.com/can psoc.cypress.com/usb Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Page 45 of 45 PSoC Designer and Programmable System-on-Chip are trademarks and is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are property of the respective corporations. Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. All products and company names mentioned in this document may be the trademarks of their respective holders. [+] Feedback

PDF Datasheet Preview

CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234

Programmable System-on-Chip
• Powerful Harvard Architecture Processor M8C Processor Speeds to 24 MHz Low power at high speed 2.4V to 5.25V Operating Voltage Operating Voltages Down to 1.0V using On-Chip Switch Mode Pump SMP Industrial Temperature Range -40°C to +85°C
• Advanced Peripherals Blocks 4 Analog Type “E” PSoC Blocks provide
• 2 Comparators with DAC Refs
• Single or Dual 8-Bit 28 Channel ADC 4 Digital PSoC Blocks provide
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Full-Duplex UART, SPI Master or Slave
• Connectable to All GPIO Pins Complex Peripherals by Combining Blocks
• Flexible On-Chip Memory 8K Flash Program Storage 50,000 Erase/Write Cycles 512 Bytes SRAM Data Storage In-System Serial Programming ISSP Partial Flash Updates Flexible Protection Modes EEPROM Emulation in Flash
• Complete Development Tools Free Development Software PSoC Designer Full-Featured, In-Circuit Emulator and Programmer Full Speed Emulation Complex Breakpoint Structure 128K Trace Memory
• Precision, Programmable Clocking Internal 24/48 MHz Oscillator Internal Oscillator for Watchdog and Sleep
• Programmable Pin Configurations 25 mA Sink, 10 mA Drive on All GPIO Pull Up, Pull Down, High Z, Strong, or Open Drain Drive Modes on All GPIO Up to 8 Analog Inputs on GPIO Configurable Interrupt on All GPIO
• Versatile Analog Mux Common Internal Analog Bus Simultaneous Connection of IO Combinations Capacitive Sensing Application Capability
• Additional System Resources I2C Master, Slave and Multi-Master to 400 kHz Watchdog and Sleep Timers User-Configurable Low Voltage Detection Integrated Supervisory Circuit On-Chip Precision Voltage Reference

Logic Block Diagram
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234

PSoC Functional Overview

The PSoC family consists of many Mixed-Signal Array with On-Chip Controller devices. These devices are designed to replace multiple traditional MCU-based system components with one low cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture enables the user to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast CPU, Flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.

The PSoC architecture, shown in Figure 1, consists of four main areas the Core, the System Resources, the Digital System, and the Analog System. Configurable global bus resources allow combining all the device resources into a complete custom system. Each CY8C21x34 PSoC device includes four digital blocks and four analog blocks. Depending on the PSoC package, up to 28 general purpose IO GPIO are also included. The GPIO provide access to the global digital and analog interconnects.

The PSoC Core

The PSoC Core is a powerful engine that supports a rich instruction set. It encompasses SRAM for data storage, an interrupt controller, sleep and watchdog timers, and IMO internal main oscillator and ILO internal low speed oscillator . The CPU core, called the M8C, is a powerful processor with speeds up to 24 MHz. The M8C is a four MIPS 8-bit Harvard architecture microprocessor.

System Resources provide the following additional capabilities:
• Digital clocks to increase the flexibility of the PSoC mixed-signal arrays.
• I2C functionality to implement an I2C master and slave.
• An internal voltage reference, MultiMaster, that provides an absolute value of 1.3V to a number of PSoC subsystems.
• A switch mode pump SMP that generates normal operating voltages off a single battery cell.
• Various system resets supported by the M8C.

The Digital System consists of an array of digital PSoC blocks that may be configured into any number of digital peripherals. The digital blocks are connected to the GPIO through a series of global buses that can route any signal to any pin, freeing designs from the constraints of a fixed peripheral controller.

The Analog System consists of four analog PSoC blocks, supporting comparators and analog-to-digital conversion up to 8 bits in precision.

The Digital System The Digital System consists of 4 digital PSoC blocks. Each block is an 8-bit resource that is used alone or combined with other blocks to form 8, 16, 24, and 32-bit peripherals, which are called user module references. Digital peripheral configurations include the following.
• PWMs 8 to 32 bit
• PWMs with Dead band 8 to 32 bit
• Counters 8 to 32 bit
• Timers 8 to 32 bit
• UART 8 bit with selectable parity
• SPI master and slave
• I2C slave and multi-master
• Cyclical Redundancy Checker/Generator 8 to 32 bit
• IrDA
• Pseudo Random Sequence Generators 8 to 32 bit The digital blocks are connected to any GPIO through a series of global buses that can route any signal to any pin. The buses also allow for signal multiplexing and for performing logic operations. This configurability frees your designs from the constraints of a fixed peripheral controller. Digital blocks are provided in rows of four, where the number of blocks varies by PSoC device family. This allows the optimum choice of system resources for your application. Family resources are shown in Table 1 on page

Figure Digital System Block Diagram

Port 3

Port 2
For up-to-date ordering, packaging, and electrical specification information, see the latest PSoC device data sheets on the web at

Application Notes

Application notes are an excellent introduction to the wide variety of possible PSoC designs. They are located here Select Application Notes under the Documentation tab.

Development Kits

PSoC Development Kits are available online from Cypress at and through a growing number of regional and global distributors, which include Arrow, Avnet, Digi-Key, Farnell, Future Electronics, and Newark.

Training

Free PSoC technical training on demand, webinars, and workshops is available online at The training covers a wide variety of topics and skill levels to assist you in your designs.

Cypros Consultants

Certified PSoC Consultants offer everything from technical assistance to completed PSoC designs. To contact or become a PSoC Consultant go to

Solutions Library

Visit our growing library of solution focused designs at Here you can find various application designs that include firmware and hardware design files that enable you to complete your designs quickly.

Technical Support

For assistance with technical issues, search KnowledgeBase articles and forums at If you cannot find an answer to your question, call technical support at

Notes

Limited analog functionality.

Two analog blocks and one CapSense.

Page 4 of 45 [+] Feedback

CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234

Development Tools

PSoC Designer is a Windows-based, integrated development environment for the Programmable System-on-Chip PSoC devices. The PSoC Designer IDE runs on Windows XP or Windows Vista.

This system provides design database management by project, an integrated debugger with In-Circuit Emulator, in-system programming support, and built-in support for third-party assemblers and C compilers.

PSoC Designer also supports C language compilers developed specifically for the devices in the PSoC family.

PSoC Designer Software Subsystems

System-Level View

A drag-and-drop visual embedded system design environment based on PSoC Express. In the system level view you create a model of your system inputs, outputs, and communication interfaces. You define when and how an output device changes state based upon any or all other system devices. Based upon the design, PSoC Designer automatically selects one or more PSoC Mixed-Signal Controllers that match your system requirements.

PSoC Designer generates all embedded code, then compiles and links it into a programming file for a specific PSoC device.

Chip-Level View

The chip-level view is a more traditional Integrated Development Environment IDE based on PSoC Designer Choose a base device to work with and then select different onboard analog and digital components called user modules that use the PSoC blocks. Examples of user modules are ADCs, DACs, Amplifiers, and Filters. Configure the user modules for your chosen application and connect them to each other and to the proper pins. Then generate your project. This prepopulates your project with APIs and libraries that you can use to program your application.

The device editor also supports easy development of multiple configurations and dynamic reconfiguration. Dynamic configuration allows for changing configurations at run time.

Hybrid Designs

You can begin in the system-level view, allow it to choose and configure your user modules, routing, and generate code, then switch to the chip-level view to gain complete control over on-chip resources. All views of the project share a common code editor, builder, and common debug, emulation, and programming tools.

Code Generation Tools

PSoC Designer supports multiple third party C compilers and assemblers. The code generation tools work seamlessly within the PSoC Designer interface and have been tested with a full range of debugging tools. The choice is yours.

Assemblers. The assemblers allow assembly code to merge seamlessly with C code. Link libraries automatically use absolute addressing or are compiled in relative mode, and linked with other software modules to get absolute addressing.

C Language Compilers. C language compilers are available that support the PSoC family of devices. The products allow you to create complete C programs for the PSoC family devices.

The optimizing C compilers provide all the features of C tailored to the PSoC architecture. They come complete with embedded libraries providing port and bus operations, standard keypad and display support, and extended math functionality.

Debugger

The PSoC Designer Debugger subsystem provides hardware in-circuit emulation, allowing you to test the program in a physical system while providing an internal view of the PSoC device. Debugger commands allow the designer to read and program and read and write data memory, read and write I/O registers, read and write CPU registers, set and clear breakpoints, and provide program run, halt, and step control. The debugger also allows the designer to create a trace buffer of registers and memory locations of interest.

Online Help System

The online help system displays online, context-sensitive help for the user. Designed for procedural and quick reference, each functional subsystem has its own context-sensitive help. This system also provides tutorials and links to FAQs and an Online Support Forum to aid the designer in getting started.

In-Circuit Emulator
Programming adapter converts non-DIP package to DIP footprint. Specific details and ordering information for each of the adapters can be found at

Third-Party Tools

Several tools have been specially designed by the following 3rd-party vendors to accompany PSoC devices during development and production. Specific details for each of these tools can be found at under DESIGN RESOURCES >> Evaluation Boards.

Build a PSoC Emulator into Your Board

For details on how to emulate your circuit before going to volume production using an on-chip debug OCD non-production PSoC device, see Application Note AN2323 “Debugging - Build a PSoC Emulator into Your Board”.

Notes Flex-Pod kit includes a practice flex-pod and a practice PCB, in addition to two flex-pods. Foot kit includes surface mount feet that can be soldered to the target PCB.

Page 41 of 45 [+] Feedback
Ordering Information

CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234
Package Ordering

Code Flash Bytes SRAM Bytes Switch Mode Pump Temperature Range Digital Blocks Analog Blocks Digital IO Pins Analog Inputsa Analog Outputs XRES Pin
16 Pin 150-Mil SOIC

CY8C21234-24SXI
8K 512 Yes -40°C to +85°C 4
12[27] 0
16 Pin 150-Mil SOIC Tape and Reel

CY8C21234-24SXIT 8K 512 Yes -40°C to +85°C 4
12[27] 0
20 Pin 210-Mil SSOP

CY8C21334-24PVXI 8K 512 No -40°C to +85°C 4
16[27] 0
20 Pin 210-Mil SSOP Tape and Reel

CY8C21334-24PVXIT 8K 512 No -40°C to +85°C 4
16[27] 0
28 Pin 210-Mil SSOP

CY8C21534-24PVXI 8K 512 No -40°Cto +85°C 4
24[27] 0
28 Pin 210-Mil SSOP Tape and Reel

CY8C21534-24PVXIT 8K 512 No -40°C to +85°C 4
24[27] 0
32 Pin 5x5 mm MAX

CY8C21434-24LFXI 8K 512 No -40°C to +85°C 4
28[27] 0

QFN [27]
32 Pin 5x5 mm MAX QFN CY8C21434-24LFXIT 8K 512 No -40°C to +85°C 4
28[27] 0
b Tape and Reel
32 Pin 5x5 mm MAX QFN CY8C21434-24LKXI 8K 512 No -40°C to +85°C 4
28[27] 0
[28]
32 Pin 5x5 mm MAX QFN CY8C21434-24LKXIT 8K 512 No -40°C to +85°C 4
28[27] 0
[28] Tape and Reel
32 Pin 5x5 mm MAX QFN CY8C21634-24LFXI 8K 512 Yes -40°C to +85°C 4
26[27] 0
[28]
32 Pin 5x5 mm MAX QFN CY8C21634-24LFXIT 8K 512 Yes -40°C to +85°C 4
26[27] 0
[28] Tape and Reel
32 Pin 5x5 mm MAX SAWN QFN
Ordering Code Definitions

CY 8 C 21 xxx-24xx

CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234

Package Type:

Thermal Rating:

PX = PDIP Pb-Free

C = Commercial

SX = SOIC Pb-Free

I = Industrial

PVX = SSOP Pb-Free

E = Extended

LFX/LKX = QFN Pb-Free

AX = TQFP Pb-Free

Speed 24 MHz

Family Code

Technology Code C = CMOS

Marketing Code 8 = Cypress PSoC

Company ID CY = Cypress

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CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234

Document History Page

Document Title Programmable System-on-Chip Document Number 38-12025

Orig. of Change

Submission Date

Description of Change
227340 HMT

See ECN
235992 SFV

See ECN
248572 SFV

See ECN

Changed title to include all part #s. Changed 28-pin SSOP from CY8C21434 to CY8C21534. Changed pin 9 on the 28-pin SSOP from SMP pin to Vss pin. Added SMP block to architecture diagram. Update Electrical Specifications. Added another 32-pin MLF part CY8C21634.
277832 HMT

See ECN

Verify data sheet standards from SFV memo. Add Analog Input Mux to applicable pin outs. Update PSoC Characteristics table. Update diagrams and specs. Final.
285293 HMT

See ECN

Update 2.7V DC GPIO spec. Add Reflow Peak Temp. table.
301739 HMT

See ECN

DC Chip-Level Specification changes. Update links to new CY.com Portal.
Added 32-Pin QFN Sawn pin diagram, package diagram, and ordering infor-
mation.
2273246 UVS/AESA 04/01/08

Added 32 pin thin sawn package diagram.
2618124 OGNE/PYRS 12/09/08
Added Note in Ordering Information section.

Changed title from PSoC Mixed-Signal Array to PSoC

Programmable System-on-Chip
2684145 SNV/AESA 04/06/2009 Updated 32-Pin Sawn QFN package dimension for CY8C21434-24LTXIT

Updated Getting Started, Development Tools, and Designing with PSoC

Designer Sections
2693024 DPT/PYRS 04/16/2009 Updated 32-Pin Sawn QFN package diagram

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CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

PSoC Solutions

General
psoc.cypress.com/solutions

Low Power/Low Voltage
psoc.cypress.com/low-power

Precision Analog
psoc.cypress.com/precision-analog

LCD Drive
psoc.cypress.com/lcd-drive

CAN 2.0b
psoc.cypress.com/can
psoc.cypress.com/usb

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

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PSoC Designer and Programmable System-on-Chip are trademarks and is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are property of the respective corporations. Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. All products and company names mentioned in this document may be the trademarks of their respective holders.
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Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY8C21434-24LCXI Datasheet file may be downloaded here without warranties.

Datasheet ID: CY8C21434-24LCXI 508149