CY7C9335A-270AXC

CY7C9335A-270AXC Datasheet


CY7C9335A

Part Datasheet
CY7C9335A-270AXC CY7C9335A-270AXC CY7C9335A-270AXC (pdf)
Related Parts Information
CY7C9335A-270AXCT CY7C9335A-270AXCT CY7C9335A-270AXCT
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CY7C9335A

SMPTE-259M/DVB-ASI Descrambler/Framer-Controller
• Fully compatible with SMPTE-259M
• Fully compatible with DVB-ASI
• Operates from a single +5V supply
• 100-pin TQFP package
• Decodes 10-bit parallel digital streams for 27M characters/sec 270 Mbits/sec serial
• Operates with CY7B9334 SMPTE deserializer/receiver
• X9 + X4 + 1 descrambler and NRZI-to-NRZ decoder may be bypassed for raw data output

Functional Description

SMPTE-259M Operation

The CY7C9335A is a CMOS integrated circuit designed to decode SMPTE-125M bit-parallel digital characters or other data formats using the SMPTE-259M decoding rules. Following decoding, the characters are framed by locating the 30-bit TRS pattern in the parallel character stream. The framed characters are then output.

The inputs of the CY7C9335A are designed to be directly mated to a CY7B9334 HOTLink receiver, which converts the SMPTE-259M compatible high-speed serial data stream into 10-bit parallel characters.

This device performs both TRS sync detection and framing, data descrambling with the SMPTE-259M X9+X4+1 algorithm, and NRZI-to-NRZ decoding. These functions operate at a 27 MHz character rate. For those systems operating with non-SMPTE-259M compliant video streams or for diagnostic purposes , the descrambler and NRZI decoding functions can be disabled.

DVB-ASI Operation

The CY7C9335A also contains the necessary multiplexers, control inputs and outputs, to control a DVB-ASI-compliant video stream. DVB-ASI operation is enabled through activation of a single input signal. This allows a single serial-to-parallel input port to support both SMPTE and DVB data streams under software or hardware control.

In DVB-ASI mode the CY7C9335A automatically enables both the 8B/10B decoder and multibyte framer present in the CY7B9334 receiver/deserializer. All error detection, fill, and command codes are detected and output by the CY7C9335A.

The CY7C9335A operates from a single +5V supply. It is available in a 100-pin TQFP space saving package.

Logic Block Diagram

BARREL SHIFTER

D9 RVS D8 D7 D6 D5 D4 D3 D2 D1

D0 SC/D

SYNC_EN BYPASS DVB_EN

CKR OE

INPUT REGISTER

NRZI-TO-NRZ DECODER

SMPTE DESCRAMBLER

TRS DETECTOR/FRAMER

OFFSET

MODE MULTIPLEXOR

OUTPUT REGISTER

RF A/B PD9 SVS PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 SC/D

H_SYNC SYNC_ERR

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• San Jose, CA 95134
• 408-943-2600
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Pin Configuration

TQFP Top View

D9 RVS

BYPASS

SYNC_EN

DVB_EN
Ordering Information
Ordering Code CY7C9335A-270AXC CY7C9335A-270AXCT

Package Name A100

Package Type 100-pin Thin Quad Flat Pack 100-pin Thin Quad Flat Pack Tape and Reel

CY7C9335A

Min.
10 0 30

Max. Unit

Operating Range Commercial

Notes All AC parameters are with all outputs switching. The clock period may be extended by up to 90% for a single clock cycle when framing occurs in DVB-ASI mode. Test load b used for this parameter. Test load a used for all other AC parameters.

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Package Diagram

Figure 100-Pin TQFP 14X14X1.4 mm

CY7C9335A
51-85048 *D

All product and company names mentioned in this document are the trademarks of their respective holders.

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Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the
use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not
authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of

Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all
charges.
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CY7C9335A

Document History Page

Document Title CY7C9335A SMPTE-259M/DVB-ASI Descrambler/Framer-Controller Document Number 38-02083

ECN NO. Issue Date

Orig. of Change

Description of Change
129112
12/09/03

LAR Pin-to-pin compatible with CY7C9335
2896245 03/19/10
CGX Updated Ordering information and package diagram.

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Datasheet ID: CY7C9335A-270AXC 508147