CY7C68015A-56LFXC

CY7C68015A-56LFXC Datasheet

CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A

Part	Datasheet
CY7C68015A-56LFXC	CY7C68015A-56LFXC (pdf)

PDF Datasheet Preview
CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A EZ-USB FX2LP USB Microcontroller High Speed USB Peripheral Controller Features CY7C68013A/14A/15A/16A • USB IF High Speed Certified TID # 40460272 • Single Chip Integrated USB Transceiver, Smart SIE, and Enhanced 8051 Microprocessor • Fit, Form, and Function Compatible with the FX2 Pin compatible Object-code-compatible Functionally Compatible FX2LP is a superset • Ultra Low Power ICC No More than 85 mA in any Mode Ideal for bus and battery powered applications • Software 8051 Code Runs from Internal RAM, which is downloaded through USB Internal RAM, which is loaded from EEPROM External memory device 128 pin package • 16 KBytes of On-Chip Code/Data RAM • Four Programmable BULK/INTERRUPT/ISOCHRONOUS Endpoints Buffering options double, triple, and quad • Additional Programmable BULK/INTERRUPT 64 Byte Endpoint • 8-bit or 16-bit External Data Interface • Smart Media Standard ECC Generation • GPIF General Programmable Interface Enables direct connection to most parallel interfaces Programmable waveform descriptors and configuration registers to define waveforms Supports multiple Ready RDY inputs and Control CTL outputs • Integrated, Industry Standard Enhanced 8051 48 MHz, 24 MHz, or 12 MHz CPU operation Four clocks per instruction cycle Two USARTS Three counter/timers Expanded interrupt system Two data pointers • 3.3V Operation with 5V Tolerant Inputs • Vectored USB Interrupts and GPIF/FIFO Interrupts • Separate Data Buffers for the Setup and Data Portions of a CONTROL Transfer • Integrated I2C Controller, Runs at 100 or 400 kHz • Four Integrated FIFOs Integrated glue logic and FIFOs lower system cost Automatic conversion to and from 16-bit buses Master or slave operation Uses external clock or asynchronous strobes Easy interface to ASIC and DSP ICs • Available in Commercial and Industrial Temperature Grade all packages except VFBGA • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A Logic Block Diagram 24 MHz Ext. XTAL FX2LP High performance micro using standard tools with lower-power options Data 8 Address 16 VCC x20 1.5k connected for full speed 8051 Core 12/24/48 MHz, four clocks/cycle Integrated full speed and high speed XCVR USB XCVR CY Smart USB Engine 16 KB RAM Address 16 / Data Bus 8 I2C Master Additional I/Os 24 Ordering Information Table Ordering Information Ordering Code Ideal for battery powered applications CY7C68014A-128AXC CY7C68014A-100AXC CY7C68014A-56PVXC CY7C68014A-56LFXC CY7C68014A-56BAXC CY7C68016A-56LFXC Package Type 128 TQFP Pb-Free 100 TQFP Pb-Free 56 SSOP Pb-Free 56 QFN Pb-Free 56 VFBGA Pb-Free 56 QFN Pb-Free RAM Size # Prog I/Os 8051 Address /Data Busses 16/8 bit Ideal for non-battery powered applications CY7C68013A-128AXC 128 TQFP Pb-Free 16/8 bit CY7C68013A-128AXI 128 TQFP Pb-Free Industrial 16/8 bit CY7C68013A-100AXC 100 TQFP Pb-Free CY7C68013A-100AXI 100 TQFP Pb-Free Industrial CY7C68013A-56PVXC 56 SSOP Pb-Free CY7C68013A-56PVXI 56 SSOP Pb-Free Industrial CY7C68013A-56LFXC 56 QFN Pb-Free CY7C68013A-56LFXI 56 QFN Pb-Free Industrial CY7C68015A-56LFXC 56 QFN Pb-Free CY7C68013A-56BAXC 56 VFBGA Pb-Free CY7C68013A-56LTXC 56 QFN CY7C68013A-56LTXCT 56 QFN CY7C68013A-56LTXI 56 QFN CY7C68014A-56LTXC 56 QFN CY7C68015A-56LTXC 56 QFN Section changed “certified” to “compliant” Table 14 added parameter VIH_X and VIL_X Added Sequence diagrams Section Updated Ordering information with lead-free parts Updated Registry Summary Section 3.12.4:example changed to column 8 from column 9 Updated Figure 14 memory write timing Diagram Updated section reset Updated section ECC Generation D 230713 See ECN KKU Changed Lead free Marketing part numbers in Table 33 as per spec change in E 242398 See ECN TMD Minor Change data sheet posted to the web, F 271169 See ECN Added USB-IF Test ID number Added USB logo Added values for Isusp, Icc, Power Dissipation, Vih_x, Vil_x Changed VCC from + 10% to + 5% Changed E-Pad size to mm x mm Changed PKTEND to FLAGS output propagation delay asynchronous interface in Table 28 from a max value of 70 ns to 115 ns G 316313 See ECN Removed CY7C68013A-56PVXCT part availability Added parts ideal for battery powered applications CY7C68014A, CY7C68016A Provided additional timing restrictions and requirement about the use of PKETEND pin to commit a short one byte/word packet subsequent to committing a packet automatically when in auto mode . Added Min Vcc Ramp Up time 0 to 3.3v H 338901 See ECN Added information about the AUTOPTR1/AUTOPTR2 address timing with regards to data memory read/write timing diagram. Removed TBD for Min value of Clock to FIFO Data Output Propagation Delay tXFD for Slave FIFO Synchronous Read Changed Table 33 to include part CY7C68016A-56LFXC in the part listed for battery powered applications Added register GPCR2 in register summary I 371097 See ECN MON Added timing for strobing RD#/WR# signals when using PortC strobe feature Section J 397239 See ECN Removed XTALINSRC register from register summary. Changed Vcc margins to +10% Added 56-pin VFBGA Pin Package Diagram Added 56-pin VFBGA definition in pin listing Added RDK part number to the Ordering Information table Page 61 of 62 [+] Feedback CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A Document Title CY7C68013A, CY7C68014A, CY7C68015A, CY7C68016A, EZ-USB FX2LP USB Microcontroller High Speed USB Peripheral Controller Document Number 38-08032 Submission Date Orig. of Change Description of Change K 420505 See ECN Remove SLCS from figure in Section Removed indications that SLRD can be asserted simultaneously with SLCS in Section and Section Added Absolute Maximum Temperature Rating for industrial packages in Section Changed number of packages stated in the description in Section to five. Added Table 13 on Thermal Coefficients for various packages L 2064406 See ECN CMCC/ Changed TID number PYRS Removed T0OUT and T1OUT from CY7C68015A/16A Updated tSWR Min value in Figure 20 Updated 56-lead QFN package diagram M 2710327 05/22/2009 DPT Added 56-Pin QFN 8 X 8 mm package diagram Updated ordering information for CY7C68013A-56LTXC, CY7C68013A-56LTXI, CY7C68014A-56LTXC, CY7C68015A-56LTXC, and CY7C68016A-56LTXC parts. Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com PSoC Solutions General psoc.cypress.com/solutions Low Power/Low Voltage psoc.cypress.com/low-power Precision Analog psoc.cypress.com/precision-analog LCD Drive psoc.cypress.com/lcd-drive CAN 2.0b psoc.cypress.com/can psoc.cypress.com/usb Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Page 62 of 62 Purchase of I2C components from Cypress, or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. EZ-USB FX2LP and EZ-USB FX2 are trademarks, and EZ-USB is a registered trademark, of Cypress Semiconductor Corporation. All product and company names mentioned in this document are the trademarks of their respective holders. [+] Feedback

PDF Datasheet Preview

CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A

EZ-USB FX2LP USB Microcontroller High Speed USB Peripheral Controller

Features CY7C68013A/14A/15A/16A
• USB IF High Speed Certified TID # 40460272
• Single Chip Integrated USB Transceiver, Smart SIE, and Enhanced 8051 Microprocessor
• Fit, Form, and Function Compatible with the FX2 Pin compatible Object-code-compatible Functionally Compatible FX2LP is a superset
• Ultra Low Power ICC No More than 85 mA in any Mode Ideal for bus and battery powered applications
• Software 8051 Code Runs from Internal RAM, which is downloaded through USB Internal RAM, which is loaded from EEPROM External memory device 128 pin package
• 16 KBytes of On-Chip Code/Data RAM
• Four Programmable BULK/INTERRUPT/ISOCHRONOUS Endpoints Buffering options double, triple, and quad
• Additional Programmable BULK/INTERRUPT 64 Byte Endpoint
• 8-bit or 16-bit External Data Interface
• Smart Media Standard ECC Generation
• GPIF General Programmable Interface Enables direct connection to most parallel interfaces Programmable waveform descriptors and configuration registers to define waveforms Supports multiple Ready RDY inputs and Control CTL outputs
• Integrated, Industry Standard Enhanced 8051 48 MHz, 24 MHz, or 12 MHz CPU operation Four clocks per instruction cycle Two USARTS Three counter/timers Expanded interrupt system Two data pointers
• 3.3V Operation with 5V Tolerant Inputs
• Vectored USB Interrupts and GPIF/FIFO Interrupts
• Separate Data Buffers for the Setup and Data Portions of a CONTROL Transfer
• Integrated I2C Controller, Runs at 100 or 400 kHz
• Four Integrated FIFOs Integrated glue logic and FIFOs lower system cost Automatic conversion to and from 16-bit buses Master or slave operation Uses external clock or asynchronous strobes Easy interface to ASIC and DSP ICs
• Available in Commercial and Industrial Temperature Grade all packages except VFBGA
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A

Logic Block Diagram
24 MHz Ext. XTAL

FX2LP

High performance micro using standard tools with lower-power options

Data 8

Address 16

VCC x20
1.5k connected for full speed
8051 Core 12/24/48 MHz, four clocks/cycle

Integrated full speed and
high speed XCVR

USB XCVR

CY Smart USB Engine
16 KB RAM

Address 16 / Data Bus 8

I2C Master

Additional I/Os 24
Ordering Information
Table Ordering Information
Ordering Code

Ideal for battery powered applications CY7C68014A-128AXC CY7C68014A-100AXC CY7C68014A-56PVXC CY7C68014A-56LFXC CY7C68014A-56BAXC CY7C68016A-56LFXC

Package Type
128 TQFP Pb-Free 100 TQFP Pb-Free 56 SSOP Pb-Free 56 QFN Pb-Free 56 VFBGA Pb-Free 56 QFN Pb-Free

RAM Size
# Prog I/Os
8051 Address /Data Busses
16/8 bit

Ideal for non-battery powered applications

CY7C68013A-128AXC
128 TQFP Pb-Free
16/8 bit

CY7C68013A-128AXI
128 TQFP Pb-Free Industrial
16/8 bit

CY7C68013A-100AXC
100 TQFP Pb-Free

CY7C68013A-100AXI
100 TQFP Pb-Free Industrial

CY7C68013A-56PVXC
56 SSOP Pb-Free

CY7C68013A-56PVXI
56 SSOP Pb-Free Industrial

CY7C68013A-56LFXC
56 QFN Pb-Free

CY7C68013A-56LFXI
56 QFN Pb-Free Industrial

CY7C68015A-56LFXC
56 QFN Pb-Free

CY7C68013A-56BAXC
56 VFBGA Pb-Free

CY7C68013A-56LTXC
56 QFN

CY7C68013A-56LTXCT
56 QFN

CY7C68013A-56LTXI
56 QFN

CY7C68014A-56LTXC
56 QFN

CY7C68015A-56LTXC
56 QFN
Section changed “certified” to “compliant” Table 14 added parameter VIH_X and VIL_X Added Sequence diagrams Section Updated Ordering information with lead-free parts Updated Registry Summary Section 3.12.4:example changed to column 8 from column 9 Updated Figure 14 memory write timing Diagram Updated section reset Updated section ECC Generation
*D 230713 See ECN KKU Changed Lead free Marketing part numbers in Table 33 as per spec change in
*E 242398 See ECN TMD Minor Change data sheet posted to the web,
*F 271169 See ECN

Added USB-IF Test ID number Added USB logo Added values for Isusp, Icc, Power Dissipation, Vih_x, Vil_x Changed VCC from + 10% to + 5% Changed E-Pad size to mm x mm Changed PKTEND to FLAGS output propagation delay asynchronous interface in Table 28 from a max value of 70 ns to 115 ns
*G 316313 See ECN

Removed CY7C68013A-56PVXCT part availability Added parts ideal for battery powered applications CY7C68014A, CY7C68016A Provided additional timing restrictions and requirement about the use of PKETEND pin to commit a short one byte/word packet subsequent to committing a packet automatically when in auto mode . Added Min Vcc Ramp Up time 0 to 3.3v
*H 338901 See ECN

Added information about the AUTOPTR1/AUTOPTR2 address timing with regards to data memory read/write timing diagram. Removed TBD for Min value of Clock to FIFO Data Output Propagation Delay tXFD for Slave FIFO Synchronous Read Changed Table 33 to include part CY7C68016A-56LFXC in the part listed for battery powered applications Added register GPCR2 in register summary
*I 371097 See ECN MON Added timing for strobing RD#/WR# signals when using PortC strobe feature Section
*J 397239 See ECN
Removed XTALINSRC register from register summary. Changed Vcc margins to +10% Added 56-pin VFBGA Pin Package Diagram Added 56-pin VFBGA definition in pin listing Added RDK part number to the Ordering Information table

Page 61 of 62 [+] Feedback

CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A

Document Title CY7C68013A, CY7C68014A, CY7C68015A, CY7C68016A, EZ-USB FX2LP USB Microcontroller High Speed USB Peripheral Controller Document Number 38-08032

Submission Date

Orig. of Change

Description of Change
*K 420505 See ECN

Remove SLCS from figure in Section Removed indications that SLRD can be asserted simultaneously with SLCS in Section and Section Added Absolute Maximum Temperature Rating for industrial packages in Section Changed number of packages stated in the description in Section to five. Added Table 13 on Thermal Coefficients for various packages
*L 2064406 See ECN

CMCC/ Changed TID number PYRS Removed T0OUT and T1OUT from CY7C68015A/16A

Updated tSWR Min value in Figure 20 Updated 56-lead QFN package diagram
*M 2710327 05/22/2009
DPT Added 56-Pin QFN 8 X 8 mm package diagram Updated ordering information for CY7C68013A-56LTXC, CY7C68013A-56LTXI, CY7C68014A-56LTXC, CY7C68015A-56LTXC, and CY7C68016A-56LTXC parts.

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

PSoC Solutions

General
psoc.cypress.com/solutions

Low Power/Low Voltage
psoc.cypress.com/low-power

Precision Analog
psoc.cypress.com/precision-analog

LCD Drive
psoc.cypress.com/lcd-drive

CAN 2.0b
psoc.cypress.com/can
psoc.cypress.com/usb

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Page 62 of 62

Purchase of I2C components from Cypress, or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. EZ-USB FX2LP and EZ-USB FX2 are trademarks, and EZ-USB is a registered trademark, of Cypress Semiconductor Corporation. All product and company names mentioned in this document are the trademarks of their respective holders.
[+] Feedback

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Datasheet ID: CY7C68015A-56LFXC 508142