CY7C64113-PVC

CY7C64113-PVC Datasheet

CY7C64013 CY7C64113

Part	Datasheet
CY7C64113-PVC	CY7C64113-PVC (pdf)

Related Parts	Information
CY7C64013-SC	CY7C64013-SC

PDF Datasheet Preview
CY7C64013 CY7C64113 Full-Speed USB 12-Mbps Function • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 TABLE OF CONTENTS CY7C64013 CY7C64113 FEATURES 5 FUNCTIONAL OVERVIEW 6 PIN CONFIGURATIONS 8 PRODUCT SUMMARY TABLES 9 Pin Assignments 9 I/O Register Summary 9 Instruction Set Summary 11 PROGRAMMING MODEL 12 14-Bit Program Counter PC 12 Program Memory Organization 13 8-Bit Accumulator A 14 8-Bit Temporary Register X 14 8-Bit Program Stack Pointer PSP 14 Data Memory Organization 14 8-Bit Data Stack Pointer DSP 15 Address Modes 15 Data Immediate 15 Direct 15 Indexed 15 CLOCKING 16 RESET 16 Power-On Reset POR 16 Watchdog Reset WDR 16 SUSPEND MODE 17 GENERAL-PURPOSE I/O GPIO PORTS 18 GPIO Configuration Port 19 GPIO Interrupt Enable Ports 20 DAC PORT 20 DAC Isink Registers 21 DAC Port Interrupts 22 12-BIT FREE-RUNNING TIMER 22 I2C AND HAPI CONFIGURATION REGISTER 23 I2C-COMPATIBLE CONTROLLER 24 HARDWARE ASSISTED PARALLEL INTERFACE HAPI 25 PROCESSOR STATUS AND CONTROL REGISTER 26 INTERRUPTS 27 Interrupt Vectors 29 Interrupt Latency 29 USB Bus Reset Interrupt 30 Timer Interrupt 30 USB Endpoint Interrupts 30 Page 2 of 51 CY7C64013 CY7C64113 TABLE OF CONTENTS DAC Interrupt 30 GPIO/HAPI Interrupt 30 I2C Interrupt 31 USB OVERVIEW 32 USB Serial Interface Engine SIE 32 USB Enumeration 32 USB Upstream Port Status and Control 32 USB SERIAL INTERFACE ENGINE OPERATION 33 USB Device Address 33 USB Device Endpoints 33 USB Control Endpoint Mode Register 34 USB Non-Control Endpoint Mode Registers 35 USB Endpoint Counter Registers Endpoint Mode/Count Registers Update and Locking Mechanism 36 USB MODE TABLES 38 REGISTER SUMMARY 42 SAMPLE SCHEMATIC 43 ABSOLUTE MAXIMUM RATINGS 44 ELECTRICAL CHARACTERISTICS FOSC = 6 MHZ OPERATING TEMPERATURE = 0 TO 70°C, VCC = 4.0V TO 5.25V 44 SWITCHING CHARACTERISTICS fOSC = MHz 46 ORDERING INFORMATION 48 PACKAGE DIAGRAMS 48 Page 3 of 51 CY7C64013 CY7C64113 LIST OF FIGURES Figure Clock Oscillator On-Chip Circuit 17 Figure Watchdog Reset 18 Figure Block Diagram of a GPIO 19 Figure Port 0 Data 19 Figure Port 1 Data 19 Figure Port 2 Data 19 Figure Port 3 Data 20 Figure GPIO Configuration 20 Figure Port 0 Interrupt Enable 21 Figure Port 1 Interrupt Enable 21 Figure Port 2 Interrupt Enable 21 Figure Port 3 Interrupt Enable 21 Figure Block Diagram of a DAC Pin 22 Figure DAC Port 22 Figure DAC Sink Register 22 Figure DAC Port Interrupt 23 Figure DAC Port Interrupt 23 Figure Timer LSB Register 23 Figure Timer MSB Register 24 Figure Timer Block Diagram 24 Figure HAPI/I2C Configuration 24 Figure I2C Data 25 Figure I2C Status and Control 25 Figure Processor Status and Control Register 28 Figure Global Interrupt Enable Register 29 Figure USB Endpoint Interrupt Enable 29 Figure Interrupt Controller Function Diagram 30 Figure GPIO Interrupt Structure 32 Figure USB Status and Control 34 Figure USB Device Address 34 Figure USB Device Endpoint Zero Mode Registers 35 Figure USB Non-Control Device Endpoint Mode Registers 36 Figure USB Endpoint Counter 36 Figure Token/Data Packet Flow 38 Figure Clock 47 Figure USB Data Signal 47 Figure HAPI Read by External Interface from USB Microcontroller 47 Figure HAPI Write by External Device to USB 48 Page 4 of 51 CY7C64013 CY7C64113 LIST OF TABLES Table Pin Assignments 10 Table I/O Register Summary 10 Table Instruction Set Summary 12 Table GPIO Port Output Control Truth Table and Interrupt Polarity 20 Table HAPI Port Configuration 25 Table I2C Port Configuration 25 Table I2C Status and Control Register Bit Definitions 26 Table Port 2 Pin and HAPI Configuration Bit Definitions 27 Table Interrupt Vector Assignments 31 Table Control Bit Definition for Upstream Port 34 Table Memory Allocation for Endpoints 35 Table USB Register Mode Encoding 39 Table Details of Modes for Differing Traffic Conditions 41 Page 5 of 51 CY7C64013 CY7C64113 • Full-speed USB Microcontroller • 8-bit USB Optimized Microcontroller Harvard architecture 6-MHz external clock source 12-MHz internal CPU clock 48-MHz internal clock • Internal memory 256 bytes of RAM 8 KB of PROM CY7C64013, CY7C64113 • Integrated Master/Slave I2C-compatible Controller 100 kHz enabled through General-Purpose I/O GPIO pins • Hardware Assisted Parallel Interface HAPI for data transfer to external devices • I/O ports Three GPIO ports Port 0 to 2 capable of sinking 7 mA per pin typical An additional GPIO port 3 capable of sinking 12 mA per pin typical for high current requirements LEDs Higher current drive achievable by connecting multiple GPIO pins together to drive a common output Each GPIO port can be configured as inputs with internal pull-ups or open drain outputs or traditional CMOS outputs A Digital to Analog Conversion DAC port with programmable current sink outputs is available on the CY7C64113 devices Maskable interrupts on all I/O pins • 12-bit free-running timer with one microsecond clock ticks • Watchdog Timer WDT • Internal Power-On Reset POR • USB Specification Compliance Conforms to USB Specification, Version Conforms to USB HID Specification, Version Supports up to five user configured endpoints Up to four 8-byte data endpoints Up to two 32-byte data endpoints Integrated USB transceivers • Improved output drivers to reduce EMI • Operating voltage from 4.0V to 5.5V DC • Operating temperature from 0 to 70 degrees Celsius CY7C64013 available in 28-pin SOIC and 28-pin PDIP packages CY7C64113 available in 48-pin SSOP packages • Industry-standard programmer support Page 6 of 51 CY7C64013 CY7C64113 Functional Overview The CY7C64013 and CY7C64113 are 8-bit One Time Programmable microcontrollers that are designed for full-speed USB applications. The instruction set has been optimized specifically for USB operations, although the microcontrollers can be used for a variety of non-USB embedded applications. GPIO The CY7C64013 features 19 GPIO pins to support USB and other applications. The I/O pins are grouped into three ports P0[7:0], P1[2:0], P2[6:2], P3[2:0] where each port can be configured as inputs with internal pull-ups, open drain outputs, or traditional CMOS outputs. There are 16 GPIO pins Ports 0 and 1 which are rated at 7 mA typical sink current. Port 3 pins are rated at 12 mA typical sink current, a current sufficient to drive LEDs. Multiple GPIO pins can be connected together to drive a single output for more drive current capacity. Additionally, each GPIO can be used to generate a GPIO interrupt to the microcontroller. All of the GPIO interrupts share the same “GPIO” interrupt vector. The CY7C64113 has 32 GPIO pins P0[7:0], P1[7:0], P2[7:0], P3[7:0] The 64113 has four programmable sink current I/O pins DAC pins P4[7,2:0] . Every DAC pin includes an integrated pullup resistor. When a ‘1’ is written to a DAC I/O pin, the output current sink is disabled and the output pin is driven HIGH by the internal pull-up resistor. When a ‘0’ is written to a DAC I/O pin, the internal pull-up resistor is disabled and the output pin provides the programmed amount of sink current. A DAC I/O pin can be used as an input with an internal pull-up by writing a ‘1’ to the pin. The sink current for each DAC I/O pin can be individually programmed to one of 16 values using dedicated Isink registers. DAC bits P4[1:0] can be used as high-current outputs with a programmable sink current range of to 16 mA typical . DAC bits P4[7,2] have a programmable current sink range of to mA typical . Multiple DAC pins can be connected together to drive a single output that requires more sink current capacity. Each I/O pin can be used to generate a DAC interrupt to the microcontroller. Also, the interrupt polarity for each DAC I/O pin is individually programmable. Clock The microcontroller uses an external 6-MHz crystal and an internal oscillator to provide a reference to an internal PLL-based clock generator. This technology allows the customer application to use an inexpensive 6-MHz fundamental crystal that reduces the clock-related noise emissions EMI . A PLL clock generator provides the 6-, 12-, and 48-MHz clock signals for distribution within the microcontroller. Memory The CY7C64013 and CY7C64113 have 8 KB of PROM. Power on Reset, Watchdog and Free running Time These parts include power-on reset logic, a Watchdog timer, and a 12-bit free-running timer. The power-on reset POR logic detects when power is applied to the device, resets the logic to a known state, and begins executing instructions at PROM address 0x0000. The Watchdog timer is used to ensure the microcontroller recovers after a period of inactivity. The firmware may become inactive for a variety of reasons, including errors in the code or a hardware failure such as waiting for an interrupt that never occurs. I2C and HAPI Interface The microcontroller can communicate with external electronics through the GPIO pins. An I2C-compatible interface accommodates a 100-kHz serial link with an external device. There is also a Hardware Assisted Parallel Interface HAPI which can be used to transfer data to an external device. Timer The free-running 12-bit timer clocked at 1 MHz provides two interrupt sources, 128-µs and 1.024-ms. The timer can be used to measure the duration of an event under firmware control by reading the timer at the start of the event and after the event is complete. The difference between the two readings indicates the duration of the event in microseconds. The upper four bits of the timer are latched into an internal register when the firmware reads the lower eight bits. A read from the upper four bits actually reads data from the internal register, instead of the timer. This feature eliminates the need for firmware to try to compensate if the upper four bits increment immediately after the lower eight bits are read. Interrupts The microcontroller supports 11 maskable interrupts in the vectored interrupt controller. Interrupt sources include the USB Bus Reset interrupt, the 128-µs bit 6 and 1.024-ms bit 9 outputs from the free-running timer, five USB endpoints, the DAC port, the GPIO ports, and the I2C-compatible master mode interface. The timer bits cause an interrupt if enabled when the bit toggles from LOW ‘0’ to HIGH The USB endpoints interrupt after the USB host has written data to the endpoint FIFO or after the USB controller sends a packet to the USB host. The DAC ports have an additional level of masking that allows the user to select which DAC inputs can cause a DAC interrupt. The GPIO ports also have a level of masking to select which GPIO inputs can cause a GPIO interrupt. For additional flexibility, the input transition polarity that causes an interrupt is programmable for each pin of the DAC port. Input transition polarity can be programmed for each GPIO port as part of the port configuration. The interrupt polarity can be rising edge ‘0’ to ‘1’ or falling edge ‘1’ to Page 7 of 51 Logic Block Diagram 6-MHz crystal 48 MHz Clock Divider 12 MHz 12-MHz 8-bit CPU Ordering Information Ordering Code CY7C64013-SC CY7C64013-PC CY7C64113-PVC PROM Size 8 KB 8 KB 8 KB Package Name Package Type 28-Pin 300-Mil SOIC 28-Pin 300-Mil PDIP 48-Pin 300-Mil SSOP Operating Range Commercial Commercial Commercial Page 48 of 51 Package Diagrams 48-Lead Shrunk Small Outline Package O48 CY7C64013 CY7C64113 28-Lead 300-Mil PDIP P21 51-85061-C DIMENSIONS IN INCHES[MM] REFERENCE JEDEC MO-095 MIN. MAX. P28.3 PZ28.3 PART # STANDARD PKG. LEAD FREE PKG. SEATING PLANE 3° MIN. 51-85014-C Page 49 of 51 CY7C64013 CY7C64113 Package Diagrams continued 28-Lead 300-Mil Molded SOIC S21 PIN 1 ID DIMENSIONS IN INCHES[MM] MIN. MAX. REFERENCE JEDEC MO-119 PACKAGE WEIGHT 0.85gms PART # S28.3 STANDARD PKG. SZ28.3 LEAD FREE PKG. SEATING PLANE 51-85026-*C All product and company names mentioned in this document are the trademarks of their respective holders. Page 50 of 51 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C64013 CY7C64113 Document History Page Document Title CY7C64013, CY7C64113 Full-Speed USB 12 Mbps Function Document Number 38-08001 Issue Date Orig. of Change Description of Change

PDF Datasheet Preview

CY7C64013 CY7C64113

Full-Speed USB 12-Mbps Function
• 3901 North First Street
• San Jose, CA 95134
• 408-943-2600

TABLE OF CONTENTS

CY7C64013 CY7C64113

FEATURES 5

FUNCTIONAL OVERVIEW 6

PIN CONFIGURATIONS 8

PRODUCT SUMMARY TABLES 9

Pin Assignments 9 I/O Register Summary 9 Instruction Set Summary 11

PROGRAMMING MODEL 12
14-Bit Program Counter PC 12

Program Memory Organization 13
8-Bit Accumulator A 14 8-Bit Temporary Register X 14 8-Bit Program Stack Pointer PSP 14

Data Memory Organization 14
8-Bit Data Stack Pointer DSP 15 Address Modes 15

Data Immediate 15 Direct 15 Indexed 15

CLOCKING 16

RESET 16

Power-On Reset POR 16 Watchdog Reset WDR 16

SUSPEND MODE 17

GENERAL-PURPOSE I/O GPIO PORTS 18

GPIO Configuration Port 19 GPIO Interrupt Enable Ports 20

DAC PORT 20

DAC Isink Registers 21 DAC Port Interrupts 22
12-BIT FREE-RUNNING TIMER 22 I2C AND HAPI CONFIGURATION REGISTER 23 I2C-COMPATIBLE CONTROLLER 24

HARDWARE ASSISTED PARALLEL INTERFACE HAPI 25

PROCESSOR STATUS AND CONTROL REGISTER 26

INTERRUPTS 27

Interrupt Vectors 29 Interrupt Latency 29 USB Bus Reset Interrupt 30 Timer Interrupt 30 USB Endpoint Interrupts 30

Page 2 of 51

CY7C64013 CY7C64113

TABLE OF CONTENTS
DAC Interrupt 30 GPIO/HAPI Interrupt 30 I2C Interrupt 31 USB OVERVIEW 32 USB Serial Interface Engine SIE 32 USB Enumeration 32 USB Upstream Port Status and Control 32 USB SERIAL INTERFACE ENGINE OPERATION 33 USB Device Address 33 USB Device Endpoints 33 USB Control Endpoint Mode Register 34 USB Non-Control Endpoint Mode Registers 35 USB Endpoint Counter Registers Endpoint Mode/Count Registers Update and Locking Mechanism 36 USB MODE TABLES 38 REGISTER SUMMARY 42 SAMPLE SCHEMATIC 43 ABSOLUTE MAXIMUM RATINGS 44 ELECTRICAL CHARACTERISTICS FOSC = 6 MHZ OPERATING TEMPERATURE = 0 TO 70°C, VCC = 4.0V TO 5.25V 44 SWITCHING CHARACTERISTICS fOSC = MHz 46 ORDERING INFORMATION 48 PACKAGE DIAGRAMS 48

Page 3 of 51

CY7C64013 CY7C64113

LIST OF FIGURES

Figure Clock Oscillator On-Chip Circuit 17 Figure Watchdog Reset 18 Figure Block Diagram of a GPIO 19 Figure Port 0 Data 19 Figure Port 1 Data 19 Figure Port 2 Data 19 Figure Port 3 Data 20 Figure GPIO Configuration 20 Figure Port 0 Interrupt Enable 21 Figure Port 1 Interrupt Enable 21 Figure Port 2 Interrupt Enable 21 Figure Port 3 Interrupt Enable 21 Figure Block Diagram of a DAC Pin 22 Figure DAC Port 22 Figure DAC Sink Register 22 Figure DAC Port Interrupt 23 Figure DAC Port Interrupt 23 Figure Timer LSB Register 23 Figure Timer MSB Register 24 Figure Timer Block Diagram 24 Figure HAPI/I2C Configuration 24 Figure I2C Data 25 Figure I2C Status and Control 25 Figure Processor Status and Control Register 28 Figure Global Interrupt Enable Register 29 Figure USB Endpoint Interrupt Enable 29 Figure Interrupt Controller Function Diagram 30 Figure GPIO Interrupt Structure 32 Figure USB Status and Control 34 Figure USB Device Address 34 Figure USB Device Endpoint Zero Mode Registers 35 Figure USB Non-Control Device Endpoint Mode Registers 36 Figure USB Endpoint Counter 36 Figure Token/Data Packet Flow 38 Figure Clock 47 Figure USB Data Signal 47 Figure HAPI Read by External Interface from USB Microcontroller 47 Figure HAPI Write by External Device to USB 48

Page 4 of 51

CY7C64013 CY7C64113

LIST OF TABLES

Table Pin Assignments 10 Table I/O Register Summary 10 Table Instruction Set Summary 12 Table GPIO Port Output Control Truth Table and Interrupt Polarity 20 Table HAPI Port Configuration 25 Table I2C Port Configuration 25 Table I2C Status and Control Register Bit Definitions 26 Table Port 2 Pin and HAPI Configuration Bit Definitions 27 Table Interrupt Vector Assignments 31 Table Control Bit Definition for Upstream Port 34 Table Memory Allocation for Endpoints 35 Table USB Register Mode Encoding 39 Table Details of Modes for Differing Traffic Conditions 41

Page 5 of 51

CY7C64013 CY7C64113
• Full-speed USB Microcontroller
• 8-bit USB Optimized Microcontroller

Harvard architecture 6-MHz external clock source 12-MHz internal CPU clock 48-MHz internal clock
• Internal memory 256 bytes of RAM 8 KB of PROM CY7C64013, CY7C64113
• Integrated Master/Slave I2C-compatible Controller 100 kHz enabled through General-Purpose I/O GPIO pins
• Hardware Assisted Parallel Interface HAPI for data transfer to external devices
• I/O ports Three GPIO ports Port 0 to 2 capable of sinking 7 mA per pin typical An additional GPIO port 3 capable of sinking 12 mA per pin typical for high current requirements LEDs Higher current drive achievable by connecting multiple GPIO pins together to drive a common output Each GPIO port can be configured as inputs with internal pull-ups or open drain outputs or traditional CMOS outputs A Digital to Analog Conversion DAC port with programmable current sink outputs is available on the CY7C64113 devices Maskable interrupts on all I/O pins
• 12-bit free-running timer with one microsecond clock ticks
• Watchdog Timer WDT
• Internal Power-On Reset POR
• USB Specification Compliance Conforms to USB Specification, Version Conforms to USB HID Specification, Version Supports up to five user configured endpoints

Up to four 8-byte data endpoints Up to two 32-byte data endpoints Integrated USB transceivers
• Improved output drivers to reduce EMI
• Operating voltage from 4.0V to 5.5V DC
• Operating temperature from 0 to 70 degrees Celsius CY7C64013 available in 28-pin SOIC and 28-pin PDIP packages CY7C64113 available in 48-pin SSOP packages
• Industry-standard programmer support

Page 6 of 51

CY7C64013 CY7C64113

Functional Overview

The CY7C64013 and CY7C64113 are 8-bit One Time Programmable microcontrollers that are designed for full-speed USB applications. The instruction set has been optimized specifically for USB operations, although the microcontrollers can be used for a variety of non-USB embedded applications.

GPIO

The CY7C64013 features 19 GPIO pins to support USB and other applications. The I/O pins are grouped into three ports P0[7:0], P1[2:0], P2[6:2], P3[2:0] where each port can be configured as inputs with internal pull-ups, open drain outputs, or traditional CMOS outputs. There are 16 GPIO pins Ports 0 and 1 which are rated at 7 mA typical sink current. Port 3 pins are rated at 12 mA typical sink current, a current sufficient to drive LEDs. Multiple GPIO pins can be connected together to drive a single output for more drive current capacity. Additionally, each GPIO can be used to generate a GPIO interrupt to the microcontroller. All of the GPIO interrupts share the same “GPIO” interrupt vector.

The CY7C64113 has 32 GPIO pins P0[7:0], P1[7:0], P2[7:0], P3[7:0]

The 64113 has four programmable sink current I/O pins DAC pins P4[7,2:0] . Every DAC pin includes an integrated pullup resistor. When a ‘1’ is written to a DAC I/O pin, the output current sink is disabled and the output pin is driven HIGH by the internal pull-up resistor. When a ‘0’ is written to a DAC I/O pin, the internal pull-up resistor is disabled and the output pin provides the programmed amount of sink current. A DAC I/O pin can be used as an input with an internal pull-up by writing a ‘1’ to the pin.

The sink current for each DAC I/O pin can be individually programmed to one of 16 values using dedicated Isink registers. DAC bits P4[1:0] can be used as high-current outputs with a programmable sink current range of to 16 mA typical . DAC bits P4[7,2] have a programmable current sink range of to mA typical . Multiple DAC pins can be connected together to drive a single output that requires more sink current capacity. Each I/O pin can be used to generate a DAC interrupt to the microcontroller. Also, the interrupt polarity for each DAC I/O pin is individually programmable.

Clock

The microcontroller uses an external 6-MHz crystal and an internal oscillator to provide a reference to an internal PLL-based clock generator. This technology allows the customer application to use an inexpensive 6-MHz fundamental crystal that reduces the clock-related noise emissions EMI . A PLL clock generator provides the 6-, 12-, and 48-MHz clock signals for distribution within the microcontroller.

Memory

The CY7C64013 and CY7C64113 have 8 KB of PROM.

Power on Reset, Watchdog and Free running Time

These parts include power-on reset logic, a Watchdog timer, and a 12-bit free-running timer. The power-on reset POR logic detects when power is applied to the device, resets the logic to a known state, and begins executing instructions at PROM address 0x0000. The Watchdog timer is used to ensure the microcontroller recovers after a period of inactivity. The firmware may become inactive for a variety of reasons, including errors in the code or a hardware failure such as waiting for an interrupt that never occurs.

I2C and HAPI Interface The microcontroller can communicate with external electronics through the GPIO pins. An I2C-compatible interface accommodates a 100-kHz serial link with an external device. There is also a Hardware Assisted Parallel Interface HAPI which can be used to transfer data to an external device.

Timer

The free-running 12-bit timer clocked at 1 MHz provides two interrupt sources, 128-µs and 1.024-ms. The timer can be used to measure the duration of an event under firmware control by reading the timer at the start of the event and after the event is complete. The difference between the two readings indicates the duration of the event in microseconds. The upper four bits of the timer are latched into an internal register when the firmware reads the lower eight bits. A read from the upper four bits actually reads data from the internal register, instead of the timer. This feature eliminates the need for firmware to try to compensate if the upper four bits increment immediately after the lower eight bits are read.

Interrupts

The microcontroller supports 11 maskable interrupts in the vectored interrupt controller. Interrupt sources include the USB Bus Reset interrupt, the 128-µs bit 6 and 1.024-ms bit 9 outputs from the free-running timer, five USB endpoints, the DAC port, the GPIO ports, and the I2C-compatible master mode interface. The timer bits cause an interrupt if enabled when the bit toggles from LOW ‘0’ to HIGH The USB endpoints interrupt after the USB host has written data to the endpoint FIFO or after the USB controller sends a packet to the USB host. The DAC ports have an additional level of masking that allows the user to select which DAC inputs can cause a DAC interrupt. The GPIO ports also have a level of masking to select which GPIO inputs can cause a GPIO interrupt. For additional flexibility, the input transition polarity that causes an interrupt is programmable for each pin of the DAC port. Input transition polarity can be programmed for each GPIO port as part of the port configuration. The interrupt polarity can be rising edge ‘0’ to ‘1’ or falling edge ‘1’ to

Page 7 of 51

Logic Block Diagram
6-MHz crystal
48 MHz

Clock Divider
12 MHz
12-MHz 8-bit CPU
Ordering Information
Ordering Code CY7C64013-SC CY7C64013-PC CY7C64113-PVC

PROM Size 8 KB 8 KB 8 KB

Package Name

Package Type 28-Pin 300-Mil SOIC 28-Pin 300-Mil PDIP 48-Pin 300-Mil SSOP

Operating Range

Commercial

Commercial

Commercial

Page 48 of 51

Package Diagrams
48-Lead Shrunk Small Outline Package O48

CY7C64013 CY7C64113
28-Lead 300-Mil PDIP P21
51-85061-*C

DIMENSIONS IN INCHES[MM] REFERENCE JEDEC MO-095

MIN. MAX.

P28.3 PZ28.3

PART # STANDARD PKG. LEAD FREE PKG.

SEATING PLANE
3° MIN.
51-85014-*C

Page 49 of 51

CY7C64013 CY7C64113

Package Diagrams continued
28-Lead 300-Mil Molded SOIC S21

PIN 1 ID

DIMENSIONS IN INCHES[MM]

MIN. MAX.

REFERENCE JEDEC MO-119 PACKAGE WEIGHT 0.85gms

PART # S28.3 STANDARD PKG. SZ28.3 LEAD FREE PKG.

SEATING PLANE
51-85026-*C

All product and company names mentioned in this document are the trademarks of their respective holders.

Page 50 of 51

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

CY7C64013 CY7C64113

Document History Page

Document Title CY7C64013, CY7C64113 Full-Speed USB 12 Mbps Function Document Number 38-08001

Issue Date

Orig. of Change

Description of Change

More datasheets: 45114-010030-3749/14-S-6 | 45116-010030-3749/16-S-3 | 45130-010030-3749/30-S-6 | 45130-010030-3749/30-S-3 | 45130-010030-3749/30-D-3 | 45130-010030-3749/30-D-6 | 882260 SL002 | 882260 SL001 | 882260 SL005 | CY7C64013-SC

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY7C64113-PVC Datasheet file may be downloaded here without warranties.

Datasheet ID: CY7C64113-PVC 508127