CY7C4421V/4201V/4211V/4221V CY7C4231V/4241V/4251V
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CY7C4231V-15JC (pdf) |
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64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs CY7C4421V/4201V/4211V/4221V CY7C4231V/4241V/4251V Low-Voltage 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Featuresb • Space saving 32-pin 7 mm x 7 mm TQFP • High-speed, low-power, first-in, first-out FIFO memories • 32-pin PLCC • Available in Pb-Free Packages • 64 x 9 CY7C4421V • 256 x 9 CY7C4201V • 512 x 9 CY7C4211V • 1K x 9 CY7C4221V • 2K x 9 CY7C4231V • 4K x 9 CY7C4241V • 8K x 9 CY7C4251V • High-speed 66-MHz operation 15-ns read/write cycle time • Low power ICC = 20 mA • 3.3V operation for low power consumption and easy integration into low-voltage systems • 5V-tolerant inputs VIH max = 5V • Fully asynchronous and simultaneous read and write operation • Empty, Full, and Programmable Almost Empty and Almost Full status flags • TTL compatible • Output Enable OE pin • Independent read and write enable pins • Center power and ground pins for reduced noise Functional Description The CY7C42X1V are high-speed, low-power, FIFO memories with clocked read and write interfaces. All are nine bits wide. Programmable features include Almost Full/Almost Empty flags. These FIFOs provide solutions for a wide variety of data buffering needs, including high-speed data acquisition, multiprocessor interfaces, and communications buffering. These FIFOs have 9-bit input and output ports that are controlled by separate clock and enable signals. The input port is controlled by a Free-Running Clock WCLK and two Write Enable pins WEN1, WEN2/LD . When WEN1 is LOW and WEN2/LD is HIGH, data is written into the FIFO on the rising edge of the WCLK signal. While WEN1, WEN2/LD is held active, data is continually written into the FIFO on each WCLK cycle. The output port is controlled in a similar manner by a Free-Running Read Clock RCLK and two Read Enable Pins REN1, REN2 . In addition, the CY7C42X1V has an Output Enable Pin OE . The Read RCLK and Write WCLK clocks may be tied together for single-clock operation or the two clocks may be run independently for asynchronous read/write applications. Clock frequencies up to 66 MHz are achievable. Depth expansion is possible using one enable input for system control, while the other enable is controlled by expansion logic to direct the flow of data. • Width expansion capability Logic Block Diagram D0 − 8 Pin Configuration PLCC Top View WCLK WEN1 WEN2/LD WRITE CONTROL INPUT REGISTER Dual Port RAM Array 64 x 9 FLAG PROGRAM REGISTER FLAG LOGIC EF PAE PAF D1 D0 PAF PAE REN1 RCLK REN2 4 3 2 1 323130 14 1516 17 1819 20 WEN1 WCLK WEN2/LD VCC Q8 Q7 Q6 Q5 WRITE POINTER 8Kx 9 READ POINTER Ordering Information 256 x 9 Low Voltage Synchronous FIFO Speed ns Ordering Code Package Name Package Type CY7C4201V-15AC 32-Lead Thin Quad Flatpack CY7C4201V-15AXC 32-Lead Pb-Free Thin Quad Flatpack CY7C4201V-25AC 32-Lead Thin Quad Flatpack 512 x 9 Low Voltage Synchronous FIFO Speed ns Ordering Code Package Name Package Type CY7C4211V-15AC 32-Lead Thin Quad Flatpack CY7C4211V-15JC 32-Lead Plastic Leaded Chip Carrier CY7C4211V-15AI 32-Lead Thin Quad Flatpack CY7C4211V-15AXI 32-Lead Pb-Free Thin Quad Flatpack CY7C4211V-25AC 32-Lead Thin Quad Flatpack CY7C4211V-25JC 32-Lead Plastic Leaded Chip Carrier 1K x 9 Low Voltage Synchronous FIFO Speed ns Ordering Code Package Name Package Type CY7C4221V-15AC 32-Lead Thin Quad Flatpack CY7C4221V-15JC 32-Lead Plastic Leaded Chip Carrier CY7C4221V-25AC 32-Lead Thin Quad Flatpack 2K x 9 Low Voltage Synchronous FIFO Speed ns Ordering Code Package Name Package Type CY7C4231V-15AC 32-Lead Thin Quad Flatpack CY7C4231V-15JXC 32-Lead Pb-Free Plastic Leaded Chip Carrier CY7C4231V-15JC 32-Lead Plastic Leaded Chip Carrier CY7C4231V-25AXC 32-Lead Pb-Free Thin Quad Flatpack CY7C4231V-25AC 32-Lead Thin Quad Flatpack CY7C4231V-25JC 32-Lead Plastic Leaded Chip Carrier Operating Range Commercial Operating Range Commercial Industrial Commercial Operating Range Commercial Operating Range Commercial Commercial Page 15 of 18 CY7C4421V/4201V/4211V/4221V CY7C4231V/4241V/4251V Ordering Information continued 4K x 9 Low Voltage Synchronous FIFO Speed ns Ordering Code Package Name Package Type CY7C4241V-15AC 32-Lead Thin Quad Flatpack CY7C4241V-15AXC 32-Lead Pb-Free Thin Quad Flatpack CY7C4241V-15JXC 32-Lead Pb-Free Plastic Leaded Chip Carrier CY7C4241V-15JC 32-Lead Plastic Leaded Chip Carrier CY7C4241V-25AC 32-Lead Thin Quad Flatpack CY7C4241V-25AXC 32-Lead Pb-Free Thin Quad Flatpack CY7C4241V-25JC 32-Lead Plastic Leaded Chip Carrier 8K x 9 Low Voltage Synchronous FIFO Speed ns Ordering Code Package Name Package Type CY7C4251V-15AC 32-Lead Thin Quad Flatpack CY7C4251V-15AXC 32-Lead Pb-Free Thin Quad Flatpack CY7C4251V-15JC 32-Lead Plastic Leaded Chip Carrier CY7C4251V-25AC 32-Lead Thin Quad Flatpack CY7C4251V-25AXC 32-Lead Pb-Free Thin Quad Flatpack Operating Range Commercial Commercial Operating Range Commercial Package Diagrams 32-Lead Thin Plastic Quad Flatpack 7 x 7 x mm A32 32-Lead Pb-Free Thin Plastic Quad Flatpack 7 x 7 x mm A32 51-85063-*B Page 16 of 18 CY7C4421V/4201V/4211V/4221V CY7C4231V/4241V/4251V Package Diagrams continued 32-Lead Plastic Leaded Chip Carrier J65 32-Lead Pb-Free Plastic Leaded Chip Carrier J65 51-85002-*B All product and company names mentioned in this document are the trademarks of their respective holders. Page 17 of 18 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY7C4421V/4201V/4211V/4221V CY7C4231V/4241V/4251V Document History Page Document Title Low-Voltage 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Document Number 38-06010 Orig. of ECN NO. Issue Date Change Description of Change 106471 09/10/01 SZV Change from Spec number 38-00622 to 38-06010 127857 08/25/03 FSG Fixed empty flag timing diagram Fixed switching waveform diagram typo 384573 See ECN ESH Added Pb-Free logo to top of front page Inserted industrial temperature range into operating range Added parts CY7C4251V-25AXC, CY7C4251V-15AXC, CY7C4241V-15AXC, CY7C4241V-15JXC, CY7C4241V-25XC, CY7C4201V-15AXC to ordering information. Page 18 of 18 |
More datasheets: HLMP6305AGR | MV6400A | HLMP6505AZR | U2739M-BFT | B39181B3501H810 | CY7C4251V-15AC | CY7C4241V-15JXC | CY7C4241V-15JC | CY7C4251V-15AXCT | CY7C4251V-25AXC |
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