CY7C419/21/25/29/33256/512/1K/2K/4K x 9 Asynchronous FIFO
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CY7C419-10JC (pdf) |
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CY7C419-15JXC |
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CY7C419-15VXCT |
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CY7C419-15JXCT |
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CY7C419-10JXCT |
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CY7C419-10JXC |
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CY7C419-15VXC |
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CY7C419/21/25/29/33256/512/1K/2K/4K x 9 Asynchronous FIFO CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO • Asynchronous first-in first-out FIFO buffer memories • 256 x 9 CY7C419 • 512 x 9 CY7C421 • 1K x 9 CY7C425 • 2K x 9 CY7C429 • 4K x 9 CY7C433 • Dual-ported RAM cell • High speed 50 MHz read and write independent of depth and width • Low operating power ICC = 35 mA • Empty and full flags Half Full flag in standalone • TTL compatible • Retransmit in standalone • Expandable in width • PLCC, 7x7 TQFP, SOJ, 300-mil, and 600-mil DIP • Pb-free packages available • Pin compatible and functionally equivalent to IDT7200, IDT7201, IDT7202, IDT7203, IDT7204, AM7200, AM7201, AM7202, AM7203, and AM7204 Logic Block Diagram Functional Description The CY7C419, CY7C420/1, CY7C424/5, CY7C428/9, and CY7C432/3 are first-in first-out FIFO memories offered in 600-mil wide and 300-mil wide packages. There are 256, 512, 1,024, 2,048, and 4,096 words respectively by 9 bits wide. Each FIFO memory is organized such that the data is read in the same sequential order that it was written. Full and empty flags are provided to prevent overrun and underrun. Three additional pins are also provided to facilitate unlimited expansion in width, depth, or both. The depth expansion technique steers the control signals from one device to another in parallel. This eliminates the serial addition of propagation delays, so that throughput is not reduced. Data is steered in a similar manner. The read and write operations may be asynchronous each can occur at a rate of 50 MHz. The write operation occurs when the write W signal is LOW. Read occurs when read R goes LOW. The nine data outputs go to the high impedance state when R is HIGH. A Half Full HF output flag that is valid in the standalone and width expansion configurations is provided. In the depth expansion configuration, this pin provides the expansion out XO information that is used to tell the next FIFO that it is activated. In the standalone and width expansion configurations, a LOW on the retransmit RT input causes the FIFOs to retransmit the data. Read enable R and write enable W must both be HIGH during retransmit, and then R is used to access the data. The CY7C419, CY7C420, CY7C421, CY7C424, CY7C425, CY7C428, CY7C429, CY7C432, and CY7C433 are fabricated using an advanced 0.65-micron P-well CMOS technology. Input ESD protection is greater than 2000V and latch-up is prevented by careful layout and guard rings. • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback Pin Configurations Figure 32-Pin PLCC/LCC CY7C419/21/25/29/33 Figure 32-PIn TQFP Figure 28-Pin DIP Table Selection Guide 4K x 9 Frequency MHz Maximum Access Time ns ICC1 mA Page 2 of 17 [+] Feedback CY7C419/21/25/29/33 Maximum Rating Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested.[1] Storage Temperature to +150°C Ambient Temperature with Power Applied.. to +125°C Supply Voltage to Ground to +7.0V DC Voltage Applied to Outputs in High Z State to +7.0V DC Input Voltage to +7.0V Output Current, into Outputs LOW ............................ 20 mA Static Discharge >2000V per Method 3015 Latch-Up Current >200 mA Operating Range Range Commercial Ambient Temperature[2] 0°C to + 70°C VCC 5V ± 10% Industrial to +85°C 5V ± 10% Power 1.0W Electrical Characteristics Over the Operating Range[3] Ordering Information Speed ns 10 30 40 65 Ordering Code Package Type A32 J65 P21 V21 A32 J65 V21 J65 P21 V21 J65 P21 V21 J65 P21 J65 P21 J65 P21 V21 J65 P21 V21 J65 Package Type 32-Pin Thin Plastic Quad Flatpack 32-Pin Plastic Leaded Chip Carrier 32-Pin Pb-Free Plastic Leaded Chip Carriers 28-Pin 300-Mil Molded DIP 28-Pin 300-Mil Molded SOJ 32-Pin Thin Plastic Quad Flatpack 32-Pin Pb-Free Thin Plastic Quad Flatpack 32-Pin Plastic Leaded Chip Carrier 32-Pin Plastic Leaded Chip Carrier 28-Pin 300-Mil Molded SOJ 32-Pin Plastic Leaded Chip Carrier 32-Pin Pb-Free Plastic Leaded Chip Carriers 28-Pin 300-Mil Molded DIP 28-Pin 300-Mil Molded SOJ 28-Pin 300-Mil Pb-Free Molded SOJ 32-Pin Plastic Leaded Chip Carrier 32-Pin Plastic Leaded Chip Carrier 32-Pin Plastic Leaded Chip Carrier 28-Pin 300-Mil Molded DIP 28-Pin 300-Mil Molded SOJ 32-Pin Plastic Leaded Chip Carrier 28-Pin 300-Mil Molded DIP 32-Pin Plastic Leaded Chip Carrier 28-Pin 300-Mil Molded DIP 32-Pin Plastic Leaded Chip Carrier 32-Pin Plastic Leaded Chip Carrier 28-Pin 300-Mil Molded DIP 28-Pin 300-Mil Molded SOJ 32-Pin Plastic Leaded Chip Carrier 32-Pin Plastic Leaded Chip Carrier 28-Pin 300-Mil Molded DIP 28-Pin 300-Mil Molded SOJ 32-Pin Plastic Leaded Chip Carrier Operating Range Commercial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Page 13 of 17 [+] Feedback CY7C419/21/25/29/33 Package Diagrams Figure 32-Pin Thin Plastic Quad Flat Pack A32 51-85063 Figure 32-Pin Plastic Leaded Chip Carrier J65 51-85002 51-85063-*B 51-85002-*B Page 14 of 17 [+] Feedback CY7C419/21/25/29/33 Package Diagrams continued Figure 28-Pin 300-Mil PDIP P21 51-85014 SEE LEAD END OPTION DIMENSIONS IN INCHES [MM] MIN. MAX. REFERENCE JEDEC MO-095 PACKAGE WEIGHT gms LEAD END OPTION LEAD #1, 14, 15 & 28 SEATING PLANE SEE LEAD END OPTION 3° MIN. 51-85014-*D Page 15 of 17 [+] Feedback CY7C419/21/25/29/33 Package Diagrams continued Figure 28-Pin 300-Mil Molded SOJ V21 51-85031 51-85031-*C Page 16 of 17 [+] Feedback CY7C419/21/25/29/33 Document History Page Document Title CY7C419, CY7C421, CY7C425, CY7C429, CY7C433, 256/512/1K/2K/4Kx9 Asynchronous FIFO Document Number 38-06001 ECN No. Added Pb-Free Logo Added to Part-Ordering Information CY7C419-15VXC, 2623658 VKN/PYRS 12/17/08 Added CY7C421-20JXI Removed CY7C419/25/29/33 from the ordering information table Removed 26-Lead CerDIP, 32-Lead RLCC, 28-Lead molded DIP packages from the data sheet Removed Military Information Sales, Solutions and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. 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Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 17 of 17 [+] Feedback |
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