CY7C136-25JXI

CY7C136-25JXI Datasheet

CY7C132, CY7C136 CY7C136A, CY7C142,

Part	Datasheet
CY7C136-25JXI	CY7C136-25JXI (pdf)

Related Parts	Information
CY7C136-55JXC	CY7C136-55JXC
CY7C146-25JXC	CY7C146-25JXC
CY7C146-25JXCT	CY7C146-25JXCT
CY7C136-55JXCT	CY7C136-55JXCT
CY7C136-25NXC	CY7C136-25NXC
CY7C136-25JXCT	CY7C136-25JXCT
CY7C146-55JXC	CY7C146-55JXC
CY7C146-55JXCT	CY7C146-55JXCT
CY7C136-55NXCT	CY7C136-55NXCT
CY7C136-55NXC	CY7C136-55NXC
CY7C136-25JXC	CY7C136-25JXC
CY7C136A-55NXI	CY7C136A-55NXI
CY7C136A-55JXI	CY7C136A-55JXI
CY7C136A-55NXIT	CY7C136A-55NXIT

PDF Datasheet Preview
CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 2K x 8 Dual-Port Static RAM • True dual-ported memory cells that enable simultaneous reads of the same memory location • 2K x 8 organization • micron CMOS for optimum speed and power • High speed access 15 ns • Low operating power ICC = 110 mA maximum • Fully asynchronous operation • Automatic power-down • Master CY7C132/CY7C136/CY7C136A[1] easily expands data bus width to 16 or more bits using slave CY7C142/CY7C146 • BUSY output flag on CY7C132/CY7C136/CY7C136A BUSY input on CY7C142/CY7C146 • INT flag for port to port communication 52-Pin PLCC/PQFP versions • CY7C136, CY7C136A, and CY7C146 available in 52-pin PLCC and 52-pin PQFP packages • Pb-free packages available Functional Description The CY7C132, CY7C136, CY7C136A, CY7C142, and CY7C146 are high speed CMOS 2K x 8 dual-port static RAMs. Two ports are provided to permit independent access to any location in memory. The CY7C132, CY7C136, and CY7C136A can be used as either a standalone 8-bit dual-port static RAM or as a MASTER dual-port RAM, in conjunction with the CY7C142/CY7C146 SLAVE dual-port device. They are used in systems that require 16-bit or greater word widths. This is the solution to applications that require shared or buffered data, such as cache memory for DSP, bit-slice, or multiprocessor designs. Each port has independent control pins chip enable CE , write enable R/W , and output enable OE . BUSY flags are provided on each port. In addition, an interrupt flag INT is provided on each port of the 52-pin PLCC version. BUSY signals that the port is trying to access the same location currently being accessed by the other port. On the PLCC version, INT is an interrupt flag indicating that data is placed in an unique location 7FF for the left port and 7FE for the right port . An automatic power-down feature is controlled independently on each port by the chip enable CE pins. Logic Block Diagram R/WL CEL R/WR CER I/O7L I/O0L BUSYL[2] A 10L I/O CONTROL I/O CONTROL ADDRESS DECODER MEMORY ARRAY ADDRESS DECODER I/O7R I/O0R BUSYR A 10R INTL[3] CEL OEL R/WL ARBITRATION LOGIC 7C132/7C136 ONLY AND INTERRUPTLOGIC 7C136/7C146 ONLY CER OER R/WR INTR Notes CY7C136 and CY7C136A are functionally identical. CY7C132/CY7C136/CY7C136A Master BUSY is open drain output and requires pull up resistor. CY7C142/CY7C146 Slave BUSY is input. Open drain outputs pull up resistor required. Ordering Information Speed ns 25 Ordering Code CY7C136-25JXC CY7C136-25NC CY7C136-25NXC CY7C136-25JXI CY7C136-55JXC Package Diagram 51-85004 51-85042 51-85004 51-85004 Package Type 52-Pin Plastic Leaded Chip Carrier Pb-Free 52-Pin Plastic Quad Flatpack 52-Pin Plastic Quad Flatpack Pb-Free 52-Pin Plastic Leaded Chip Carrier Pb-Free 52-Pin Plastic Leaded Chip Carrier Pb-Free CY7C136-55NXC 51-85042 52-Pin Plastic Quad Flatpack Pb-Free CY7C136A-55JXI CY7C136A-55NXI 55 CY7C146-55JXC 51-85004 51-85042 51-85004 52-Pin Plastic Leaded Chip Carrier Pb-Free 52-Pin Plastic Quad Flatpack Pb-Free 52-Pin Plastic Leaded Chip Carrier Pb-Free Ordering Code Definitions CY 7 C XXX XX AS X C Temperature Grade Commercial Pb-free RoHS Compliant Package J = PLCC N = PQFP Speed grade 25/55 ns Density Technology CMOS Family Dual-port SRAM Company ID CY = Cypress Operating Range Commercial Industrial Commercial Industrial Commercial Page 13 of 17 CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Package Diagrams Figure 52-Pin Plastic Leaded Chip Carrier, 51-85004 Figure 52-Pin Plastic Quad Flatpack, 51-85042 51-85004 C 51-85042 C Page 14 of 17 CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Acronyms Acronym CMOS I/O PLCC SRAM TQFP TTL Description complementary metal oxide semiconductor input/output plastic leaded chip carrier static random access memory thin quad plastic flatpack transistion transistor logic Document Conventions Units of Measure Table Symbol °C MHz µA mA mV ns pF V W Unit of Measure degree Celsius mega hertz microamperes milliamperes millivolts nanoseconds ohms picofarad volts watts Page 15 of 17 CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Document History Page Document Title CY7C132, CY7C136, CY7C136A, CY7C142, CY7C146 2K x 8 Dual-Port Static RAM Document Number 38-06031 Submission Orig. of Change Description of Change 110171 10/21/01 SZV Change from Spec number 38-06031 128959 09/03/03 JFU Added CY7C136-55NI to Order Information 236748 See ECN Added Pb-Free parts to ordering information: CY7C136-25JXC, CY7C136-25NXC, CY7C136-55JXC, CY7C136-55NXC, CY7C136-55JXI, CY7C136-55NXI, CY7C146-25JXC, CY7C146-55JXC D 2623658 12/17/08 VKN/PYRS Added CY7C136-25JXI part Removed CY7C132/142 from the Ordering information table Removed 48-Pin DIP and 52-Pin Square LCC package from the data sheet E 2678221 03/24/2009 VKN/AESA Added CY7C136A-55JXI, and CY7C136A-55NXI parts. 2896210 03/22/2010 RAME Updated Ordering Information Updated Package Diagrams G 3094400 11/24/10 ADMU Removed partnumber CY7C136-55JI from the ordering information table. Added ordering code definitions. H 3403652 10/14/2011 ADMU Removed pruned part CY7C136-55JC, CY7C136-55NC from Ordering Information Updated Package Diagrams. Updated template. Page 16 of 17 CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com PSoC Solutions General psoc.cypress.com/solutions Low Power/Low Voltage psoc.cypress.com/low-power Precision Analog psoc.cypress.com/precision-analog LCD Drive psoc.cypress.com/lcd-drive CAN 2.0b psoc.cypress.com/can psoc.cypress.com/usb Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 17 of 17

PDF Datasheet Preview

CY7C132, CY7C136 CY7C136A, CY7C142,

CY7C146
2K x 8 Dual-Port Static RAM
• True dual-ported memory cells that enable simultaneous reads of the same memory location
• 2K x 8 organization
• micron CMOS for optimum speed and power
• High speed access 15 ns
• Low operating power ICC = 110 mA maximum
• Fully asynchronous operation
• Automatic power-down
• Master CY7C132/CY7C136/CY7C136A[1] easily expands data
bus width to 16 or more bits using slave CY7C142/CY7C146
• BUSY output flag on CY7C132/CY7C136/CY7C136A BUSY input on CY7C142/CY7C146
• INT flag for port to port communication 52-Pin PLCC/PQFP versions
• CY7C136, CY7C136A, and CY7C146 available in 52-pin PLCC and 52-pin PQFP packages
• Pb-free packages available

Functional Description

The CY7C132, CY7C136, CY7C136A, CY7C142, and CY7C146 are high speed CMOS 2K x 8 dual-port static RAMs. Two ports are provided to permit independent access to any location in memory. The CY7C132, CY7C136, and CY7C136A can be used as either a standalone 8-bit dual-port static RAM or as a MASTER dual-port RAM, in conjunction with the CY7C142/CY7C146 SLAVE dual-port device. They are used in systems that require 16-bit or greater word widths. This is the solution to applications that require shared or buffered data, such as cache memory for DSP, bit-slice, or multiprocessor designs.

Each port has independent control pins chip enable CE , write enable R/W , and output enable OE . BUSY flags are provided on each port. In addition, an interrupt flag INT is provided on each port of the 52-pin PLCC version. BUSY signals that the port is trying to access the same location currently being accessed by the other port. On the PLCC version, INT is an interrupt flag indicating that data is placed in an unique location 7FF for the left port and 7FE for the right port .

An automatic power-down feature is controlled independently on each port by the chip enable CE pins.

Logic Block Diagram

R/WL CEL

R/WR CER

I/O7L

I/O0L

BUSYL[2]

A 10L

I/O CONTROL

I/O CONTROL

ADDRESS DECODER

MEMORY ARRAY

ADDRESS DECODER

I/O7R I/O0R

BUSYR A 10R

INTL[3]

CEL OEL R/WL

ARBITRATION LOGIC
7C132/7C136 ONLY AND

INTERRUPTLOGIC 7C136/7C146 ONLY

CER OER R/WR

INTR

Notes CY7C136 and CY7C136A are functionally identical.

CY7C132/CY7C136/CY7C136A Master BUSY is open drain output and requires pull up resistor. CY7C142/CY7C146 Slave BUSY is input. Open drain outputs pull up resistor required.
Ordering Information

Speed ns 25
Ordering Code

CY7C136-25JXC CY7C136-25NC CY7C136-25NXC CY7C136-25JXI CY7C136-55JXC

Package Diagram 51-85004 51-85042
51-85004 51-85004

Package Type
52-Pin Plastic Leaded Chip Carrier Pb-Free 52-Pin Plastic Quad Flatpack 52-Pin Plastic Quad Flatpack Pb-Free 52-Pin Plastic Leaded Chip Carrier Pb-Free 52-Pin Plastic Leaded Chip Carrier Pb-Free

CY7C136-55NXC
51-85042 52-Pin Plastic Quad Flatpack Pb-Free

CY7C136A-55JXI CY7C136A-55NXI 55 CY7C146-55JXC
51-85004 51-85042 51-85004
52-Pin Plastic Leaded Chip Carrier Pb-Free 52-Pin Plastic Quad Flatpack Pb-Free 52-Pin Plastic Leaded Chip Carrier Pb-Free
Ordering Code Definitions CY 7 C XXX XX AS X C

Temperature Grade Commercial

Pb-free RoHS Compliant

Package J = PLCC N = PQFP Speed grade 25/55 ns Density Technology CMOS Family Dual-port SRAM Company ID CY = Cypress

Operating Range

Commercial

Industrial Commercial

Industrial Commercial

Page 13 of 17

CY7C132, CY7C136

CY7C136A, CY7C142, CY7C146

Package Diagrams

Figure 52-Pin Plastic Leaded Chip Carrier, 51-85004

Figure 52-Pin Plastic Quad Flatpack, 51-85042
51-85004 *C
51-85042 *C

Page 14 of 17

CY7C132, CY7C136

CY7C136A, CY7C142, CY7C146

Acronyms

Acronym CMOS I/O PLCC SRAM TQFP TTL

Description complementary metal oxide semiconductor input/output plastic leaded chip carrier static random access memory thin quad plastic flatpack transistion transistor logic

Document Conventions

Units of Measure

Table

Symbol °C MHz µA mA mV ns
pF V W

Unit of Measure degree Celsius mega hertz microamperes milliamperes millivolts nanoseconds ohms picofarad volts watts

Page 15 of 17

CY7C132, CY7C136

CY7C136A, CY7C142, CY7C146

Document History Page

Document Title CY7C132, CY7C136, CY7C136A, CY7C142, CY7C146 2K x 8 Dual-Port Static RAM Document Number 38-06031

Submission Orig. of

Change

Description of Change
110171 10/21/01

SZV Change from Spec number 38-06031
128959 09/03/03

JFU Added CY7C136-55NI to Order Information
236748 See ECN
Added Pb-Free parts to ordering information:

CY7C136-25JXC, CY7C136-25NXC, CY7C136-55JXC, CY7C136-55NXC,

CY7C136-55JXI, CY7C136-55NXI, CY7C146-25JXC, CY7C146-55JXC
*D 2623658 12/17/08 VKN/PYRS Added CY7C136-25JXI part Removed CY7C132/142 from the Ordering information table Removed 48-Pin DIP and 52-Pin Square LCC package from the data sheet
*E 2678221 03/24/2009 VKN/AESA Added CY7C136A-55JXI, and CY7C136A-55NXI parts.
2896210 03/22/2010 RAME Updated Ordering Information

Updated Package Diagrams
*G 3094400 11/24/10 ADMU Removed partnumber CY7C136-55JI from the ordering information table. Added ordering code definitions.
*H 3403652 10/14/2011 ADMU Removed pruned part CY7C136-55JC, CY7C136-55NC from Ordering Information Updated Package Diagrams. Updated template.

Page 16 of 17

CY7C132, CY7C136

CY7C136A, CY7C142, CY7C146

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

PSoC Solutions

General
psoc.cypress.com/solutions

Low Power/Low Voltage
psoc.cypress.com/low-power

Precision Analog
psoc.cypress.com/precision-analog

LCD Drive
psoc.cypress.com/lcd-drive

CAN 2.0b
psoc.cypress.com/can
psoc.cypress.com/usb

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

All products and company names mentioned in this document may be the trademarks of their respective holders.

Page 17 of 17

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY7C136-25JXI Datasheet file may be downloaded here without warranties.

Datasheet ID: CY7C136-25JXI 508085