CY7C197N
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CY7C197N-25PXC (pdf) |
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CY7C197N 256 K x 1 Static RAM 256 K x 1 Static RAM • High speed 25 ns • CMOS for optimum speed/power • Low active power 880 mW • Low standby power 220 mW • Transistor-transistor logic TTL -compatible inputs and outputs • Automatic power-down when deselected Functional Description The CY7C197N is a high-performance CMOS static RAM organized as 256 K words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable CE and three-state drivers. The CY7C197N has an automatic power-down feature, reducing the power consumption by 75% when deselected. Writing to the device is accomplished when the Chip Enable CE and Write Enable WE inputs are both LOW. Data on the input pin DIN is written into the memory location specified on the address pins A0 through A17 . Reading the device is accomplished by taking chip enable CE LOW while Write Enable WE remains HIGH. Under these conditions the contents of the memory location specified on the address pins will appear on the data output DOUT pin. The output pin stays in a high-impedance state when Chip Enable CE is HIGH or Write Enable WE is LOW. The CY7C197N uses a die coat to insure alpha immunity. Logic Block Diagram DI ROW DECODER SENSE AMPS INPUT BUFFER A16 A17 1024 x 256 ARRAY A3 A4 COLUMN DECODER POWER DOWN A5 A6 A7 A8 A9 A10 A11 A12 CE WE • San Jose, CA 95134-1709 • 408-943-2600 CY7C197N Contents Pin Configurations 3 Selection Guide 3 Maximum Ratings 4 Operating Range 4 Electrical Characteristics 4 Capacitance 4 Switching Characteristics 5 Switching Waveforms 6 Typical DC and AC Characteristics 8 CY7C197N Truth Table 9 Ordering Information 9 Ordering Code Definitions 9 Package Diagram 10 Acronyms 11 Document Conventions 11 Units of Measure 11 Document History Page 12 Sales, Solutions, and Legal Information 13 Worldwide Sales and Design Support 13 Products 13 PSoC Solutions 13 Page 2 of 13 Pin Configurations Figure 24-pin DIP Top View A0 A1 A2 A3 A4 A5 A6 A7 A8 DOUT WE 6 7C197 19 VCC A17 A16 A15 A14 A13 A12 A11 A10 A9 DIN CE Selection Guide Description Maximum access time ns Maximum operating current mA Maximum standby current mA CY7C197N -25 95 30 Page 3 of 13 CY7C197N Maximum Ratings Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested. Storage temperature °C to +150 °C Ambient temperature with power applied °C to +125 °C Supply voltage to ground potential Pin 24 to Pin V to V DC voltage applied to outputs in High Z state[1] V to VCC + V Electrical Characteristics DC input V to VCC + V Output current into outputs LOW 20 mA Static discharge > 2001 V per MIL-STD-883, Method 3015 Latch up > 200 mA Operating Range Range Commercial Ambient Temperature 0 °C to +70 °C VCC 5 V ± 10% Over the Operating Range Parameter Output HIGH voltage Output LOW voltage Input HIGH voltage Input LOW voltage[1] Input load current Output leakage current Output short circuit current[2] VCC operating supply current ISB1 Automatic CE power-down inputs[3] ISB2 Automatic CE power-down inputs[3] Test Conditions VCC = Min, IOH = mA VCC = Min, IOL=12.0 mA Ordering Information Speed ns Ordering Code Package Diagram Package Type CY7C197N-25PXC 51-85013 24-pin 300-Mil Molded DIP Pb-free Contact your local sales representative regarding availability of these parts. Ordering Code Definitions CY 7C 197N - 25 PX C C = Temperature range Commercial PX = 24-pin molded DIP Pb-free 25 = Speed grade 197N = 256 K x 1 architecture Family 7C = Fast asynchronous SRAM Company ID CY = Cypress Operating Range Commercial Page 9 of 13 Package Diagram Figure 24-pin 300-Mil PDIP 51-85013 CY7C197N 51-85013 *C Page 10 of 13 CY7C197N Acronyms Acronym CE CMOS DIP I/O PDIP SRAM TTL WE Description chip enable complementary metal oxide semiconductor dual inline package input/output plastic dual inline package static random access memory transistor-transistor logic write enable Document Conventions Units of Measure Symbol % °C mA MHz mV mW ns pF V W µA Unit of Measure percent degree Celsius milliamperes megahertz millivolts milliwatts nanoseconds picofarads volts ohms watts microamperes Page 11 of 13 CY7C197N Document History Page Document Title CY7C197N, 256 K x 1 Static RAM Document Number 001-06495 ECN NO. Submission Orig. of Change Description of Change 424111 See ECN NXR New Data Sheet 2958594 06/22/10 AJU The EOL Prune part number CY7C197N-45PXC removed & Updated package diagram. 3095450 11/25/2010 AJU Updated template. Added Acronyms, Document Conventions, and Ordering Code Definitions Removed information. Changed posting to external web. 3246053 05/02/2011 PRAS Updated in new template. 3270287 07/01/2011 AJU Fixed units in Electrical Characteristics table. Page 12 of 13 CY7C197N Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Automotive Clocks & Buffers Interface Lighting & Power Control Memory Optical & Image Sensing PSoC Touch Sensing USB Controllers Wireless/RF cypress.com/go/automotive cypress.com/go/clocks cypress.com/go/interface cypress.com/go/powerpsoc cypress.com/go/plc cypress.com/go/memory cypress.com/go/image cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB cypress.com/go/wireless PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 13 of 13 |
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