CY7C1420BV18-250BZC

CY7C1420BV18-250BZC Datasheet

CY7C1416BV18, CY7C1427BV18 CY7C1418BV18, CY7C1420BV18

Part	Datasheet
CY7C1420BV18-250BZC	CY7C1420BV18-250BZC (pdf)

Related Parts	Information
CY7C1418BV18-250BZC	CY7C1418BV18-250BZC
CY7C1418BV18-250BZXC	CY7C1418BV18-250BZXC
CY7C1420BV18-200BZC	CY7C1420BV18-200BZC
CY7C1418BV18-250BZI	CY7C1418BV18-250BZI
CY7C1418BV18-167BZC	CY7C1418BV18-167BZC
CY7C1418BV18-267BZXC	CY7C1418BV18-267BZXC
CY7C1420BV18-200BZCT	CY7C1420BV18-200BZCT

PDF Datasheet Preview
CY7C1416BV18, CY7C1427BV18 CY7C1418BV18, CY7C1420BV18 36-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 • 267 MHz clock for high bandwidth • 2-word burst for reducing address bus frequency • Double Data Rate DDR interfaces data transferred at 534 MHz at 267 MHz for DDR-II • Two input clocks K and K for precise DDR timing SRAM uses rising edges only • Two input clocks for output data C and C to minimize clock skew and flight time mismatches • Echo clocks CQ and CQ simplify data capture in high-speed systems • Synchronous internally self-timed writes • DDR-II operates with cycle read latency when DLL is enabled • Operates as a DDR-I device with 1 cycle read latency in DLL off mode • 1.8V core power supply with HSTL inputs and outputs • Variable drive HSTL output buffers • Expanded HSTL output voltage • Available in 165-Ball FBGA package 15 x 17 x mm • Offered in both in Pb-free and non Pb-free packages • JTAG compatible test access port • Delay Lock Loop DLL for accurate data placement The CY7C1416BV18, CY7C1427BV18, CY7C1418BV18, and CY7C1420BV18 are 1.8V Synchronous Pipelined SRAM equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Addresses for read and write are latched on alternate rising edges of the input K clock. Write data is registered on the rising edges of both K and K. Read data is driven on the rising edges of C and C if provided, or on the rising edge of K and K if C/C are not provided. Each address location is associated with two 8-bit words in the case of CY7C1416BV18 and two 9-bit words in the case of CY7C1427BV18 that burst sequentially into or out of the device. The burst counter always starts with a “0” internally in the case of CY7C1416BV18 and CY7C1427BV18. On CY7C1418BV18 and CY7C1420BV18, the burst counter takes in the least significant bit of the external address and bursts two 18-bit words in the case of CY7C1418BV18 and two 36-bit words in the case of CY7C1420BV18 sequentially into or out of the device. Asynchronous inputs include an output impedance matching input ZQ . Synchronous data outputs Q, sharing the same physical pins as the data inputs D are tightly matched to the two output echo clocks CQ/CQ, eliminating the need for separately capturing data from each individual DDR SRAM in the system design. Output data clocks C/C enable maximum system clocking and data synchronization flexibility. All synchronous inputs pass through input registers controlled by the K or K input clocks. All data outputs pass through output registers controlled by the C or C or K or K in a single clock domain input clocks. Writes are conducted with on-chip synchronous self-timed write circuitry. Configurations CY7C1416BV18 4M x 8 CY7C1427BV18 4M x 9 CY7C1418BV18 2M x 18 CY7C1420BV18 1M x 36 Selection Guide Description Maximum Operating Frequency Maximum Operating Current 267 MHz 250 MHz 250 725 760 825 200 MHz 200 600 620 675 167 MHz 167 500 525 570 Unit MHz mA • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback Logic Block Diagram CY7C1416BV18 CY7C1416BV18, CY7C1427BV18 CY7C1418BV18, CY7C1420BV18 A 20:0 K DOFF Address Register CLK Gen. VREF R/W NWS[1:0] Control Logic Ordering Information Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or visit for actual products offered. Speed MHz Ordering Code Package Diagram Package Type Operating Range 267 CY7C1416BV18-267BZC 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Commercial CY7C1427BV18-267BZC CY7C1418BV18-267BZC CY7C1420BV18-267BZC CY7C1416BV18-267BZXC 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free CY7C1427BV18-267BZXC CY7C1418BV18-267BZXC CY7C1420BV18-267BZXC CY7C1416BV18-267BZI 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Industrial CY7C1427BV18-267BZI CY7C1418BV18-267BZI CY7C1420BV18-267BZI CY7C1416BV18-267BZXI 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free CY7C1427BV18-267BZXI CY7C1418BV18-267BZXI CY7C1420BV18-267BZXI 250 CY7C1416BV18-250BZC 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Commercial CY7C1427BV18-250BZC CY7C1418BV18-250BZC CY7C1420BV18-250BZC CY7C1416BV18-250BZXC 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free CY7C1427BV18-250BZXC CY7C1418BV18-250BZXC CY7C1420BV18-250BZXC CY7C1416BV18-250BZI 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Industrial CY7C1427BV18-250BZI Ordering Information continued Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or visit for actual products offered. Speed MHz Ordering Code Package Diagram Package Type Operating Range 200 CY7C1416BV18-200BZC 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Commercial CY7C1427BV18-200BZC CY7C1418BV18-200BZC CY7C1420BV18-200BZC CY7C1416BV18-200BZXC 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free CY7C1427BV18-200BZXC CY7C1418BV18-200BZXC CY7C1420BV18-200BZXC CY7C1416BV18-200BZI 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Industrial CY7C1427BV18-200BZI CY7C1418BV18-200BZI CY7C1420BV18-200BZI CY7C1416BV18-200BZXI 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free CY7C1427BV18-200BZXI CY7C1418BV18-200BZXI CY7C1420BV18-200BZXI 167 CY7C1416BV18-167BZC 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Commercial CY7C1427BV18-167BZC CY7C1418BV18-167BZC CY7C1420BV18-167BZC CY7C1416BV18-167BZXC 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free CY7C1427BV18-167BZXC CY7C1418BV18-167BZXC CY7C1420BV18-167BZXC CY7C1416BV18-167BZI 51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Industrial CY7C1427BV18-167BZI

PDF Datasheet Preview

CY7C1416BV18, CY7C1427BV18 CY7C1418BV18, CY7C1420BV18
36-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description
• 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36
• 267 MHz clock for high bandwidth
• 2-word burst for reducing address bus frequency
• Double Data Rate DDR interfaces data transferred at 534 MHz at 267 MHz for DDR-II
• Two input clocks K and K for precise DDR timing SRAM uses rising edges only
• Two input clocks for output data C and C to minimize clock skew and flight time mismatches
• Echo clocks CQ and CQ simplify data capture in high-speed systems
• Synchronous internally self-timed writes
• DDR-II operates with cycle read latency when DLL is enabled
• Operates as a DDR-I device with 1 cycle read latency in DLL off mode
• 1.8V core power supply with HSTL inputs and outputs
• Variable drive HSTL output buffers
• Expanded HSTL output voltage
• Available in 165-Ball FBGA package 15 x 17 x mm
• Offered in both in Pb-free and non Pb-free packages
• JTAG compatible test access port
• Delay Lock Loop DLL for accurate data placement

The CY7C1416BV18, CY7C1427BV18, CY7C1418BV18, and CY7C1420BV18 are 1.8V Synchronous Pipelined SRAM equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Addresses for read and write are latched on alternate rising edges of the input K clock. Write data is registered on the rising edges of both K and K. Read data is driven on the rising edges of C and C if provided, or on the rising edge of K and K if C/C are not provided. Each address location is associated with two 8-bit words in the case of CY7C1416BV18 and two 9-bit words in the case of CY7C1427BV18 that burst sequentially into or out of the device. The burst counter always starts with a “0” internally in the case of CY7C1416BV18 and CY7C1427BV18. On CY7C1418BV18 and CY7C1420BV18, the burst counter takes in the least significant bit of the external address and bursts two 18-bit words in the case of CY7C1418BV18 and two 36-bit words in the case of CY7C1420BV18 sequentially into or out of the device.

Asynchronous inputs include an output impedance matching input ZQ . Synchronous data outputs Q, sharing the same physical pins as the data inputs D are tightly matched to the two output echo clocks CQ/CQ, eliminating the need for separately capturing data from each individual DDR SRAM in the system design. Output data clocks C/C enable maximum system clocking and data synchronization flexibility.

All synchronous inputs pass through input registers controlled by the K or K input clocks. All data outputs pass through output registers controlled by the C or C or K or K in a single clock domain input clocks. Writes are conducted with on-chip synchronous self-timed write circuitry.

Configurations

CY7C1416BV18 4M x 8 CY7C1427BV18 4M x 9 CY7C1418BV18 2M x 18 CY7C1420BV18 1M x 36

Selection Guide

Description Maximum Operating Frequency Maximum Operating Current
267 MHz
250 MHz 250 725 760 825
200 MHz 200 600 620 675
167 MHz 167 500 525 570

Unit MHz mA
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

Logic Block Diagram CY7C1416BV18

CY7C1416BV18, CY7C1427BV18 CY7C1418BV18, CY7C1420BV18

A 20:0

K DOFF

Address Register

CLK Gen.

VREF R/W NWS[1:0]

Control Logic
Ordering Information

Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or visit for actual products offered.

Speed MHz
Ordering Code

Package Diagram

Package Type

Operating Range
267 CY7C1416BV18-267BZC
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm

Commercial

CY7C1427BV18-267BZC

CY7C1418BV18-267BZC

CY7C1420BV18-267BZC

CY7C1416BV18-267BZXC
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free

CY7C1427BV18-267BZXC

CY7C1418BV18-267BZXC

CY7C1420BV18-267BZXC

CY7C1416BV18-267BZI
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm

Industrial

CY7C1427BV18-267BZI

CY7C1418BV18-267BZI

CY7C1420BV18-267BZI

CY7C1416BV18-267BZXI
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free

CY7C1427BV18-267BZXI

CY7C1418BV18-267BZXI

CY7C1420BV18-267BZXI
250 CY7C1416BV18-250BZC
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm

Commercial

CY7C1427BV18-250BZC

CY7C1418BV18-250BZC

CY7C1420BV18-250BZC

CY7C1416BV18-250BZXC
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free

CY7C1427BV18-250BZXC

CY7C1418BV18-250BZXC

CY7C1420BV18-250BZXC

CY7C1416BV18-250BZI
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm

Industrial

CY7C1427BV18-250BZI
Ordering Information continued

Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or visit for actual products offered.

Speed MHz
Ordering Code

Package Diagram

Package Type

Operating Range
200 CY7C1416BV18-200BZC
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm

Commercial

CY7C1427BV18-200BZC

CY7C1418BV18-200BZC

CY7C1420BV18-200BZC

CY7C1416BV18-200BZXC
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free

CY7C1427BV18-200BZXC

CY7C1418BV18-200BZXC

CY7C1420BV18-200BZXC

CY7C1416BV18-200BZI
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm

Industrial

CY7C1427BV18-200BZI

CY7C1418BV18-200BZI

CY7C1420BV18-200BZI

CY7C1416BV18-200BZXI
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free

CY7C1427BV18-200BZXI

CY7C1418BV18-200BZXI

CY7C1420BV18-200BZXI
167 CY7C1416BV18-167BZC
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm

Commercial

CY7C1427BV18-167BZC

CY7C1418BV18-167BZC

CY7C1420BV18-167BZC

CY7C1416BV18-167BZXC
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm Pb-Free

CY7C1427BV18-167BZXC

CY7C1418BV18-167BZXC

CY7C1420BV18-167BZXC

CY7C1416BV18-167BZI
51-85195 165-Ball Fine Pitch Ball Grid Array 15 x 17 x mm

Industrial

CY7C1427BV18-167BZI

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY7C1420BV18-250BZC Datasheet file may be downloaded here without warranties.

Datasheet ID: CY7C1420BV18-250BZC 508023