CY7C1399B-12ZXC

CY7C1399B-12ZXC Datasheet

CY7C1399B

Part	Datasheet
CY7C1399B-12ZXC	CY7C1399B-12ZXC (pdf)

Related Parts	Information
CY7C1399B-15VXC	CY7C1399B-15VXC
CY7C1399B-12VXC	CY7C1399B-12VXC
CY7C1399BL-12ZXCT	CY7C1399BL-12ZXCT
CY7C1399B-15ZXI	CY7C1399B-15ZXI
CY7C1399B-12VXCT	CY7C1399B-12VXCT
CY7C1399B-12ZXCT	CY7C1399B-12ZXCT
CY7C1399B-15VXI	CY7C1399B-15VXI
CY7C1399B-15VXIT	CY7C1399B-15VXIT
CY7C1399B-15ZXIT	CY7C1399B-15ZXIT
CY7C1399BL-12ZXC	CY7C1399BL-12ZXC
CY7C1399B-15ZC	CY7C1399B-15ZC
CY7C1399B-15VC	CY7C1399B-15VC
CY7C1399B-12VC	CY7C1399B-12VC
CY7C1399B-12ZC	CY7C1399B-12ZC
CY7C1399B-15ZXC	CY7C1399B-15ZXC

PDF Datasheet Preview
CY7C1399B 256K 32K x 8 Static RAM • Single 3.3V power supply • Ideal for low-voltage cache memory applications • High speed 10/12/15 ns • Low active power 216 mW max. • Low-power alpha immune 6T cell • Plastic SOJ and TSOP packaging Functional Description[1] The CY7C1399B is a high-performance 3.3V CMOS Static RAM organized as 32,768 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE and Logic Block Diagram A0 A1 A2 AA34 A5 A6 AA78 A9 CE WE ROW DECODER SENSE AMPS INPUT BUFFER 32K x 8 ARRAY COLUMN DECODER POWER DOWN active LOW Output Enable OE and three-state drivers. The device has an automatic power-down feature, reducing the power consumption by more than 95% when deselected. An active LOW Write Enable signal WE controls the writing/reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins I/O0 through I/O7 is written into the memory location addressed by the address present on the address pins A0 through A14 . Reading the device is accomplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins is present on the eight data input/output pins. The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and Write Enable WE is HIGH. The CY7C1399B is available in 28-pin standard 300-mil-wide SOJ and TSOP Type I packages. I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 Pin Configurations SOJ Top View A5 1 A6 2 A7 3 A8 4 A9 5 A10 6 A11 7 A12 8 A13 9 A14 10 I/O 0 11 I/O1 12 I/O2 13 GND 14 28 VCC 27 WE 26 A4 25 A3 24 A2 23 A1 22 OE 21 A0 20 CE 19 I/O7 18 I/O6 17 I/O5 16 I/O4 15 I/O3 A 10 A 11 A 12 A 13 A 14 Selection Guide 1399B-10 1399B-12 1399B-15 1399B-20 Unit Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current Note For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at Ordering Information Speed ns Ordering Code CY7C1399B-12VC CY7C1399B-12VXC CY7C1399B-12ZC CY7C1399B-12ZXC CY7C1399BL-12ZC CY7C1399BL-12ZXC CY7C1399B-12VXI CY7C1399B-15VC CY7C1399B-15VXC CY7C1399B-15ZC CY7C1399B-15ZXC CY7C1399BL-15VC CY7C1399BL-15VXC CY7C1399BL-15ZXC CY7C1399B-15VI CY7C1399B-15VXI CY7C1399B-15ZI CY7C1399B-15ZXI CY7C1399B-20ZC CY7C1399B-20ZXC Package Name V21 Z28 V21 Z28 V21 Z28 V21 Z28 Package Type 28-Lead Molded SOJ 28-Lead Molded SOJ Pb-Free 28-Lead Thin Small Outline Package 28-Lead Thin Small Outline Package Pb-Free 28-Lead Thin Small Outline Package 28-Lead Thin Small Outline Package Pb-Free 28-Lead Molded SOJ Pb-Free 28-Lead Molded SOJ 28-Lead Molded SOJ Pb-Free 28-Lead Thin Small Outline Package 28-Lead Thin Small Outline Package Pb-Free 28-Lead Molded SOJ 28-Lead Molded SOJ Pb-Free 28-Lead Thin Small Outline Package Pb-Free 28-Lead Molded SOJ 28-Lead Molded SOJ Pb-Free 28-Lead Thin Small Outline Package 28-Lead Thin Small Outline Package Pb-Free 28-Lead Thin Small Outline Package 28-Lead Thin Small Outline Package Pb-Free Operating Range Commercial Industrial Commercial Industrial Commercial Page 8 of 10 CY7C1399B Package Diagrams DIMENSIONS IN INCHES 28-Lead 300-Mil Molded SOJ V21 MIN. MAX. PIN 1 ID DETAIL A EXTERNAL LEAD DESIGN TYP. MIN. SEATING PLANE OPTION 1 28-Lead Thin Small Outline Package Type 1 8x13.4 mm Z28 Added Pb-Free offerings in the Ordering Information Edited the title to “256K 32K x 8 Static RAM” from “32K x 8 3.3V Static RAM” Page 10 of 10

PDF Datasheet Preview

CY7C1399B
256K 32K x 8 Static RAM
• Single 3.3V power supply
• Ideal for low-voltage cache memory applications
• High speed
10/12/15 ns
• Low active power
216 mW max.
• Low-power alpha immune 6T cell
• Plastic SOJ and TSOP packaging

Functional Description[1]

The CY7C1399B is a high-performance 3.3V CMOS Static RAM organized as 32,768 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE and

Logic Block Diagram

A0 A1 A2 AA34 A5 A6 AA78 A9

CE WE

ROW DECODER SENSE AMPS

INPUT BUFFER
32K x 8 ARRAY

COLUMN DECODER

POWER DOWN
active LOW Output Enable OE and three-state drivers. The device has an automatic power-down feature, reducing the power consumption by more than 95% when deselected.

An active LOW Write Enable signal WE controls the writing/reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins I/O0 through I/O7 is written into the memory location addressed by the address present on the address pins A0 through A14 . Reading the device is accomplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins is present on the eight data input/output pins.

The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and Write Enable WE is HIGH. The CY7C1399B is available in 28-pin standard 300-mil-wide SOJ and TSOP Type I packages.

I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7

Pin Configurations

SOJ Top View

A5 1 A6 2 A7 3 A8 4

A9 5 A10 6 A11 7 A12 8 A13 9

A14 10

I/O 0 11

I/O1 12 I/O2 13 GND 14
28 VCC
27 WE
26 A4 25 A3 24 A2 23 A1 22 OE 21 A0 20 CE
19 I/O7 18 I/O6 17 I/O5 16 I/O4 15 I/O3

A 10 A 11 A 12 A 13 A 14

Selection Guide
1399B-10
1399B-12
1399B-15
1399B-20

Unit

Maximum Access Time

Maximum Operating Current

Maximum CMOS Standby Current

Note For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at
Ordering Information

Speed ns
Ordering Code

CY7C1399B-12VC

CY7C1399B-12VXC

CY7C1399B-12ZC

CY7C1399B-12ZXC

CY7C1399BL-12ZC

CY7C1399BL-12ZXC

CY7C1399B-12VXI

CY7C1399B-15VC

CY7C1399B-15VXC

CY7C1399B-15ZC

CY7C1399B-15ZXC

CY7C1399BL-15VC

CY7C1399BL-15VXC

CY7C1399BL-15ZXC

CY7C1399B-15VI

CY7C1399B-15VXI

CY7C1399B-15ZI

CY7C1399B-15ZXI

CY7C1399B-20ZC

CY7C1399B-20ZXC

Package Name V21 Z28 V21 Z28 V21 Z28 V21 Z28

Package Type 28-Lead Molded SOJ 28-Lead Molded SOJ Pb-Free 28-Lead Thin Small Outline Package 28-Lead Thin Small Outline Package Pb-Free 28-Lead Thin Small Outline Package 28-Lead Thin Small Outline Package Pb-Free 28-Lead Molded SOJ Pb-Free 28-Lead Molded SOJ 28-Lead Molded SOJ Pb-Free 28-Lead Thin Small Outline Package 28-Lead Thin Small Outline Package Pb-Free 28-Lead Molded SOJ 28-Lead Molded SOJ Pb-Free 28-Lead Thin Small Outline Package Pb-Free 28-Lead Molded SOJ 28-Lead Molded SOJ Pb-Free 28-Lead Thin Small Outline Package 28-Lead Thin Small Outline Package Pb-Free 28-Lead Thin Small Outline Package 28-Lead Thin Small Outline Package Pb-Free

Operating Range

Commercial

Industrial Commercial

Industrial

Commercial

Page 8 of 10

CY7C1399B

Package Diagrams

DIMENSIONS IN INCHES
28-Lead 300-Mil Molded SOJ V21 MIN. MAX.

PIN 1 ID

DETAIL A

EXTERNAL LEAD DESIGN

TYP.

MIN.

SEATING PLANE

OPTION 1
28-Lead Thin Small Outline Package Type 1 8x13.4 mm Z28
Added Pb-Free offerings in the Ordering Information

Edited the title to “256K 32K x 8 Static RAM” from “32K x 8 3.3V Static RAM”

Page 10 of 10

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Datasheet ID: CY7C1399B-12ZXC 508009