CY7C139-25JXC

CY7C139-25JXC Datasheet

CY7C138 CY7C1394K x 8/9 Dual-Port Static RAM with Sem, Int, Busy

Part	Datasheet
CY7C139-25JXC	CY7C139-25JXC (pdf)

Related Parts	Information
CY7C138-15JXC	CY7C138-15JXC
CY7C138-25JC	CY7C138-25JC

PDF Datasheet Preview
CY7C138 CY7C1394K x 8/9 Dual-Port Static RAM with Sem, Int, Busy CY7C138 CY7C139 • True Dual-Ported memory cells that allow simultaneous reads of the same memory location • 4K x 8 organization CY7C138 • 4K x 9 organization CY7C139 • 0.65-micron CMOS for optimum speed/power • High-speed access 15 ns • Low operating power ICC = 160 mA max. • Fully asynchronous operation • Automatic power-down • TTL compatible • Expandable data bus to 32/36 bits or more using Master/Slave chip select when using more than one device • On-chip arbitration logic • Semaphores included to permit software handshaking between ports • INT flag for port-to-port communication • Available in 68-pin PLCC • Pb-Free packages available Functional Description The CY7C138 and CY7C139 are high-speed CMOS 4K x 8 and 4K x 9 dual-port static RAMs. Various arbitration schemes Logic BlockDiagram R/WL CEL OEL 4K x 8/9 Dual-Port Static RAM with Sem, Int, Busy are included on the CY7C138/9 to handle situations when multiple processors access the same piece of data. Two ports are provided permitting independent, asynchronous access for reads and writes to any location in memory. The CY7C138/9 can be utilized as a standalone 8/9-bit dual-port static RAM or multiple devices can be combined in order to function as a 16/18-bit or wider master/slave dual-port static RAM. An M/S pin is provided for implementing 16/18-bit or wider memory applications without the need for separate master and slave devices or additional discrete logic. Application areas include interprocessor/multiprocessor designs, communications status buffering, and dual-port video/graphics memory. Each port has independent control pins chip enable CE , read or write enable R/W , and output enable OE . Two flags are provided on each port BUSY and INT . BUSY signals that the port is trying to access the same location currently being accessed by the other port. The interrupt flag INT permits communication between ports or systems by means of a mail box. The semaphores are used to pass a flag, or token, from one port to the other to indicate that a shared resource is in use. The semaphore logic is comprised of eight shared latches. Only one side can control the latch semaphore at any time. Control of a semaphore indicates that a shared resource is in use. An automatic power-down feature is controlled independently on each port by a chip enable CE pin or SEM pin. The CY7C138 and CY7C139 are available in a 68-pin PLCC. R/WR CER OER 7C139 I/O8L I/O7L I/O0L BUSYL[1, 2] A11L I/O CONTROL I/O CONTROL ADDRESS DECODER MEMORY ARRAY ADDRESS DECODER I/O8R 7C139 I/O7R I/O0R BUSYR[1, 2] A11R CEL OEL R/WL SEML INTL[2] Notes BUSY is an output in master mode and an input in slave mode. Interrupt push-pull output and requires no pull-up resistor. INTERRUPT SEMAPHORE ARBITRATION CER OER R/WR SEMR INTR[2] Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback Pin Configurations 68-Pin PLCC Top View I/O1L I/O0L NC [4] OE L R/W L SEM L CEL NC VCC NC A11L A10L A9L A8L A7L A6L I/O2L I/O3L I/O4L I/O5L GND I/O6L I/O7L VCC GND I/O0R I/O1R I/O2R I/O3R I/O4R I/O5R I/O6R 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 CY7C138/9 Ordering Information 4K x8 Dual-Port SRAM Speed ns 15 25 35 55 Ordering Code CY7C138-15JC CY7C138-15JXC CY7C138-25JC CY7C138-25JXC CY7C138-25JI CY7C138-35JC CY7C138-35JI CY7C138-55JC CY7C138-55JI 4K x9 Dual-Port SRAM Speed ns Ordering Code 15 CY7C139-15JC 25 CY7C139-25JC CY7C139-25JXC CY7C139-25JI 35 CY7C139-35JC CY7C139-35JI 55 CY7C139-55JC CY7C139-55JI Package Diagram Package Name J81 Package Type 68-Lead Plastic Leaded Chip Carrier 68-Lead Pb-Free Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Pb-Free Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier Package Type J81 Package Type 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Pb-Free Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier J81 68-Lead Pb-Free Plastic Leaded Chip Carrier J81 CY7C138 CY7C139 Operating Range Commercial Commercial Industrial Commercial Industrial Commercial Industrial Operating Range Commercial Industrial Commercial Industrial Commercial Industrial 51-85005-*A All products and company names mentioned in this document may be the trademarks of their respective holders. Page 15 of 16 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. [+] Feedback CY7C138 CY7C139 Document History Page Document Title CY7C138/CY7C139 4K x 8/9 Dual-Port Static RAM Document Number 38-06037 ECN NO. Issue Date Orig. of Change Description of Change 110180 09/29/01 SZV Change from Spec number 38-00536 to 38-06037 122287 12/27/02 Added Pb-Free parts to ordering information: CY7C138-15JXC, CY7C138-25JXC, CY7C139-25JXC Page 16 of 16 [+] Feedback

PDF Datasheet Preview

CY7C138 CY7C1394K x 8/9 Dual-Port Static RAM with Sem, Int, Busy

CY7C138 CY7C139
• True Dual-Ported memory cells that allow simultaneous reads of the same memory location
• 4K x 8 organization CY7C138
• 4K x 9 organization CY7C139
• 0.65-micron CMOS for optimum speed/power
• High-speed access 15 ns
• Low operating power ICC = 160 mA max.
• Fully asynchronous operation
• Automatic power-down
• TTL compatible
• Expandable data bus to 32/36 bits or more using

Master/Slave chip select when using more than one device
• On-chip arbitration logic
• Semaphores included to permit software handshaking between ports
• INT flag for port-to-port communication
• Available in 68-pin PLCC
• Pb-Free packages available

Functional Description

The CY7C138 and CY7C139 are high-speed CMOS 4K x 8 and 4K x 9 dual-port static RAMs. Various arbitration schemes

Logic BlockDiagram

R/WL

CEL OEL
4K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
are included on the CY7C138/9 to handle situations when multiple processors access the same piece of data. Two ports are provided permitting independent, asynchronous access for reads and writes to any location in memory. The CY7C138/9 can be utilized as a standalone 8/9-bit dual-port static RAM or multiple devices can be combined in order to function as a 16/18-bit or wider master/slave dual-port static RAM. An M/S pin is provided for implementing 16/18-bit or wider memory applications without the need for separate master and slave devices or additional discrete logic. Application areas include interprocessor/multiprocessor designs, communications status buffering, and dual-port video/graphics memory.

Each port has independent control pins chip enable CE , read or write enable R/W , and output enable OE . Two flags are provided on each port BUSY and INT . BUSY signals that the port is trying to access the same location currently being accessed by the other port. The interrupt flag INT permits communication between ports or systems by means of a mail box. The semaphores are used to pass a flag, or token, from one port to the other to indicate that a shared resource is in use. The semaphore logic is comprised of eight shared latches. Only one side can control the latch semaphore at any time. Control of a semaphore indicates that a shared resource is in use. An automatic power-down feature is controlled independently on each port by a chip enable CE pin or SEM pin.

The CY7C138 and CY7C139 are available in a 68-pin PLCC.

R/WR

CER OER
7C139 I/O8L I/O7L I/O0L

BUSYL[1, 2] A11L

I/O CONTROL

I/O CONTROL

ADDRESS DECODER

MEMORY ARRAY

ADDRESS DECODER

I/O8R 7C139 I/O7R I/O0R BUSYR[1, 2] A11R

CEL OEL R/WL

SEML INTL[2]

Notes BUSY is an output in master mode and an input in slave mode. Interrupt push-pull output and requires no pull-up resistor.

INTERRUPT SEMAPHORE ARBITRATION

CER OER R/WR

SEMR INTR[2]

Cypress Semiconductor Corporation
• 198 Champion Court
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

Pin Configurations
68-Pin PLCC Top View

I/O1L I/O0L NC [4] OE L R/W L SEM L CEL NC VCC NC A11L A10L A9L A8L A7L A6L

I/O2L I/O3L I/O4L I/O5L GND

I/O6L I/O7L VCC GND

I/O0R I/O1R I/O2R

I/O3R I/O4R I/O5R I/O6R
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61

CY7C138/9
Ordering Information
4K x8 Dual-Port SRAM

Speed ns 15 25
35 55
Ordering Code CY7C138-15JC CY7C138-15JXC CY7C138-25JC CY7C138-25JXC CY7C138-25JI CY7C138-35JC CY7C138-35JI CY7C138-55JC CY7C138-55JI
4K x9 Dual-Port SRAM

Speed ns
Ordering Code
15 CY7C139-15JC
25 CY7C139-25JC

CY7C139-25JXC

CY7C139-25JI
35 CY7C139-35JC

CY7C139-35JI
55 CY7C139-55JC

CY7C139-55JI

Package Diagram

Package Name J81

Package Type 68-Lead Plastic Leaded Chip Carrier 68-Lead Pb-Free Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Pb-Free Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier

Package Type J81

Package Type 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Pb-Free Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier 68-Lead Plastic Leaded Chip Carrier
68-Lead Plastic Leaded Chip Carrier J81 68-Lead Pb-Free Plastic Leaded Chip Carrier J81

CY7C138 CY7C139

Operating Range

Commercial

Commercial

Industrial Commercial Industrial Commercial Industrial

Operating Range

Commercial

Industrial Commercial Industrial Commercial Industrial
51-85005-*A

All products and company names mentioned in this document may be the trademarks of their respective holders.

Page 15 of 16

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
[+] Feedback

CY7C138 CY7C139

Document History Page

Document Title CY7C138/CY7C139 4K x 8/9 Dual-Port Static RAM Document Number 38-06037

ECN NO.

Issue Date

Orig. of Change Description of Change
110180 09/29/01

SZV Change from Spec number 38-00536 to 38-06037
122287 12/27/02
Added Pb-Free parts to ordering information:

CY7C138-15JXC, CY7C138-25JXC, CY7C139-25JXC

Page 16 of 16 [+] Feedback

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Datasheet ID: CY7C139-25JXC 507997