CY7C109B-15ZXCT

CY7C109B-15ZXCT Datasheet

CY7C109B CY7C1009B

Part	Datasheet
CY7C109B-15ZXCT	CY7C109B-15ZXCT (pdf)

Related Parts	Information
CY7C109B-15VXC	CY7C109B-15VXC
CY7C109B-15VXCT	CY7C109B-15VXCT
CY7C1009B-15VXCT	CY7C1009B-15VXCT
CY7C109B-12ZXC	CY7C109B-12ZXC
CY7C109B-12ZXCT	CY7C109B-12ZXCT
CY7C1009B-20VC	CY7C1009B-20VC
CY7C1009B-15VC	CY7C1009B-15VC
CY7C109B-20ZC	CY7C109B-20ZC
CY7C1009B-12VC	CY7C1009B-12VC
CY7C109B-15ZC	CY7C109B-15ZC
CY7C109B-15VC	CY7C109B-15VC
CY7C109B-12VC	CY7C109B-12VC
CY7C109B-15ZXC	CY7C109B-15ZXC
CY7C1009B-15VXC	CY7C1009B-15VXC

PDF Datasheet Preview
CY7C109B CY7C1009B • High speed tAA = 12 ns • Low active power 495 mW max. • Low CMOS standby power 11 mW max. L Version • 2.0V Data Retention • Automatic power-down when deselected • TTL-compatible inputs and outputs • Easy memory expansion with CE1, CE2, and OE options • CY7C109B is available in standard 400-mil-wide SOJ and 32-pin TSOP type I packages. The CY7C1009B is available in a 300-mil-wide SOJ package 128K x 8 Static RAM Functional Description[1] The CY7C109B/CY7C1009B is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE1 , an active HIGH Chip Enable CE2 , an active LOW Output Enable OE , and tri-state drivers. Writing to the device is accomplished by taking Chip Enable One CE1 and Write Enable WE inputs LOW and Chip Enable Two CE2 input HIGH. Data on the eight I/O pins I/O0 through I/O7 is then written into the location specified on the address pins A0 through A16 . Reading from the device is accomplished by taking Chip Enable One CE1 and Output Enable OE LOW while forcing Write Enable WE and Chip Enable Two CE2 HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins I/O0 through I/O7 are placed in a high-impedance state when the device is deselected CE1 HIGH or CE2 LOW , the outputs are disabled OE HIGH , or during a write operation CE1 LOW, CE2 HIGH, and WE LOW . CY7C109B is available in standard 400-mil-wide SOJ and 32pin TSOP type I packages. The CY7C1009B is available in a 300-mil-wide SOJ package. The CY7C109B and CY7C1009B are functionally equivalent in all other respects A9 A 10 A 11 A12 A13 A14 A15 A16 Logic Block Diagram A0 A1 A2 A3 A4 A5 A6 A7 A8 CE1 CE2 WE ROW DECODER SENSE AMPS INPUT BUFFER 128K x 8 ARRAY COLUMN DECODER POWER DOWN I/O0 I/O1 I/O2 I/O3 I/O4 A8 I/O5 WE CE2 I/O6 VCC NC I/O7 A14 A12 11 12 Pin Configurations[2] SOJ Top View NC 1 A16 2 A14 3 A12 4 A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 I/O0 13 I/O1 14 I/O2 15 GND 16 32 VCC 31 A15 30 CE2 Ordering Information Speed ns Ordering Code Package Diagram CY7C109B-12VC 51-85033 CY7C1009B-12VC 51-85041 CY7C109B-12ZC 51-85056 CY7C109B-12ZXC CY7C109BL-15VC 51-85033 CY7C109B-15VC CY7C109B-15VXC CY7C1009B-15VC 51-85041 CY7C1009B-15VXC CY7C109B-15ZC 51-85056 CY7C109B-15ZXC CY7C109B-15VI 51-85033 CY7C1009B-15VI 51-85041 CY7C109B-20ZC 51-85056 CY7C1009B-20VC 51-85041 CY7C109B-20VI 51-85033 Please contact local sales representative regarding availability of parts Package Diagrams CY7C109B CY7C1009B Package Type 32-pin 400-Mil Molded SOJ 32-pin 300-Mil Molded SOJ 32-pin TSOP Type I 32-pin TSOP Type I Pb-Free 32-pin 400-Mil Molded SOJ 32-pin 400-Mil Molded SOJ 32-pin 400-Mil Molded SOJ Pb-Free 32-pin 300-Mil Molded SOJ 32-pin 300-Mil Molded SOJ Pb-Free 32-pin TSOP Type I 32-pin TSOP Type I Pb-Free 32-pin 400-Mil Molded SOJ 32-pin 300-Mil Molded SOJ 32-pin TSOP Type I 32-pin 300-Mil Molded SOJ 32-pin 400-Mil Molded SOJ Operating Range Commercial Commercial Industrial Commercial Industrial 32-pin 300-Mil Molded 51-85041 51-85041-*A Page 7 of 10 [+] Feedback Package Diagrams continued Updated the Ordering Information Table on page 7 493543 See ECN NXR Removed 25 ns and 35 ns speed bin from product offering Added note# 2 on page# 1 Changed the description of IIX from Input Load Current to Input Leakage Current in DC Electrical Characteristics table Removed IOS parameter from DC Electrical Characteristics table Updated the Ordering Information Table Page 10 of 10 [+] Feedback

PDF Datasheet Preview

CY7C109B CY7C1009B
• High speed tAA = 12 ns
• Low active power 495 mW max.
• Low CMOS standby power 11 mW max. L Version
• 2.0V Data Retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE1, CE2, and OE options
• CY7C109B is available in standard 400-mil-wide SOJ
and 32-pin TSOP type I packages. The CY7C1009B is available in a 300-mil-wide SOJ package
128K x 8 Static RAM

Functional Description[1]

The CY7C109B/CY7C1009B is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE1 , an active HIGH Chip Enable CE2 , an active LOW Output Enable OE , and tri-state drivers. Writing to the device is accomplished by taking Chip Enable One CE1 and Write Enable WE inputs LOW and Chip Enable Two CE2 input HIGH. Data on the eight I/O pins I/O0 through I/O7 is then written into the location specified on the address pins A0 through A16 .

Reading from the device is accomplished by taking Chip Enable One CE1 and Output Enable OE LOW while forcing Write Enable WE and Chip Enable Two CE2 HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins I/O0 through I/O7 are placed in a high-impedance state when the device is deselected CE1 HIGH or CE2 LOW , the outputs are disabled OE HIGH , or during a write operation CE1 LOW, CE2 HIGH, and WE LOW .

CY7C109B is available in standard 400-mil-wide SOJ and 32pin TSOP type I packages. The CY7C1009B is available in a 300-mil-wide SOJ package. The CY7C109B and CY7C1009B are functionally equivalent in all other respects

A9 A 10 A 11 A12 A13 A14 A15 A16

Logic Block Diagram

A0 A1 A2 A3 A4 A5 A6 A7 A8

CE1 CE2 WE

ROW DECODER SENSE AMPS

INPUT BUFFER
128K x 8 ARRAY

COLUMN DECODER

POWER DOWN

I/O0

I/O1 I/O2

I/O3

I/O4 A8

I/O5

WE CE2

I/O6

VCC NC

I/O7

A14 A12
11 12

Pin Configurations[2]

SOJ Top View

NC 1 A16 2 A14 3 A12 4

A7 5 A6 6 A5 7

A4 8 A3 9

A2 10 A1 11

A0 12 I/O0 13 I/O1 14 I/O2 15 GND 16
32 VCC
31 A15 30 CE2
Ordering Information

Speed ns
Ordering Code

Package Diagram

CY7C109B-12VC
51-85033

CY7C1009B-12VC
51-85041

CY7C109B-12ZC
51-85056

CY7C109B-12ZXC

CY7C109BL-15VC
51-85033

CY7C109B-15VC

CY7C109B-15VXC

CY7C1009B-15VC
51-85041

CY7C1009B-15VXC

CY7C109B-15ZC
51-85056

CY7C109B-15ZXC

CY7C109B-15VI
51-85033

CY7C1009B-15VI
51-85041

CY7C109B-20ZC
51-85056

CY7C1009B-20VC
51-85041

CY7C109B-20VI
51-85033

Please contact local sales representative regarding availability of parts

Package Diagrams

CY7C109B CY7C1009B

Package Type 32-pin 400-Mil Molded SOJ 32-pin 300-Mil Molded SOJ 32-pin TSOP Type I 32-pin TSOP Type I Pb-Free 32-pin 400-Mil Molded SOJ 32-pin 400-Mil Molded SOJ 32-pin 400-Mil Molded SOJ Pb-Free 32-pin 300-Mil Molded SOJ 32-pin 300-Mil Molded SOJ Pb-Free 32-pin TSOP Type I 32-pin TSOP Type I Pb-Free 32-pin 400-Mil Molded SOJ 32-pin 300-Mil Molded SOJ 32-pin TSOP Type I 32-pin 300-Mil Molded SOJ 32-pin 400-Mil Molded SOJ

Operating Range

Commercial

Commercial

Industrial Commercial Industrial
32-pin 300-Mil Molded 51-85041
51-85041-*A

Page 7 of 10 [+] Feedback

Package Diagrams continued
Updated the Ordering Information Table on page 7
493543 See ECN NXR Removed 25 ns and 35 ns speed bin from product offering

Added note# 2 on page# 1

Changed the description of IIX from Input Load Current to Input Leakage Current in DC Electrical Characteristics table
Removed IOS parameter from DC Electrical Characteristics table Updated the Ordering Information Table

Page 10 of 10 [+] Feedback

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY7C109B-15ZXCT Datasheet file may be downloaded here without warranties.

Datasheet ID: CY7C109B-15ZXCT 507920