CY7C1041CV33-15VC

CY7C1041CV33-15VC Datasheet

CY7C1041CV33

Part	Datasheet
CY7C1041CV33-15VC	CY7C1041CV33-15VC (pdf)

Related Parts	Information
CY7C1041CV33-12ZXC	CY7C1041CV33-12ZXC
CY7C1041CV33-15ZXC	CY7C1041CV33-15ZXC
CY7C1041CV33-12ZC	CY7C1041CV33-12ZC
CY7C1041CV33-15ZC	CY7C1041CV33-15ZC
CY7C1041CV33-20ZC	CY7C1041CV33-20ZC
CY7C1041CV33-12VXC	CY7C1041CV33-12VXC
CY7C1041CV33-15VXC	CY7C1041CV33-15VXC
CY7C1041CV33-20ZXC	CY7C1041CV33-20ZXC

PDF Datasheet Preview
CY7C1041CV33 4-Mbit 256K x 16 Static RAM • Pin equivalent to CY7C1041BV33 • Temperature Ranges Commercial 0°C to 70°C Industrial to 85°C Automotive-A to 85°C Automotive-E to 125°C • High speed tAA = 10 ns • Low active power 324 mW max. • 2.0V data retention • Automatic power-down when deselected • TTL-compatible inputs and outputs • Easy memory expansion with CE and OE features • Available in Pb-free and non Pb-free 44-pin 400-milSOJ, 44-pin TSOP II and 48-ball FBGA packages Functional Description[1] The CY7C1041CV33 is a high-performance CMOS Static RAM organized as 262,144 words by 16 bits. Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte LOW Enable BLE is LOW, then data from I/O pins is written into the location specified on the address pins If Byte HIGH Enable BHE is LOW, then data from I/O pins is written into the location specified on the address pins Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte LOW Enable BLE is LOW, then data from the memory location specified by the address pins will appear on I/O0 I/O7. If Byte HIGH Enable BHE is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of Read and Write modes. The input/output pins are placed in a high-impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , the BHE and BLE are disabled BHE, BLE HIGH , or during a Write operation CE LOW, and WE LOW . Logic Block Diagram INPUT BUFFER Pin Configuration SOJ/ TSOP II Top View A9 A10 A 11 A12 A13 A14 A15 A16 A17 ROW DECODER SENSE AMPS 256K x 16 ARRAY A5 A6 A7 A8 COLUMN DECODER BHE WE CE OE BLE A0 1 A1 2 A2 3 A3 4 A4 5 CE 6 I/O0 7 I/O1 8 I/O2 9 I/O3 10 VCC 11 VSS 12 I/O4 13 I/O5 14 I/O6 15 I/O7 16 WE 17 A5 18 A6 19 A7 20 A8 21 A9 22 44 A17 43 A16 42 A15 41 OE 40 BHE 39 BLE 38 I/O15 37 I/O14 36 I/O13 35 I/O12 34 VSS 33 VCC 32 I/O11 31 I/O10 30 I/O9 29 I/O8 28 NC 27 A14 26 A13 25 A12 24 A11 23 A10 Notes For guidelines on SRAM system design, please refer to the “System Design Guidelines” Cypress application note, available on the internet at Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Selection Guide Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current Pin Configurations Commercial Industrial Automotive-A Automotive-E Commercial/ Industrial Ordering Information Speed ns Ordering Code Package Diagram Package Type CY7C1041CV33-10BAC 51-85106 48-ball Fine Pitch BGA CY7C1041CV33-10BAXC 48-ball Fine Pitch BGA Pb-Free CY7C1041CV33-10VC 51-85082 44-lead 400-mil Molded SOJ CY7C1041CV33-10VXC 44-lead 400-mil Molded SOJ Pb-Free CY7C1041CV33-10ZC 51-85087 44-pin TSOP II CY7C1041CV33-10ZXC 44-pin TSOP II Pb-Free CY7C1041CV33-10BAI 51-85106 48-ball Fine Pitch BGA CY7C1041CV33-10BAXI 48-ball Fine Pitch BGA Pb-Free CY7C1041CV33-10ZI 51-85087 44-pin TSOP II CY7C1041CV33-10ZXI 44-pin TSOP II Pb-Free CY7C1041CV33-10ZSXA 44-pin TSOP II Pb-Free CY7C1041CV33-10BAXA 51-85106 48-ball Fine Pitch BGA Pb-Free CY7C1041CV33-12VC 51-85082 44-lead 400-mil Molded SOJ CY7C1041CV33-12VXC 44-lead 400-mil Molded SOJ Pb-Free CY7C1041CV33-12ZC 51-85087 44-pin TSOP II CY7C1041CV33-12ZXC 44-pin TSOP II Pb-Free CY7C1041CV33-12VXI 51-85082 44-lead 400-mil Molded SOJ Pb-Free CY7C1041CV33-12ZI 51-85087 44-pin TSOP II CY7C1041CV33-12ZXI 44-pin TSOP II Pb-Free 262949 See ECN RKF 1 Added Lead Pb -Free parts in the Ordering info Page #9 2 Added Automotive Specs to Datasheet 361795 See ECN SYT Added Pb-Free offerings in the Ordering Information 435387 See ECN NXR Removed -8 Speed bin from Product offering. Corrected typo in description for BHE/BLE in pin definitions table on Page# 3 corrected ther Pin name from OE2 to OE. Included the Maximum Ratings for Static Discharge Voltage and Latch up Current. Changed the description of IIX current from Input Load Current to Input Leakage Current Added note# 4 on page# 4 Updated the Ordering Information table 499153 See ECN NXR Added Automotive-A Operating Range Changed tpower value from 1 µs to 100 µs Updated Ordering Information table Page 12 of 12

PDF Datasheet Preview

CY7C1041CV33
4-Mbit 256K x 16 Static RAM
• Pin equivalent to CY7C1041BV33
• Temperature Ranges

Commercial 0°C to 70°C Industrial to 85°C Automotive-A to 85°C Automotive-E to 125°C
• High speed tAA = 10 ns
• Low active power 324 mW max.
• 2.0V data retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• Available in Pb-free and non Pb-free 44-pin 400-milSOJ, 44-pin TSOP II and 48-ball FBGA packages

Functional Description[1]

The CY7C1041CV33 is a high-performance CMOS Static RAM organized as 262,144 words by 16 bits.

Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte LOW Enable BLE is LOW, then data from I/O pins is written into the location specified on the address pins If Byte HIGH Enable BHE is LOW, then data from I/O pins is written into the location specified on the address pins

Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte LOW Enable BLE is LOW, then data from the memory location specified by the address pins will appear on I/O0 I/O7. If Byte HIGH Enable BHE is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of Read and Write modes.

The input/output pins are placed in a high-impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , the BHE and BLE are disabled BHE, BLE HIGH , or during a Write operation CE LOW, and WE LOW .

Logic Block Diagram

INPUT BUFFER

Pin Configuration

SOJ/ TSOP II Top View

A9 A10 A 11 A12 A13 A14 A15 A16 A17

ROW DECODER SENSE AMPS
256K x 16

ARRAY

A5 A6

A7 A8

COLUMN DECODER

BHE WE CE OE BLE

A0 1 A1 2 A2 3 A3 4 A4 5 CE 6

I/O0 7 I/O1 8 I/O2 9

I/O3 10 VCC 11 VSS 12 I/O4 13 I/O5 14 I/O6 15 I/O7 16 WE 17

A5 18 A6 19 A7 20 A8 21 A9 22
44 A17 43 A16 42 A15 41 OE
40 BHE 39 BLE
38 I/O15 37 I/O14 36 I/O13 35 I/O12 34 VSS 33 VCC 32 I/O11 31 I/O10 30 I/O9 29 I/O8 28 NC
27 A14 26 A13 25 A12 24 A11 23 A10

Notes For guidelines on SRAM system design, please refer to the “System Design Guidelines” Cypress application note, available on the internet at

Cypress Semiconductor Corporation
• 198 Champion Court
• San Jose, CA 95134-1709
• 408-943-2600

Selection Guide

Maximum Access Time Maximum Operating Current

Maximum CMOS Standby Current

Pin Configurations

Commercial

Industrial

Automotive-A

Automotive-E

Commercial/

Industrial
Ordering Information

Speed ns
Ordering Code

Package Diagram

Package Type

CY7C1041CV33-10BAC
51-85106 48-ball Fine Pitch BGA

CY7C1041CV33-10BAXC
48-ball Fine Pitch BGA Pb-Free

CY7C1041CV33-10VC
51-85082 44-lead 400-mil Molded SOJ

CY7C1041CV33-10VXC
44-lead 400-mil Molded SOJ Pb-Free

CY7C1041CV33-10ZC
51-85087 44-pin TSOP II

CY7C1041CV33-10ZXC
44-pin TSOP II Pb-Free

CY7C1041CV33-10BAI
51-85106 48-ball Fine Pitch BGA

CY7C1041CV33-10BAXI
48-ball Fine Pitch BGA Pb-Free

CY7C1041CV33-10ZI
51-85087 44-pin TSOP II

CY7C1041CV33-10ZXI
44-pin TSOP II Pb-Free

CY7C1041CV33-10ZSXA
44-pin TSOP II Pb-Free

CY7C1041CV33-10BAXA
51-85106 48-ball Fine Pitch BGA Pb-Free

CY7C1041CV33-12VC
51-85082 44-lead 400-mil Molded SOJ

CY7C1041CV33-12VXC
44-lead 400-mil Molded SOJ Pb-Free

CY7C1041CV33-12ZC
51-85087 44-pin TSOP II

CY7C1041CV33-12ZXC
44-pin TSOP II Pb-Free

CY7C1041CV33-12VXI
51-85082 44-lead 400-mil Molded SOJ Pb-Free

CY7C1041CV33-12ZI
51-85087 44-pin TSOP II

CY7C1041CV33-12ZXI
44-pin TSOP II Pb-Free
262949 See ECN RKF 1 Added Lead Pb -Free parts in the Ordering info Page #9
2 Added Automotive Specs to Datasheet
361795 See ECN SYT Added Pb-Free offerings in the Ordering Information
435387 See ECN NXR Removed -8 Speed bin from Product offering.

Corrected typo in description for BHE/BLE in pin definitions table on Page# 3
corrected ther Pin name from OE2 to OE.

Included the Maximum Ratings for Static Discharge Voltage and Latch up

Current.

Changed the description of IIX current from Input Load Current to Input Leakage Current

Added note# 4 on page# 4
Updated the Ordering Information table
499153 See ECN NXR Added Automotive-A Operating Range
Changed tpower value from 1 µs to 100 µs Updated Ordering Information table

Page 12 of 12

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Datasheet ID: CY7C1041CV33-15VC 507901