CY7C1021CV33-8ZXC

CY7C1021CV33-8ZXC Datasheet

CY7C1021CV33

Part	Datasheet
CY7C1021CV33-8ZXC	CY7C1021CV33-8ZXC (pdf)

Related Parts	Information
CY7C1021CV33-15VXC	CY7C1021CV33-15VXC
CY7C1021CV33-12VXC	CY7C1021CV33-12VXC
CY7C1021CV33-10VXC	CY7C1021CV33-10VXC
CY7C1021CV33-8ZXCT	CY7C1021CV33-8ZXCT
CY7C1021CV33-8VXCT	CY7C1021CV33-8VXCT
CY7C1021CV33-10ZXIT	CY7C1021CV33-10ZXIT
CY7C1021CV33-12VXIT	CY7C1021CV33-12VXIT
CY7C1021CV33-12VXCT	CY7C1021CV33-12VXCT
CY7C1021CV33-12VXI	CY7C1021CV33-12VXI
CY7C1021CV33-10ZXI	CY7C1021CV33-10ZXI
CY7C1021CV33-10VXCT	CY7C1021CV33-10VXCT
CY7C1021CV33-12ZXIT	CY7C1021CV33-12ZXIT
CY7C1021CV33-8VXC	CY7C1021CV33-8VXC
CY7C1021CV33-15VXCT	CY7C1021CV33-15VXCT
CY7C1021CV33-15ZXI	CY7C1021CV33-15ZXI
CY7C1021CV33-15ZXIT	CY7C1021CV33-15ZXIT
CY7C1021CV33-12ZXI	CY7C1021CV33-12ZXI
CY7C1021CV33-12BAXI	CY7C1021CV33-12BAXI
CY7C1021CV33-12BAXIT	CY7C1021CV33-12BAXIT

PDF Datasheet Preview
CY7C1021CV33 1-Mbit 64K x 16 Static RAM • Temperature ranges Commercial 0°C to 70°C Industrial to 85°C Automotive-A to 85°C Automotive-E to 125°C • Pin and function compatible with CY7C1021BV33 • High speed tAA = 8 ns Commercial & Industrial tAA = 12 ns Automotive-E • CMOS for optimum speed and power • Low active power 325 mW max • Automatic power down when deselected • Independent control of upper and lower bits • Available in Pb-free and non Pb-free 44-pin 400 Mil SOJ, 44-pin TSOP II and 48-Ball FBGA packages Functional Description The CY7C1021CV33 is a high performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte Low Enable BLE is LOW, then data from IO pins IO1 through IO8 , is written into the location specified on the address pins A0 through A15 . If Byte High Enable BHE is LOW, then data from IO pins IO9 through IO16 is written into the location specified on the address pins A0 through A15 . Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins appear on IO1 to IO8. If Byte High Enable BHE is LOW, then data from memory appears on IO9 to IO16. For more information, see the “Truth Table” on page 9 for a complete description of Read and Write modes. The input and output pins IO1 through IO16 are placed in a high impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , the BHE and BLE are disabled BHE, BLE HIGH , or during a write operation CE LOW and WE LOW . For best practice recommendations, refer to the Cypress application note AN1064, SRAM System Guidelines. Logic Block Diagram DATA IN DRIVERS ROW DECODER A8 A9 A10 A11 A12 A13 A14 A15 SENSE AMPS A5 A4 64K x 16 RAM Array COLUMN DECODER BHE WE CE OE BLE • San Jose, CA 95134-1709 • 408-943-2600 Selection Guide Maximum Access Time Maximum Operating Current Comm’l/Ind’l Automotive-A Automotive-E Maximum CMOS Standby Current Comm’l/Ind’l Automotive-A Automotive-E Pin Configuration Figure 44-Pin SOJ/TSOP II [1] A4 1 A3 2 A2 3 A1 4 A0 5 CE 6 IO1 7 IO2 8 IO3 9 IO4 10 VCC 11 VSS 12 IO5 13 IO6 14 IO7 15 IO8 16 WE 17 A15 18 A14 19 A13 20 A12 21 Ordering Information Speed ns Ordering Code 8 CY7C1021CV33-8VXC CY7C1021CV33-8ZXC CY7C1021CV33-8BAXC 10 CY7C1021CV33-10VC CY7C1021CV33-10VXC CY7C1021CV33-10ZXC CY7C1021CV33-10ZI CY7C1021CV33-10ZXI CY7C1021CV33-10BAXI 12 CY7C1021CV33-12VC CY7C1021CV33-12VXC CY7C1021CV33-12ZXC CY7C1021CV33-12VI CY7C1021CV33-12VXI CY7C1021CV33-12ZXI CY7C1021CV33-12BAI CY7C1021CV33-12BAXI CY7C1021CV33-12VE CY7C1021CV33-12VXE CY7C1021CV33-12ZSE CY7C1021CV33-12ZSXE CY7C1021CV33-12BAE 15 CY7C1021CV33-15VXC CY7C1021CV33-15ZXC CY7C1021CV33-15ZI CY7C1021CV33-15ZXI CY7C1021CV33-15BAXI CY7C1021CV33-15ZSXA Package Diagram Package Type 51-85082 44-pin 400-Mil Molded SOJ Pb-free 44-pin TSOP Type II Pb-free 51-85096 48-ball FBGA Pb-free 51-85082 44-pin 400-Mil Molded SOJ 44-pin 400-Mil Molded SOJ Pb-free 51-85087 44-pin TSOP Type II Pb-free 51-85087 44-pin TSOP Type II 44-pin TSOP Type II Pb-free 51-85096 48-ball FBGA Pb-free 51-85082 44-pin 400-Mil Molded SOJ 1 Added Automotive Specifications to datasheet 2 Added Pb-free devices in the Ordering Information E 334398 See ECN SYT Added Pb-free on page 9 and 10 F 493565 See ECN NXR Added Automotive-A operating range Corrected typo in the Pin Definition table Changed the description of IIX from Input Load Current to Input Leakage Current in DC Electrical Characteristics table Removed IOS parameter from DC Electrical Characteristics table Updated the ordering information table G 563963 See ECN VKN Added tPOWER specification in the AC Switching Characteristics table Added footnote 8 H 1390863 See ECN VKN/AESA Corrected TSOP II package outline Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All product and company names mentioned in this document are the trademarks of their respective holders. Page 14 of 14

PDF Datasheet Preview

CY7C1021CV33
1-Mbit 64K x 16 Static RAM
• Temperature ranges Commercial 0°C to 70°C Industrial to 85°C Automotive-A to 85°C Automotive-E to 125°C
• Pin and function compatible with CY7C1021BV33
• High speed tAA = 8 ns Commercial & Industrial tAA = 12 ns Automotive-E
• CMOS for optimum speed and power
• Low active power 325 mW max
• Automatic power down when deselected
• Independent control of upper and lower bits
• Available in Pb-free and non Pb-free 44-pin 400 Mil SOJ, 44-pin TSOP II and 48-Ball FBGA packages

Functional Description

The CY7C1021CV33 is a high performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power down feature that significantly reduces power consumption when deselected.

Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte Low Enable BLE is LOW, then data from IO pins IO1 through IO8 , is written into the location specified on the address pins A0 through A15 . If Byte High Enable BHE is LOW, then data from IO pins IO9 through IO16 is written into the location specified on the address pins A0 through A15 .

Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins appear on IO1 to IO8. If Byte High Enable BHE is LOW, then data from memory appears on IO9 to IO16. For more information, see the “Truth Table” on page 9 for a complete description of Read and Write modes.

The input and output pins IO1 through IO16 are placed in a high impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , the BHE and BLE are disabled BHE, BLE HIGH , or during a write operation CE LOW and WE LOW .

For best practice recommendations, refer to the Cypress application note AN1064, SRAM System Guidelines.

Logic Block Diagram

DATA IN DRIVERS

ROW DECODER A8 A9 A10 A11 A12 A13 A14 A15

SENSE AMPS

A5 A4
64K x 16

RAM Array

COLUMN DECODER

BHE WE CE OE BLE
• San Jose, CA 95134-1709
• 408-943-2600

Selection Guide

Maximum Access Time

Maximum Operating Current

Comm’l/Ind’l

Automotive-A

Automotive-E

Maximum CMOS Standby Current

Comm’l/Ind’l

Automotive-A

Automotive-E

Pin Configuration

Figure 44-Pin SOJ/TSOP II [1]

A4 1 A3 2 A2 3 A1 4 A0 5

CE 6 IO1 7 IO2 8 IO3 9 IO4 10 VCC 11 VSS 12 IO5 13 IO6 14 IO7 15 IO8 16

WE 17 A15 18 A14 19 A13 20 A12 21
Ordering Information

Speed ns
Ordering Code
8 CY7C1021CV33-8VXC

CY7C1021CV33-8ZXC

CY7C1021CV33-8BAXC
10 CY7C1021CV33-10VC

CY7C1021CV33-10VXC

CY7C1021CV33-10ZXC

CY7C1021CV33-10ZI

CY7C1021CV33-10ZXI

CY7C1021CV33-10BAXI
12 CY7C1021CV33-12VC

CY7C1021CV33-12VXC

CY7C1021CV33-12ZXC

CY7C1021CV33-12VI

CY7C1021CV33-12VXI

CY7C1021CV33-12ZXI

CY7C1021CV33-12BAI

CY7C1021CV33-12BAXI

CY7C1021CV33-12VE

CY7C1021CV33-12VXE

CY7C1021CV33-12ZSE

CY7C1021CV33-12ZSXE

CY7C1021CV33-12BAE
15 CY7C1021CV33-15VXC

CY7C1021CV33-15ZXC

CY7C1021CV33-15ZI

CY7C1021CV33-15ZXI

CY7C1021CV33-15BAXI

CY7C1021CV33-15ZSXA

Package Diagram

Package Type
51-85082 44-pin 400-Mil Molded SOJ Pb-free
44-pin TSOP Type II Pb-free
51-85096 48-ball FBGA Pb-free
51-85082 44-pin 400-Mil Molded SOJ
44-pin 400-Mil Molded SOJ Pb-free
51-85087 44-pin TSOP Type II Pb-free
51-85087 44-pin TSOP Type II
44-pin TSOP Type II Pb-free
51-85096 48-ball FBGA Pb-free
51-85082 44-pin 400-Mil Molded SOJ
1 Added Automotive Specifications to datasheet 2 Added Pb-free devices in the Ordering Information
*E 334398 See ECN SYT Added Pb-free on page 9 and 10
*F 493565 See ECN NXR Added Automotive-A operating range Corrected typo in the Pin Definition table Changed the description of IIX from Input Load Current to Input Leakage Current in DC Electrical Characteristics table Removed IOS parameter from DC Electrical Characteristics table Updated the ordering information table
*G 563963 See ECN VKN Added tPOWER specification in the AC Switching Characteristics table Added footnote 8
*H 1390863 See ECN VKN/AESA Corrected TSOP II package outline

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

All product and company names mentioned in this document are the trademarks of their respective holders.

Page 14 of 14

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Datasheet ID: CY7C1021CV33-8ZXC 507895