CY7C09199V-9AXI

CY7C09199V-9AXI Datasheet

CY7C09079V/89V/99V CY7C09179V/89V/99V

Part	Datasheet
CY7C09199V-9AXI	CY7C09199V-9AXI (pdf)

Related Parts	Information
CY7C09199V-9AXC	CY7C09199V-9AXC
CY7C09179V-6AXC	CY7C09179V-6AXC
CY7C09199V-7AXC	CY7C09199V-7AXC
CY7C09199V-6AXC	CY7C09199V-6AXC
CY7C09199V-12AXC	CY7C09199V-12AXC
CY7C09189V-6AXC	CY7C09189V-6AXC
CY7C09189V-12AXC	CY7C09189V-12AXC
CY7C09099V-6AXC	CY7C09099V-6AXC
CY7C09089V-6AXC	CY7C09089V-6AXC
CY7C09089V-12AXC	CY7C09089V-12AXC
CY7C09099V-12AC	CY7C09099V-12AC
CY7C09179V-12AXC	CY7C09179V-12AXC
CY7C09089V-12AXI	CY7C09089V-12AXI

PDF Datasheet Preview
CY7C09079V/89V/99V CY7C09179V/89V/99V CY7C09079V/89V/99V CY7C09179V/89V/99V 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM • True Dual-Ported memory cells which enable simultaneous access of the same memory location • 6 Flow-Through and Pipelined devices • 32K x 8/9 organizations CY7C09079V/179V • 64K x 8/9 organizations CY7C09089V/189V • 128K x 8/9 organizations CY7C09099V/199V • 3 Modes • Flow-Through • Pipelined • Burst • Pipelined output mode on both ports enables fast 100 MHz operation • 0.35-micron CMOS for optimum speed and power Logic Block Diagram R/WL OEL • High speed clock to data access ns max. • 3.3V low operating power • Active= 115 mA typical • Standby= 10 uA typical • Fully synchronous interface for easier operation • Burst counters increment addresses internally • Shorten cycle times • Minimize bus noise • Supported in Flow-Through and Pipelined modes • Dual Chip Enables for easy depth expansion • Automatic power down • Commercial and Industrial temperature ranges • Available in 100-pin TQFP • Pb-free packages available R/WR OER CE0L CE1L CE0R CE1R FT/PipeL I/O Control I/O Control FT/PipeR CLKL ADSL CNTENL CNTRSTL 15/16/17 Counter/ Address Register Decode True Dual-Ported RAM Array Notes See page 6 for Load Conditions. for x8 devices, for x9 devices. for 32K, for 64K, and for 128K devices. Counter/ Address Register Decode 15/16/17 CLKR ADSR CNTENR CNTRSTR • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY7C09079V/89V/99V CY7C09179V/89V/99V Functional Description The CY7C09079V/89V/99V and CY7C09179V/89V/99V are high speed synchronous CMOS 32K, 64K, and 128K x 8/9 dual-port static RAMs. Two ports are provided, permitting independent, simultaneous access for reads and writes to any location in memory.[4] Registers on control, address, and data lines enable minimal setup and hold times. In pipelined output mode, data is registered for decreased cycle time. Clock to data valid tCD2 = ns[1] pipelined . Flow-through mode can also be used to bypass the pipelined output register to eliminate access latency. In flow-through mode, data is available tCD1 = 18 ns after the address is clocked into the device. Pipelined output or flow-through mode is selected via the FT/Pipe pin. Each port contains a burst counter on the input address register. The internal write pulse width is independent of the LOW-to-HIGH transition of the clock signal. The internal write pulse is self-timed to enable the shortest possible cycle times. Pin Configurations A HIGH on CE0 or LOW on CE1 for one clock cycle powers down the internal circuitry to reduce the static power consumption. The use of multiple Chip Enables easier banking of multiple chips for depth expansion configurations. In the pipelined mode, one cycle is required with CE0 LOW and CE1 HIGH to reactivate the outputs. Counter enable inputs are provided to stall the operation of the address input and use the internal address generated by the internal counter for fast interleaved memory applications. A port’s burst counter is loaded with the port’s Address Strobe ADS . When the port’s Count Enable CNTEN is asserted, the address counter increments on each LOW-to-HIGH transition of that port’s clock signal. This reads/writes one word from/into each successive address location until CNTEN is deasserted. The counter can address the entire memory array and loops back to the start. Counter Reset CNTRST is used to reset the burst counter. All parts are available in 100-pin Thin Quad Plastic Flatpack TQFP packages. Figure 100-Pin TQFP Top View - CY7C09099V 128K x 8 , CY7C09089V 64K x 8 ,CY7C09079V 32K x 8 NC A6L A5L A4L A3L A2L A1L A0L CNTENL CLKL ADSL GND ADSR CLKR CNTENR A0R A1R A2R A3R A4R A5R A6R NC NC A7L A8L A9L A10L A11L A12L A13L A14L [5] A15L [6] A16L VCC NC CE0L CE1L CNTRSTL R/WL OEL [7] FT/PIPEL Ordering Information 32K x8 3.3V Synchronous Dual-Port SRAM Speed ns Ordering Code CY7C09079V-6AC CY7C09079V-7AC CY7C09079V-7AI CY7C09079V-9AC CY7C09079V-12AC Package Name A100 Package Type 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack Operating Range Commercial Industrial Commercial 64K x8 3.3V Synchronous Dual-Port SRAM Speed ns Ordering Code CY7C09089V-6AC CY7C09089V-6AXC CY7C09089V-7AC CY7C09089V-9AC CY7C09089V-12AC CY7C09089V-12AXC CY7C09089V-12AXI Package Name A100 Package Type 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack Operating Range Commercial Industrial 128K x8 3.3V Synchronous Dual-Port SRAM Speed ns Ordering Code CY7C09099V-6AC CY7C09099V-6AXC CY7C09099V-7AC CY7C09099V-7AI CY7C09099V-7AXI CY7C09099V-9AC CY7C09099V-9AI CY7C09099V-12AC CY7C09099V-12AXC Package Name A100 Package Type 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack Operating Range Commercial Industrial Commercial Industrial Commercial 32K x9 3.3V Synchronous Dual-Port SRAM Speed ns Ordering Code CY7C09179V-6AC CY7C09179V-6AXC CY7C09179V-7AC CY7C09179V-9C CY7C09179V-12AC CY7C09179V-12AXC Package Name A100 Package Type 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack Operating Range Commercial Page 18 of 21 [+] Feedback CY7C09079V/89V/99V CY7C09179V/89V/99V 64K x9 3.3V Synchronous Dual-Port SRAM Speed ns Ordering Code CY7C09189V-6AC CY7C09189V-6AXC CY7C09189V-7AC CY7C09189V-9AC CY7C09189V-12AC CY7C09189V-12AXC Package Name A100 Package Type 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack Operating Range Commercial 128K x9 3.3V Synchronous Dual-Port SRAM Speed ns Ordering Code CY7C09199V-6AC CY7C09199V-6AXC CY7C09199V-7AC CY7C09199V-7AXC CY7C09199V-9AC CY7C09199V-9AXC CY7C09199V-9AI CY7C09199V-9AXI CY7C09199V-12AC CY7C09199V-12AXC Package Name A100 Package Type 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack Operating Range Commercial Industrial Commercial Page 19 of 21 [+] Feedback CY7C09079V/89V/99V CY7C09179V/89V/99V Package Diagram Figure 100-Pin Thin Plastic Quad Flat Pack TQFP A100 51-85048 51-85048-*B Page 20 of 21 [+] Feedback CY7C09079V/89V/99V CY7C09179V/89V/99V Document History Page Document Title CY7C09079V/89V/99V, CY7C09179V/89V/99V 3.3V 32K/64K/128K x 8/9Synchronous Dual Port Static RAM Document Number 38-06043 ECN No. Orig. of Orig. of Change Description of Change 110191 SZV 09/29/01 Change from Spec number 38-00667 to 38-06043 122293 RBI 12/27/02 Power up requirements added to Operating Conditions Information 365034 PCN See ECN Added Pb-Free Logo Added Pb-Free Part Ordering Information: CY7C09089V-6AXC, CY7C09089V-12AXC, CY7C09099V-6AXC, CY7C09099V-7AI, CY7C09099V-7AXI, CY7C09099V-12AXC, CY7C09179V-6AXC, CY7C09179V-12AXC, CY7C09189V-6AXC, CY7C09189V-12AXC, CY7C09199V-6AXC, CY7C09199V-7AXC, CY7C09199V-9AXC, CY7C09199V-9AXI, CY7C09199V-12AXC 2623658 VKN/PYRS 12/17/08 Added CY7C09089V-12AXI part in the Ordering information table Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com PSoC Solutions General psoc.cypress.com/solutions Low Power/Low Voltage psoc.cypress.com/low-power Precision Analog psoc.cypress.com/precision-analog LCD Drive psoc.cypress.com/lcd-drive CAN 2.0b psoc.cypress.com/can psoc.cypress.com/usb Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 21 of 21 [+] Feedback

PDF Datasheet Preview

CY7C09079V/89V/99V CY7C09179V/89V/99V

CY7C09079V/89V/99V CY7C09179V/89V/99V
3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM
• True Dual-Ported memory cells which enable simultaneous access of the same memory location
• 6 Flow-Through and Pipelined devices
• 32K x 8/9 organizations CY7C09079V/179V
• 64K x 8/9 organizations CY7C09089V/189V
• 128K x 8/9 organizations CY7C09099V/199V
• 3 Modes
• Flow-Through
• Pipelined
• Burst
• Pipelined output mode on both ports enables fast 100 MHz
operation
• 0.35-micron CMOS for optimum speed and power

Logic Block Diagram

R/WL OEL
• High speed clock to data access ns max.
• 3.3V low operating power
• Active= 115 mA typical
• Standby= 10 uA typical
• Fully synchronous interface for easier operation
• Burst counters increment addresses internally
• Shorten cycle times
• Minimize bus noise
• Supported in Flow-Through and Pipelined modes
• Dual Chip Enables for easy depth expansion
• Automatic power down
• Commercial and Industrial temperature ranges
• Available in 100-pin TQFP
• Pb-free packages available

R/WR OER

CE0L

CE1L

CE0R

CE1R

FT/PipeL

I/O Control

I/O Control

FT/PipeR

CLKL ADSL CNTENL CNTRSTL
15/16/17

Counter/ Address Register Decode

True Dual-Ported RAM Array

Notes

See page 6 for Load Conditions.
for x8 devices, for x9 devices. for 32K, for 64K, and for 128K devices.

Counter/ Address Register Decode
15/16/17

CLKR ADSR

CNTENR CNTRSTR
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

CY7C09079V/89V/99V CY7C09179V/89V/99V

Functional Description

The CY7C09079V/89V/99V and CY7C09179V/89V/99V are high speed synchronous CMOS 32K, 64K, and 128K x 8/9 dual-port static RAMs. Two ports are provided, permitting independent, simultaneous access for reads and writes to any location in memory.[4] Registers on control, address, and data lines enable minimal setup and hold times. In pipelined output mode, data is registered for decreased cycle time. Clock to data valid tCD2 = ns[1] pipelined . Flow-through mode can also be used to bypass the pipelined output register to eliminate access latency. In flow-through mode, data is available tCD1 = 18 ns after the address is clocked into the device. Pipelined output or flow-through mode is selected via the FT/Pipe pin. Each port contains a burst counter on the input address register. The internal write pulse width is independent of the LOW-to-HIGH transition of the clock signal. The internal write pulse is self-timed to enable the shortest possible cycle times.

Pin Configurations

A HIGH on CE0 or LOW on CE1 for one clock cycle powers down the internal circuitry to reduce the static power consumption. The use of multiple Chip Enables easier banking of multiple chips for depth expansion configurations. In the pipelined mode, one cycle is required with CE0 LOW and CE1 HIGH to reactivate the outputs.

Counter enable inputs are provided to stall the operation of the address input and use the internal address generated by the internal counter for fast interleaved memory applications. A port’s burst counter is loaded with the port’s Address Strobe ADS . When the port’s Count Enable CNTEN is asserted, the address counter increments on each LOW-to-HIGH transition of that port’s clock signal. This reads/writes one word from/into each successive address location until CNTEN is deasserted. The counter can address the entire memory array and loops back to the start. Counter Reset CNTRST is used to reset the burst counter.

All parts are available in 100-pin Thin Quad Plastic Flatpack TQFP packages.

Figure 100-Pin TQFP Top View - CY7C09099V 128K x 8 , CY7C09089V 64K x 8 ,CY7C09079V 32K x 8

NC A6L A5L A4L A3L A2L A1L A0L CNTENL CLKL ADSL GND ADSR CLKR CNTENR A0R A1R A2R A3R A4R A5R A6R NC

NC A7L A8L A9L A10L A11L A12L A13L A14L [5] A15L [6] A16L VCC NC CE0L CE1L CNTRSTL R/WL OEL [7] FT/PIPEL
Ordering Information
32K x8 3.3V Synchronous Dual-Port SRAM

Speed ns
Ordering Code CY7C09079V-6AC CY7C09079V-7AC CY7C09079V-7AI CY7C09079V-9AC CY7C09079V-12AC

Package Name A100

Package Type 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack

Operating Range Commercial Industrial Commercial
64K x8 3.3V Synchronous Dual-Port SRAM

Speed ns
Ordering Code

CY7C09089V-6AC

CY7C09089V-6AXC CY7C09089V-7AC

CY7C09089V-9AC

CY7C09089V-12AC

CY7C09089V-12AXC

CY7C09089V-12AXI

Package Name A100

Package Type 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack

Operating Range Commercial Industrial
128K x8 3.3V Synchronous Dual-Port SRAM

Speed ns
Ordering Code

CY7C09099V-6AC

CY7C09099V-6AXC CY7C09099V-7AC

CY7C09099V-7AI

CY7C09099V-7AXI

CY7C09099V-9AC

CY7C09099V-9AI

CY7C09099V-12AC

CY7C09099V-12AXC

Package Name A100

Package Type 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack

Operating Range Commercial Industrial Commercial Industrial Commercial
32K x9 3.3V Synchronous Dual-Port SRAM

Speed ns
Ordering Code

CY7C09179V-6AC

CY7C09179V-6AXC CY7C09179V-7AC

CY7C09179V-9C

CY7C09179V-12AC

CY7C09179V-12AXC

Package Name A100

Package Type 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack

Operating Range Commercial

Page 18 of 21 [+] Feedback

CY7C09079V/89V/99V CY7C09179V/89V/99V
64K x9 3.3V Synchronous Dual-Port SRAM

Speed ns
Ordering Code

CY7C09189V-6AC

CY7C09189V-6AXC CY7C09189V-7AC

CY7C09189V-9AC

CY7C09189V-12AC

CY7C09189V-12AXC

Package Name A100

Package Type 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack

Operating Range Commercial
128K x9 3.3V Synchronous Dual-Port SRAM

Speed ns
Ordering Code

CY7C09199V-6AC

CY7C09199V-6AXC CY7C09199V-7AC

CY7C09199V-7AXC

CY7C09199V-9AC

CY7C09199V-9AXC

CY7C09199V-9AI

CY7C09199V-9AXI

CY7C09199V-12AC

CY7C09199V-12AXC

Package Name A100

Package Type 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Pb-Free Thin Quad Flat Pack

Operating Range Commercial Industrial Commercial

Page 19 of 21 [+] Feedback

CY7C09079V/89V/99V CY7C09179V/89V/99V

Package Diagram

Figure 100-Pin Thin Plastic Quad Flat Pack TQFP A100 51-85048
51-85048-*B

Page 20 of 21 [+] Feedback

CY7C09079V/89V/99V CY7C09179V/89V/99V

Document History Page

Document Title CY7C09079V/89V/99V, CY7C09179V/89V/99V 3.3V 32K/64K/128K x 8/9Synchronous Dual Port Static RAM Document Number 38-06043

ECN No.

Orig. of Orig. of Change

Description of Change
110191 SZV
09/29/01 Change from Spec number 38-00667 to 38-06043
122293 RBI
12/27/02 Power up requirements added to Operating Conditions Information
365034 PCN

See ECN Added Pb-Free Logo
Added Pb-Free Part Ordering Information:

CY7C09089V-6AXC, CY7C09089V-12AXC, CY7C09099V-6AXC,

CY7C09099V-7AI, CY7C09099V-7AXI, CY7C09099V-12AXC,

CY7C09179V-6AXC, CY7C09179V-12AXC, CY7C09189V-6AXC,

CY7C09189V-12AXC, CY7C09199V-6AXC, CY7C09199V-7AXC,

CY7C09199V-9AXC, CY7C09199V-9AXI, CY7C09199V-12AXC
2623658 VKN/PYRS 12/17/08 Added CY7C09089V-12AXI part in the Ordering information table

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

PSoC Solutions

General
psoc.cypress.com/solutions

Low Power/Low Voltage
psoc.cypress.com/low-power

Precision Analog
psoc.cypress.com/precision-analog

LCD Drive
psoc.cypress.com/lcd-drive

CAN 2.0b
psoc.cypress.com/can
psoc.cypress.com/usb

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

All products and company names mentioned in this document may be the trademarks of their respective holders.

Page 21 of 21
[+] Feedback

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY7C09199V-9AXI Datasheet file may be downloaded here without warranties.

Datasheet ID: CY7C09199V-9AXI 507865