CY7C037-15AC

CY7C037-15AC Datasheet

CY7C027/028 CY7C037/038

Part	Datasheet
CY7C037-15AC	CY7C037-15AC (pdf)

Related Parts	Information
CY7C028-15AC	CY7C028-15AC

PDF Datasheet Preview
25/0251 CY7C027/028 CY7C037/038 • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 32K x 16 organization CY7C027 • 64K x 16 organization CY7C028 • 32K x 18 organization CY7C037 • 64K x 18 organization CY7C038 • 0.35-micron CMOS for optimum speed/power • High-speed access 12[1]/15/20 ns • Low operating power Active ICC = 180 mA typical Standby ISB3 = mA typical Logic Block Diagram R/WL UBL 32K/64K x 16/18 Dual-Port Static RAM • Fully asynchronous operation • Automatic power-down • Expandable data bus to 32/36 bits or more using Mas- ter/Slave chip select when using more than one device • On-chip arbitration logic • Semaphores included to permit software handshaking between ports • INT flags for port-to-port communication • Separate upper-byte and lower-byte control • Dual Chip Enables • Pin select for Master or Slave • Commercial and industrial temperature ranges • Available in 100-pin TQFP • Pin-compatible and functionally equivalent to IDT7027 R/WR UBR CE0L CE1L LBL OEL I/O Control I/O Control CE0R CE1R LBR OER 15/16 Address Decode True Dual-Ported RAM Array Address Decode 15/16 15/16 15/16 Interrupt Semaphore R/WL SEML BUSYL[5] INTL UBL LBL Arbitration M/S R/WR SEMR BUSYR INTR UBR LBR See page 6 for Load Conditions. for x16 devices for x18 devices. for x16 devices for x18 devices. for 32K for 64K devices. BUSY is an output in master mode and an input in slave mode. For the most recent information, visit the Cypress web site at Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 CY7C027/028 CY7C037/038 Functional Description Ordering Information 32K x16 Asynchronous Dual-Port SRAM Speed ns 12[1] Ordering Code CY7C027-12AC CY7C027-15AC CY7C027-20AC Package Name A100 A100 A100 Package Type 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 64K x16 Asynchronous Dual-Port SRAM Speed ns 12[1] Ordering Code CY7C028-12AC CY7C028-15AC CY7C028-20AC CY7C028-20AI Package Name A100 Package Type 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 32K x18 Asynchronous Dual-Port SRAM Speed ns 12[1] Ordering Code CY7C037-12AC CY7C037-15AC CY7C037-20AC Package Name A100 A100 A100 Package Type 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 64K x18 Asynchronous Dual-Port SRAM Speed ns 12[1] Ordering Code CY7C038-12AC CY7C038-15AC CY7C038-20AC CY7C038-20AI Package Name A100 Package Type 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack CY7C027/028 CY7C037/038 Operating Range Commercial Operating Range Commercial Industrial Operating Range Commercial Operating Range Commercial Industrial Page 17 of 19 Package Diagram 100-Pin Thin Plastic Quad Flat Pack TQFP A100 CY7C027/028 CY7C037/038 51-85048-A Page 18 of 19 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C027/028 CY7C037/038 Document Title CY7C027/028, CY7C037/038 32K/64K x 16/18 Dual-Port Static RAM Document Number 38-06042 Issue ECN NO. Date Orig. of Change Description of Change 110190 09/29/01 SZV Change from Spec number 38-00666 to 38-06042 122292 12/27/02 RBI Power up requirements added to Maximum Ratings Information Page 19 of 19

PDF Datasheet Preview

25/0251

CY7C027/028 CY7C037/038
• True Dual-Ported memory cells which allow simultaneous access of the same memory location
• 32K x 16 organization CY7C027
• 64K x 16 organization CY7C028
• 32K x 18 organization CY7C037
• 64K x 18 organization CY7C038
• 0.35-micron CMOS for optimum speed/power
• High-speed access 12[1]/15/20 ns
• Low operating power

Active ICC = 180 mA typical Standby ISB3 = mA typical

Logic Block Diagram

R/WL UBL
32K/64K x 16/18 Dual-Port Static RAM
• Fully asynchronous operation
• Automatic power-down
• Expandable data bus to 32/36 bits or more using Mas-
ter/Slave chip select when using more than one device
• On-chip arbitration logic
• Semaphores included to permit software handshaking
between ports
• INT flags for port-to-port communication
• Separate upper-byte and lower-byte control
• Dual Chip Enables
• Pin select for Master or Slave
• Commercial and industrial temperature ranges
• Available in 100-pin TQFP
• Pin-compatible and functionally equivalent to IDT7027

R/WR UBR

CE0L CE1L

LBL OEL

I/O Control

I/O Control

CE0R CE1R

LBR OER
15/16

Address Decode

True Dual-Ported RAM Array

Address Decode
15/16
15/16
15/16

Interrupt

Semaphore

R/WL

SEML BUSYL[5]

INTL UBL LBL

Arbitration M/S

R/WR

SEMR

BUSYR

INTR UBR LBR

See page 6 for Load Conditions. for x16 devices for x18 devices. for x16 devices for x18 devices.
for 32K for 64K devices. BUSY is an output in master mode and an input in slave mode.

For the most recent information, visit the Cypress web site at

Cypress Semiconductor Corporation
• 3901 North First Street
• San Jose
• CA 95134
• 408-943-2600

CY7C027/028 CY7C037/038

Functional Description
Ordering Information
32K x16 Asynchronous Dual-Port SRAM

Speed ns 12[1]
Ordering Code CY7C027-12AC CY7C027-15AC CY7C027-20AC

Package Name

A100

A100

A100

Package Type 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack
64K x16 Asynchronous Dual-Port SRAM

Speed ns 12[1]
Ordering Code CY7C028-12AC CY7C028-15AC CY7C028-20AC CY7C028-20AI

Package Name A100

Package Type 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack
32K x18 Asynchronous Dual-Port SRAM

Speed ns 12[1]
Ordering Code CY7C037-12AC CY7C037-15AC CY7C037-20AC

Package Name

A100

A100

A100

Package Type 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack
64K x18 Asynchronous Dual-Port SRAM

Speed ns 12[1]
Ordering Code CY7C038-12AC CY7C038-15AC CY7C038-20AC CY7C038-20AI

Package Name A100

Package Type 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack 100-Pin Thin Quad Flat Pack

CY7C027/028 CY7C037/038

Operating Range

Commercial

Operating Range

Commercial Industrial

Operating Range

Commercial

Operating Range

Commercial Industrial

Page 17 of 19

Package Diagram
100-Pin Thin Plastic Quad Flat Pack TQFP A100

CY7C027/028 CY7C037/038
51-85048-A

Page 18 of 19

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

CY7C027/028 CY7C037/038

Document Title CY7C027/028, CY7C037/038 32K/64K x 16/18 Dual-Port Static RAM Document Number 38-06042

Issue ECN NO. Date

Orig. of Change Description of Change
110190 09/29/01 SZV

Change from Spec number 38-00666 to 38-06042
122292 12/27/02 RBI

Power up requirements added to Maximum Ratings Information

Page 19 of 19

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY7C037-15AC Datasheet file may be downloaded here without warranties.

Datasheet ID: CY7C037-15AC 507854