CY62148BLL-70SC

CY62148BLL-70SC Datasheet

CY62148B MoBL

Part	Datasheet
CY62148BLL-70SC	CY62148BLL-70SC (pdf)

Related Parts	Information
CY62148BLL-70ZI	CY62148BLL-70ZI

PDF Datasheet Preview
CY62148B MoBL A2 A3 A15 A18 A13 A8 AA191 A10 • High Speed 70 ns • operation • Low active power Functional Description The CY62148B is a high-performance CMOS static RAM organized as 512K words by 8 bits. Easy memory expansion Logic Block Diagram A0 A1 A4 A5 A6 A7 A12 A14 A16 A17 CE WE ROW DECODER SENSE AMPS INPUT BUFFER 512 K x 8 ARRAY COLUMN DECODER POWER DOWN 4-Mbit 512K x 8 Static RAM is provided by an active LOW Chip Enable CE , an active LOW Output Enable OE , and three-state drivers. This device has an automatic power-down feature that reduces power consumption by more than 99% when deselected. Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. Data on the eight I/O pins I/O0 through I/O7 is then written into the location specified on the address pins A0 through A18 . Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing Write Enable WE HIGH for read. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins I/O0 through I/O7 are placed in a high-impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , or during a write operation CE LOW, and WE LOW . I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 Pin Configuration Top View SOIC TSOP II A17 1 A16 2 A14 3 A12 4 A7 5 A6 6 A4 8 A3 9 A2 10 A1 11 A0 12 I/O0 13 I/O1 14 I/O2 15 GND 16 32 VCC 31 A15 30 A18 29 WE 28 A13 27 A8 26 25 A9 A11 24 OE 23 A10 22 CE 21 I/O7 20 I/O6 19 I/O5 18 I/O4 17 I/O3 I/O2 I/O1 I/O0 Ordering Information Speed ns Ordering Code CY62148BLL-70SC Package Diagram 51-85081 Package Type 32-lead 450-Mil Molded SOIC CY62148BLL-70ZC 51-85095 32-lead TSOP II CY62148BLL-70ZRC 51-85138 32-lead RTSOP II CY62148BLL-70SI CY62148BLL-70ZI 51-85081 51-85095 32-lead 450-Mil Molded SOIC 32-lead TSOP II CY62148BLL-70ZRI 51-85138 32-lead RTSOP II Please contact your local Cypress sales representative for availability of these parts Power Standby ISB Active ICC Active ICC Active ICC Operating Range Commercial Industrial Page 7 of 11 Package Diagrams CY62148B MoBL 32-lead 450 MIL Molded SOIC 51-85081 51-85081-A Page 8 of 11 CY62148B MoBL Package Diagrams continued 32-lead Thin Small Outline Package Type II 51-85095 51-85095- All products and company names mentioned in this document may be the trademarks of their respective holders. Page 9 of 11 CY62148B MoBL Package Diagrams continued 51-85138- Page 10 of 11 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY62148B MoBL Document History Page Document Title CY62148B 4-Mbit 512K x 8 Static RAM Document Number 38-05039 ECN NO. Issue Date Orig. of Change Renamed Package Name column with Package Diagram in the Ordering Information Table Page 11 of 11

PDF Datasheet Preview

CY62148B MoBL

A2 A3 A15 A18 A13 A8 AA191 A10
• High Speed 70 ns
• operation
• Low active power

Functional Description

The CY62148B is a high-performance CMOS static RAM organized as 512K words by 8 bits. Easy memory expansion

Logic Block Diagram

A0 A1 A4 A5 A6 A7 A12 A14 A16 A17

CE WE

ROW DECODER SENSE AMPS

INPUT BUFFER
512 K x 8 ARRAY

COLUMN DECODER

POWER DOWN
4-Mbit 512K x 8 Static RAM
is provided by an active LOW Chip Enable CE , an active LOW Output Enable OE , and three-state drivers. This device has an automatic power-down feature that reduces power consumption by more than 99% when deselected.

Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. Data on the eight I/O pins I/O0 through I/O7 is then written into the location specified on the address pins A0 through A18 .

Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing Write Enable WE HIGH for read. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins I/O0 through I/O7 are placed in a high-impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , or during a write operation CE LOW, and WE LOW .

I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7

Pin Configuration

Top View SOIC TSOP II

A17 1 A16 2

A14 3 A12 4

A7 5 A6 6

A4 8 A3 9 A2 10 A1 11

A0 12 I/O0 13 I/O1 14 I/O2 15 GND 16
32 VCC
31 A15
30 A18
29 WE
28 A13
27 A8
26 25

A9 A11
24 OE
23 A10 22 CE
21 I/O7
20 I/O6 19 I/O5
18 I/O4
17 I/O3

I/O2 I/O1 I/O0
Ordering Information

Speed ns
Ordering Code CY62148BLL-70SC

Package Diagram
51-85081

Package Type 32-lead 450-Mil Molded SOIC

CY62148BLL-70ZC
51-85095 32-lead TSOP II

CY62148BLL-70ZRC
51-85138 32-lead RTSOP II

CY62148BLL-70SI CY62148BLL-70ZI
51-85081 51-85095
32-lead 450-Mil Molded SOIC 32-lead TSOP II

CY62148BLL-70ZRI
51-85138 32-lead RTSOP II

Please contact your local Cypress sales representative for availability of these parts

Power Standby ISB Active ICC Active ICC Active ICC

Operating Range

Commercial

Industrial

Page 7 of 11

Package Diagrams

CY62148B MoBL
32-lead 450 MIL Molded SOIC 51-85081
51-85081-A

Page 8 of 11

CY62148B MoBL

Package Diagrams continued
32-lead Thin Small Outline Package Type II 51-85095
51-85095-**

All products and company names mentioned in this document may be the trademarks of their respective holders.

Page 9 of 11

CY62148B MoBL

Package Diagrams continued
51-85138-**

Page 10 of 11

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

CY62148B MoBL

Document History Page

Document Title CY62148B 4-Mbit 512K x 8 Static RAM Document Number 38-05039

ECN NO.

Issue Date

Orig. of Change
Renamed Package Name column with Package Diagram in the Ordering

Information Table

Page 11 of 11

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY62148BLL-70SC Datasheet file may be downloaded here without warranties.

Datasheet ID: CY62148BLL-70SC 507818