CY62147DV30L-55BVXET

CY62147DV30L-55BVXET Datasheet

CY62147DV30

Part	Datasheet
CY62147DV30L-55BVXET	CY62147DV30L-55BVXET (pdf)

Related Parts	Information
CY62147DV30L-55BVXE	CY62147DV30L-55BVXE
CY62147DV30L-55ZSXE	CY62147DV30L-55ZSXE
CY62147DV30L-55ZSXET	CY62147DV30L-55ZSXET
CY62147DV30LL-70BVXAT	CY62147DV30LL-70BVXAT
CY62147DV30LL-70BVXA	CY62147DV30LL-70BVXA

PDF Datasheet Preview
CY62147DV30 4-Mbit 256K x 16 Static RAM • Temperature Ranges Industrial to +85°C Automotive-A to +85°C Automotive-E to +125°C • Very high speed 45 ns • Wide voltage range • Pin-compatible with CY62147CV25, CY62147CV30, and CY62147CV33 • Ultra-low active power Typical active current mA f = 1 MHz Typical active current 8 mA f = fmax • Ultra low standby power • Easy memory expansion with CE, and OE features • Automatic power-down when deselected • CMOS for optimum speed/power • Available in Pb-free and non Pb-free 48-ball VFBGA and non Pb-free 44-pin TSOPII • Byte power-down feature Functional Description[1] The CY62147DV30 is a high-performance CMOS static RAM organized as 256K words by 16 bits. This device features ad- vanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins I/O0 through I/O15 are placed in a high-impedance state when deselected CE HIGH , outputs are disabled OE HIGH , both Byte High Enable and Byte Low Enable are disabled BHE, BLE HIGH , or during a write operation CE LOW and WE LOW . Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte Low Enable BLE is LOW, then data from I/O pins I/O0 through I/O7 , is written into the location specified on the address pins A0 through A17 . If Byte High Enable BHE is LOW, then data from I/O pins I/O8 through I/O15 is written into the location specified on the address pins A0 through A17 . Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable BHE is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of read and write modes. The CY62147DV30 is available in a 48-ball VFBGA, 44 Pin TSOPII packages. Logic Block Diagram A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 DATA IN DRIVERS 256K x 16 RAM Array ROW DECODER A11 A12 A13 A14 A15 A16 A17 SENSE AMPS COLUMN DECODER Power -Down Circuit CE BHE BLE BHE WE CE OE BLE Note For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback Pin Configuration[2, 3, 4] VFBGA Top View BLE OE A0 A1 A2 NC I/O8 BHE A3 A4 CE I/O0 I/O9 I/O10 A5 A6 I/O1 I/O2 VSS I/O11 A17 A7 I/O3 Vcc VCC I/O12 DNU A16 I/O4 Vss I/O14 I/O13 A14 A15 I/O5 I/O6 I/O15 NC A12 A13 WE I/O7 NC A8 A9 A10 A11 NC CY62147DV30 44 TSOP II Top View A4 1 A3 2 A2 3 A1 4 A0 5 CE 6 I/O0 7 I/O1 8 I/O2 9 I/O3 10 VCC 11 VSS 12 I/O4 13 I/O5 14 I/O6 15 I/O7 16 WE 17 Ordering Information Speed ns 45 55 Ordering Code CY62147DV30LL-45BVXI CY62147DV30LL-45ZSXI CY62147DV30LL-55BVI CY62147DV30LL-55BVXI CY62147DV30LL-55ZSXI CY62147DV30L-55BVXE CY62147DV30L-55ZSXE CY62147DV30LL-70BVI CY62147DV30LL-70BVXA Package Diagram 51-85150 51-85087 51-85150 51-85087 51-85150 51-85087 51-85150 Package Type 48-ball 6 mm x 8mm x 1 mm VFBGA Pb-free 44-pin TSOP II Pb-free 48-ball 6 mm x 8mm x 1 mm VFBGA 48-ball 6 mm x 8mm x 1 mm VFBGA Pb-free 44-pin TSOP II Pb-free 48-ball 6 mm x 8mm x 1 mm VFBGA Pb-free 44-pin TSOP II Pb-free 48-ball 6 mm x 8mm x 1 mm VFBGA 48-ball 6 mm x 8mm x 1 mm VFBGA Pb-free Power Standby ISB Standby ISB Active ICC Active ICC Active ICC Active ICC Active ICC Active ICC Active ICC Active ICC Active ICC Operating Range Industrial Industrial Automotive-E Industrial Automotive-A Page 9 of 12 [+] Feedback Package Diagram TOP VIEW A1 CORNER 12 3 4 5 6 A B C D E F G H C MAX. SEATING PLANE C CY62147DV30 48-ball VFBGA 6 x 8 x 1 mm 51-85150 BOTTOM VIEW A1 CORNER M C M C A B Ø0.30±0.05 48X 6 54 3 2 1 A B C D E F G H B 0.15 4X 51-85150-D MAX. Page 10 of 12 [+] Feedback Package Diagram continued 44-Pin TSOP II 51-85087 CY62147DV30 51-85087-A MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Page 11 of 12 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Modified Ordering Information for Pb-free parts 257349 See ECN PCI Modified ordering information for 70-ns Speed Bin 316039 See ECN PCI Added 45-ns Speed Bin in AC, DC and Ordering Information tables Added Footnote #10 on page #4 Added Pb-free package ordering information on page # 9 Changed 44-lead TSOP-II package name on page 11 from Z44 to ZS44 Standardized Icc values across ‘L’ and ‘LL’ bins 330365 See ECN AJU Added Automotive product information 498575 See ECN NXR Added Automotive-A range Added note# 9 on page# 3 Updated ordering information table Page 12 of 12 [+] Feedback

PDF Datasheet Preview

CY62147DV30
4-Mbit 256K x 16 Static RAM
• Temperature Ranges Industrial to +85°C Automotive-A to +85°C Automotive-E to +125°C
• Very high speed 45 ns
• Wide voltage range
• Pin-compatible with CY62147CV25, CY62147CV30, and

CY62147CV33
• Ultra-low active power

Typical active current mA f = 1 MHz Typical active current 8 mA f = fmax
• Ultra low standby power
• Easy memory expansion with CE, and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Available in Pb-free and non Pb-free 48-ball VFBGA and non Pb-free 44-pin TSOPII
• Byte power-down feature

Functional Description[1]

The CY62147DV30 is a high-performance CMOS static RAM organized as 256K words by 16 bits. This device features ad-
vanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins I/O0 through I/O15 are placed in a high-impedance state when deselected CE HIGH , outputs are disabled OE HIGH , both Byte High Enable and Byte Low Enable are disabled BHE, BLE HIGH , or during a write operation CE LOW and WE LOW .

Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte Low Enable BLE is LOW, then data from I/O pins I/O0 through I/O7 , is written into the location specified on the address pins A0 through A17 . If Byte High Enable BHE is LOW, then data from I/O pins I/O8 through I/O15 is written into the location specified on the address pins A0 through A17 .

Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable BHE is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of read and write modes.

The CY62147DV30 is available in a 48-ball VFBGA, 44 Pin TSOPII packages.

Logic Block Diagram

A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

DATA IN DRIVERS
256K x 16 RAM Array

ROW DECODER A11 A12 A13 A14 A15 A16 A17

SENSE AMPS

COLUMN DECODER

Power -Down Circuit

CE BHE BLE

BHE WE

CE OE BLE

Note For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on

Cypress Semiconductor Corporation
• 198 Champion Court
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

Pin Configuration[2, 3, 4]

VFBGA Top View

BLE OE A0 A1 A2 NC

I/O8 BHE A3 A4 CE I/O0

I/O9 I/O10 A5 A6 I/O1 I/O2

VSS I/O11 A17 A7 I/O3 Vcc

VCC I/O12 DNU A16 I/O4 Vss

I/O14 I/O13 A14 A15 I/O5 I/O6

I/O15 NC A12 A13 WE I/O7

NC A8 A9 A10 A11 NC

CY62147DV30
44 TSOP II Top View

A4 1 A3 2 A2 3 A1 4 A0 5 CE 6

I/O0 7 I/O1 8 I/O2 9

I/O3 10 VCC 11 VSS 12 I/O4 13 I/O5 14 I/O6 15 I/O7 16 WE 17
Ordering Information

Speed ns 45 55
Ordering Code CY62147DV30LL-45BVXI CY62147DV30LL-45ZSXI CY62147DV30LL-55BVI CY62147DV30LL-55BVXI CY62147DV30LL-55ZSXI CY62147DV30L-55BVXE CY62147DV30L-55ZSXE CY62147DV30LL-70BVI CY62147DV30LL-70BVXA

Package Diagram 51-85150 51-85087 51-85150
51-85087 51-85150 51-85087 51-85150

Package Type 48-ball 6 mm x 8mm x 1 mm VFBGA Pb-free 44-pin TSOP II Pb-free 48-ball 6 mm x 8mm x 1 mm VFBGA 48-ball 6 mm x 8mm x 1 mm VFBGA Pb-free 44-pin TSOP II Pb-free 48-ball 6 mm x 8mm x 1 mm VFBGA Pb-free 44-pin TSOP II Pb-free 48-ball 6 mm x 8mm x 1 mm VFBGA 48-ball 6 mm x 8mm x 1 mm VFBGA Pb-free

Power Standby ISB Standby ISB Active ICC Active ICC

Active ICC

Active ICC Active ICC Active ICC Active ICC Active ICC

Active ICC

Operating Range

Industrial

Industrial

Automotive-E

Industrial Automotive-A

Page 9 of 12 [+] Feedback

Package Diagram

TOP VIEW

A1 CORNER
12 3 4 5 6

A B C D E F G H

C MAX.

SEATING PLANE C

CY62147DV30
48-ball VFBGA 6 x 8 x 1 mm 51-85150

BOTTOM VIEW A1 CORNER

M C M C A B Ø0.30±0.05 48X
6 54 3 2 1

A B C D E F G H

B 0.15 4X
51-85150-*D

MAX.

Page 10 of 12 [+] Feedback

Package Diagram continued
44-Pin TSOP II 51-85087

CY62147DV30
51-85087-*A

MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders.

Page 11 of 12

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Modified Ordering Information for Pb-free parts
257349 See ECN
PCI Modified ordering information for 70-ns Speed Bin
316039 See ECN
PCI Added 45-ns Speed Bin in AC, DC and Ordering Information tables

Added Footnote #10 on page #4
Added Pb-free package ordering information on page # 9

Changed 44-lead TSOP-II package name on page 11 from Z44 to ZS44

Standardized Icc values across ‘L’ and ‘LL’ bins
330365 See ECN AJU Added Automotive product information
498575 See ECN NXR Added Automotive-A range

Added note# 9 on page# 3
Updated ordering information table

Page 12 of 12 [+] Feedback

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY62147DV30L-55BVXET Datasheet file may be downloaded here without warranties.

Datasheet ID: CY62147DV30L-55BVXET 507816