CY62137CV30/33 CY62137CV
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CY62137CVSL-70BAXIT (pdf) |
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CY62137CV30LL-55BVXI |
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CY62137CV30LL-55BVXIT |
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CY62137CV30LL-70BVXET |
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CY62137CVSL-70BAXI |
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CY62137CV30LL-70BVXE |
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CY62137CV30/33 CY62137CV 2-Mbit 128K x 16 Static RAM • Very high speed 55 ns • Temperature Ranges Industrial - 40°C to + 85°C Automotive - 40°C to + 125°C • Pin-compatible with the CY62137V • Ultra-low active power Typical active current mA f = 1 MHz Typical active current 7 mA f = fMax 55 ns speed • Low and ultra-low standby power • Easy memory expansion with CE and OE features • Automatic power-down when deselected • CMOS for optimum speed/power • Available in Pb-free and non Pb-free 48-ball FBGA package Functional Description[1] The CY62137CV30/33 and CY62137CV are high-performance CMOS static RAMs organized as 128K words by 16 bits. These devices feature advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life in portable applications such as cellular telephones. The devices also has an automatic power-down feature that significantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins I/O0 through I/O15 are placed in a high-impedance state when deselected CE HIGH , outputs are disabled OE HIGH , both Byte High Enable and Byte Low Enable are disabled BHE, BLE HIGH , or during a write operation CE LOW, and WE LOW . Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte Low Enable BLE is LOW, then data from I/O pins I/O0 through I/O7 , is written into the location specified on the address pins A0 through A16 . If Byte High Enable BHE is LOW, then data from I/O pins I/O8 through I/O15 is written into the location specified on the address pins A0 through A16 . Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable BHE is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of read and write modes. Logic Block Diagram A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 DATA IN DRIVERS 128K x 16 RAM Array ROW DECODER A11 A12 A13 A14 A15 A16 SENSE AMPS COLUMN DECODER Power -Down Circuit CE BHE BLE BHE WE CE OE BLE Note For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback Product Portfolio Product Range CY62137CV30LL Industrial CY62137CV30LL Automotive CY62137CV33LL Industrial CY62137CVSL Industrial CY62137CV30/33 CY62137CV VCC Range V Min. Typ.[2] Max. Speed ns 55 70 55 70 Power Dissipation Operating, ICC mA f = 1 MHz f = fMax Typ.[2] Max. Typ.[2] Max. Standby, ISB2 µA Typ.[2] Max. Pin Configuration[3, 4] 48-ball VFBGA Top View Ordering Information Speed ns Ordering Code Package Diagram Package Type 55 CY62137CV30LL-55BVI CY62137CV30LL-55BVXI CY62137CV33LL-55BVI 70 CY62137CV30LL-70BAI CY62137CV30LL-70BVI CY62137CVSL-70BAI CY62137CVSL-70BAXI 51-85150 48-ball FBGA 6 x 8 x 1 mm 48-ball FBGA 6 x 8 x 1 mm Pb-free 48-ball FBGA 6 x 8 x 1 mm 51-85096 48-ball FBGA 7 x 7 x mm 51-85150 48-ball FBGA 6 x 8 x 1 mm 51-85096 48-ball FBGA 7 x 7 x mm 48-ball FBGA 7 x 7 x mm Pb-free CY62137CV30LL-70BAE 51-85096 48-ball FBGA 7 x 7 x mm CY62137CV30LL-70BVE 51-85150 48-ball FBGA 6 x 8 x 1 mm CY62137CV30LL-70BVXE 48-ball FBGA 6 x 8 x 1 mm Pb-free Please contact your local Cypress sales representative for availability of these parts Operating Range Industrial Industrial Automotive Page 10 of 13 [+] Feedback Package Diagrams CY62137CV30/33 CY62137CV 48-ball FBGA 7 x 7 x mm 51-85096 TOP VIEW PIN 1 CORNER LASER MARK 12 3 4 5 6 A B C D E F G H BOTTOM VIEW M C M C A B Ø0.30±0.05 48X 6 54321 PIN 1 CORNER A B C D E F G H B 0.15 4X SEATING PLANE C MAX. 51-85096-*F Page 11 of 13 [+] Feedback CY62137CV30/33 CY62137CV Package Diagrams continued 48-ball VFBGA 6 x 8 x 1 mm 51-85150 TOP VIEW A1 CORNER 12 3 4 5 6 Added Automotive Information in Operating Range, DC and Ordering Information Table *F 419237 See ECN Changed the address of Cypress Semiconductor Corporation on Page #1 from “3901 North First Street” to “198 Champion Court” Updated the ordering information table and replaced the Package name column with Package diagram *G 486789 See ECN VKN Removed part number CY62137CV25 from the product offering Updated the ordering information table Page 13 of 13 [+] Feedback |
More datasheets: LXV200-048S | LXV200-054S | LXV200-105S | LXV200-050S | LXV200-052S | LXV200-105SW | CVFSC7 | 1804 | CY62137CV30LL-55BVXI | CY62137CV30LL-55BVXIT |
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