CY26580KOI-2T

CY26580KOI-2T Datasheet

CY26580

Part	Datasheet
CY26580KOI-2T	CY26580KOI-2T (pdf)

Related Parts	Information
CY26580OI-2T	CY26580OI-2T
CY26580OI-2	CY26580OI-2
CY26580KOI-2	CY26580KOI-2

PDF Datasheet Preview
CY26580 PacketClock Network Applications Clock • Integrated phase-locked loop PLL • Low-jitter, high-accuracy outputs • 3.3V operation • Internal PLL with precision operation • Meets critical timing requirements in complex system designs • Enables application compatibility Table Frequency Table Part Number Outputs CY26580-1 Input Frequency 125MHz or 25-MHz driven Output Frequencies 100 MHz, MHz Logic Block Diagram CLK OSC. OUTPUT MULTIPLEXER AND DIVIDERS SEL_25 SEL_CLK Table Input Select Options SEL_25 X 0 1 SEL_CLK 0 1 VDD GND Input Type Driven Input Frequency CLK1 Do not use MHz 100 MHz CLK2 Unit • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY26580 Pin Configuration Figure CY26580 20-pin SSOP QSOP NC 1 NC 2 CLK 3 VDD 4 NC 5 GND 6 NC 7 NC 8 NC 9 133 MHz 10 20 NC 19 SEL_CLK 18 NC 17 100 MHz 16 VDD 15 NC 14 GND 13 NC 12 NC 11 SEL_25 Table Pin Definition Ordering Information Ordering Code[3] Package Type 20-pin SSOP QSOP 20-pin SSOP QSOP Tape and Reel 20-pin SSOP QSOP 20-pin SSOP QSOP Tape and Reel Pb-Free 20-pin SSOP QSOP 20-pin SSOP QSOP Tape and Reel Temperature Range Industrial Industrial Operating Voltage 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V Notes Part numbers ending in -1 and -1T have been replaced by part numbers ending in -2 and -2T. Specifications for -1, -1T, -2 and -2T part numbers are identical. Not recommended for new designs. Page 4 of 6 [+] Feedback Package Drawing and Dimensions Figure 20-lead QSOP O201 and SQ201 CY26580 51-85054-*B Page 5 of 6 [+] Feedback CY26580 Document History Page ECN NO. Submission Date Orig. of Change Description of Change 127357 06/17/03 RGL New Data Sheet 128564 09/12/03 IJA Change pin 1 to NC and pin 3 to CLK 216828 See ECN RGL Removed Preliminary 2442066 See ECN KVM/AESA Updated template. Added Note “Not recommended for new designs.” Added Note explaining “-1” and “-2” part numbers. Removed part numbers CY26580OI-1 and CY26580OI-1T. Added part number and in ordering information table. Updated figure caption for package drawing. Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com PSoC Solutions General psoc.cypress.com/solutions Low Power/Low Voltage psoc.cypress.com/low-power Precision Analog psoc.cypress.com/precision-analog LCD Drive psoc.cypress.com/lcd-drive CAN 2.0b psoc.cypress.com/can psoc.cypress.com/usb Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. PacketClock is a trademark of Cypress Semiconductor. All product and company names mentioned in this document may be the trademarks of their respective holders. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 6 of 6 [+] Feedback

PDF Datasheet Preview

CY26580

PacketClock Network Applications Clock
• Integrated phase-locked loop PLL
• Low-jitter, high-accuracy outputs
• 3.3V operation
• Internal PLL with precision operation
• Meets critical timing requirements in complex system designs
• Enables application compatibility

Table Frequency Table

Part Number Outputs

CY26580-1

Input Frequency 125MHz or 25-MHz driven

Output Frequencies 100 MHz, MHz

Logic Block Diagram

CLK OSC.

OUTPUT MULTIPLEXER

AND DIVIDERS

SEL_25 SEL_CLK

Table Input Select Options

SEL_25 X 0 1

SEL_CLK 0 1

VDD GND

Input Type

Driven

Input Frequency

CLK1

Do not use

MHz 100 MHz

CLK2

Unit
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

CY26580

Pin Configuration

Figure CY26580 20-pin SSOP QSOP

NC 1 NC 2 CLK 3

VDD 4

NC 5 GND 6

NC 7 NC 8 NC 9 133 MHz 10
20 NC
19 SEL_CLK
18 NC
17 100 MHz
16 VDD 15 NC 14 GND 13 NC 12 NC 11 SEL_25

Table Pin Definition
Ordering Information
Ordering Code[3]

Package Type 20-pin SSOP QSOP 20-pin SSOP QSOP Tape and Reel
20-pin SSOP QSOP
20-pin SSOP QSOP Tape and Reel

Pb-Free
20-pin SSOP QSOP
20-pin SSOP QSOP Tape and Reel

Temperature Range Industrial

Industrial

Operating Voltage 3.3V 3.3V 3.3V 3.3V
3.3V 3.3V

Notes Part numbers ending in -1 and -1T have been replaced by part numbers ending in -2 and -2T. Specifications for -1, -1T, -2 and -2T part numbers are identical. Not recommended for new designs.

Page 4 of 6
[+] Feedback

Package Drawing and Dimensions

Figure 20-lead QSOP O201 and SQ201

CY26580
51-85054-*B

Page 5 of 6 [+] Feedback

CY26580

Document History Page

ECN NO.

Submission Date

Orig. of Change

Description of Change
127357
06/17/03

RGL New Data Sheet
128564
09/12/03

IJA Change pin 1 to NC and pin 3 to CLK
216828 See ECN

RGL Removed Preliminary
2442066 See ECN KVM/AESA Updated template. Added Note “Not recommended for new designs.” Added

Note explaining “-1” and “-2” part numbers.

Removed part numbers CY26580OI-1 and CY26580OI-1T.

Added part number
and in ordering information table.

Updated figure caption for package drawing.

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

PSoC Solutions

General
psoc.cypress.com/solutions

Low Power/Low Voltage
psoc.cypress.com/low-power

Precision Analog
psoc.cypress.com/precision-analog

LCD Drive
psoc.cypress.com/lcd-drive

CAN 2.0b
psoc.cypress.com/can
psoc.cypress.com/usb

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

PacketClock is a trademark of Cypress Semiconductor. All product and company names mentioned in this document may be the trademarks of their respective holders. All products and company names mentioned in this document may be the trademarks of their respective holders.

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More datasheets: DM74ALS37AMX | DM74ALS37AM | 1508625W3D | 1508625UG3 | 1508625UY3 | 1508625UR3 | 1508625B3 | 1508625W3 | CY26580OI-2T | CY26580OI-2

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Datasheet ID: CY26580KOI-2T 507716