CY26114ZC

CY26114ZC Datasheet

CY26114

Part	Datasheet
CY26114ZC	CY26114ZC (pdf)

Related Parts	Information
CY26114ZCT	CY26114ZCT
CY26114KZC	CY26114KZC
CY26114KZCT	CY26114KZCT

PDF Datasheet Preview
CY26114 One-PLL Clock Generator • Integrated phase-locked loop • Low skew, low jitter, high accuracy outputs • 3.3V operation with V output option Part Number Outputs CY26114 Input Frequency 25 MHz Crystal Input • Internal PLL with up to 333 MHz internal operation. • Meets critical timing requirements in complex system designs. • Enables application compatibility. Output Frequency Range 2 copies of 100 MHz, 1 copy of 50 MHz, 1 copy 25, 33, 50, and 66 MHz frequency selectable Logic Block Diagram XIN XOUT OSC. FS0 FS1 OUTPUT MULTIPLEXER AND DIVIDERS frequency selectable 100MHz 50MHz 25/33/50/66MHz VDDL VDD AVDD AVSS VSS VSSL CLK4 Frequency Select Options CLK 4 25 33 50 66 Units MHz • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY26114 Pin Configurations Figure CY26114, 16-Pin TSSOP XIN 1 VDD 2 AVDD 3 FS0 4 AVSS 5 VSSL 6 LCLK1 7 LCLK2 8 16 XOUT 15 CLK4 14 CLK3 13 VSS 12 N/C 11 VDDL 10 FS1 9 N/C Table Pin Definitions Name XIN VDD AVDD FS0 AVSS VSSL LCLK1 LCLK2 N/C FS1 VDDL N/C VSS CLK3 CLK4 XOUT[1] Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description Reference Crystal Input Voltage Supply Analog Voltage Supply Frequency Select 0 Analog Ground LCLK Ground 100 MHz Output clock at VDDL Level 100 MHz Output clock at VDDL Level No Connect Frequency Select 1 LCLK Voltage Supply 2.5V or 3.3V No Connect Ground 50 MHz Output Clock 25, 33, 50, and 66 MHz Clock Output frequency selectable Reference Crystal Output Note Float XOUT if XIN is externally driven. Page 2 of 5 [+] Feedback CY26114 Absolute Maximum Conditions Parameter VDD VDDL Ordering Information Ordering Code CY26114ZC[3] CY26114KZC CY26114KZCT Package Name Z16 Package Type 16-Pin TSSOP 16-Pin TSSOP 16-Pin TSSOP- Tape and Reel Operating Range Commercial Operating Voltage 3.3V 3.3V 3.3V Note Not recommended for new designs. Page 4 of 5 [+] Feedback CY26114 Document History Page Document Title CY26114 One-PLL Clock Generator Document Number 38-07098 ECN No. Origin of Submission Change Description of Change 107333 12/14/02 New Data Sheet 121867 08/28/01 Power up requirements added to Operating Conditions Information 2441946 AESA 05/15/08 Updated template. Added Note “Not recommended for new designs.” Added part number CY26114KZC, and CY26114KZCT in ordering infor- mation table. Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com PSoC Solutions General psoc.cypress.com/solutions Low Power/Low Voltage psoc.cypress.com/low-power Precision Analog psoc.cypress.com/precision-analog LCD Drive psoc.cypress.com/lcd-drive CAN 2.0b psoc.cypress.com/can psoc.cypress.com/usb Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 5 of 5 [+] Feedback

PDF Datasheet Preview

CY26114

One-PLL Clock Generator
• Integrated phase-locked loop
• Low skew, low jitter, high accuracy outputs
• 3.3V operation with V output option

Part Number Outputs

CY26114

Input Frequency 25 MHz Crystal Input
• Internal PLL with up to 333 MHz internal operation.
• Meets critical timing requirements in complex system designs.
• Enables application compatibility.

Output Frequency Range 2 copies of 100 MHz, 1 copy of 50 MHz, 1 copy 25, 33, 50, and 66 MHz frequency selectable

Logic Block Diagram

XIN XOUT

OSC.

FS0 FS1

OUTPUT MULTIPLEXER

AND DIVIDERS
frequency selectable
100MHz 50MHz
25/33/50/66MHz

VDDL

VDD AVDD AVSS VSS VSSL

CLK4 Frequency Select Options

CLK 4 25 33 50 66

Units MHz
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

CY26114

Pin Configurations

Figure CY26114, 16-Pin TSSOP

XIN 1 VDD 2 AVDD 3 FS0 4 AVSS 5 VSSL 6

LCLK1 7 LCLK2 8
16 XOUT 15 CLK4 14 CLK3 13 VSS 12 N/C 11 VDDL 10 FS1 9 N/C

Table Pin Definitions

Name

XIN VDD AVDD FS0 AVSS VSSL LCLK1 LCLK2 N/C FS1 VDDL N/C VSS CLK3 CLK4 XOUT[1]

Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Description Reference Crystal Input Voltage Supply Analog Voltage Supply Frequency Select 0 Analog Ground LCLK Ground 100 MHz Output clock at VDDL Level 100 MHz Output clock at VDDL Level No Connect Frequency Select 1 LCLK Voltage Supply 2.5V or 3.3V No Connect Ground 50 MHz Output Clock 25, 33, 50, and 66 MHz Clock Output frequency selectable Reference Crystal Output

Note Float XOUT if XIN is externally driven.

Page 2 of 5 [+] Feedback

CY26114

Absolute Maximum Conditions

Parameter

VDD VDDL
Ordering Information
Ordering Code CY26114ZC[3] CY26114KZC CY26114KZCT

Package Name Z16

Package Type 16-Pin TSSOP 16-Pin TSSOP 16-Pin TSSOP- Tape and Reel

Operating Range Commercial

Operating Voltage 3.3V 3.3V 3.3V

Note Not recommended for new designs.

Page 4 of 5 [+] Feedback

CY26114

Document History Page

Document Title CY26114 One-PLL Clock Generator Document Number 38-07098

ECN No.

Origin of Submission

Change

Description of Change
107333
12/14/02 New Data Sheet
121867
08/28/01 Power up requirements added to Operating Conditions Information
2441946

AESA
05/15/08 Updated template. Added Note “Not recommended for new designs.”
Added part number CY26114KZC, and CY26114KZCT in ordering infor-
mation table.

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

PSoC Solutions

General
psoc.cypress.com/solutions

Low Power/Low Voltage
psoc.cypress.com/low-power

Precision Analog
psoc.cypress.com/precision-analog

LCD Drive
psoc.cypress.com/lcd-drive

CAN 2.0b
psoc.cypress.com/can
psoc.cypress.com/usb

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

All products and company names mentioned in this document may be the trademarks of their respective holders.

Page 5 of 5
[+] Feedback

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY26114ZC Datasheet file may be downloaded here without warranties.

Datasheet ID: CY26114ZC 507715