CY25200FZXCT

CY25200FZXCT Datasheet

CY25200

Part	Datasheet
CY25200FZXCT	CY25200FZXCT (pdf)

Related Parts	Information
CY25200FZXC	CY25200FZXC

PDF Datasheet Preview
CY25200 Programmable Spread Spectrum Clock Generator for EMI Reduction • Wide Operating Output SSCLK Frequency Range 3 to 200 MHz • Programmable Spread Spectrum with Nominal kHz modulation Frequency • Center Spread to • Down Spread to • Input Frequency Range External crystal 8 to 30 MHz fundamental crystals External reference 8 to 166 MHz clock • Integrated Phase-Locked Loop PLL • Programmable Crystal Load Capacitor Tuning Array • Low Cycle-to-Cycle Jitter • 3.3V Operation with 2.5V Output Clock Drive Option • Spread Spectrum On and Off Function • Power Down or Output Enable Function • Output Frequency Select Option • Field-Programmable • Package 16 Pin TSSOP The CY25200 is a programmable clock generator with spread spectrum capability. Spread spectrum modulates the output clock frequency over a small range, spreading the energy and reducing the energy peak. This is a powerful technique to reduce EMI in a variety of applications. It uses either an external reference clock or a crystal for an input. It also uses a PLL to generate a spread spectrum output clock that can be a different frequency than the input. Up to six output clocks are available and up to two of them can be REFCLKs copies of the input clock, without spread . The CY25200 is highly configurable. Programmable variables include the input and output frequencies, spread percentage, center spread or down spread, and control pin functions. The oscillator pin capacitance can also be programmed to match the load capacitance requirement CL of the crystal, eliminating the need for external capacitors. Available features include Output Enable, Power Down, Spread On/Off, Frequency Select, and the option to power some output clocks at 2.5V. Cypress’ web-based CyberClocks Online software is used to configure the device. Programmability enables fast prototyping, which is particularly useful when doing EMC testing and determining the optimal spread settings. Logic Block Diagram XIN/CLKIN 1 XOUT 16 CXOUT OSC. CXIN Divider Bank 1 Divider Bank 2 Output Select Matrix 13 11 VDD AVDD AVSS VSS VDDL VSSL 4 10 CP0 CP1 7 SSCLK1 8 SSCLK2 9 SSCLK3 12 SSCLK4 14 SSCLK5/REFOUT/CP2 15 SSCLK6/REFOUT/CP3 • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback Pin Configuration Figure Pin Diagram CY25200 The CY25200 is a Spread Spectrum Clock Generator SSCG IC used to reduce Electro Magnetic Interference EMI found in today’s high speed digital electronic systems. The device uses a Cypress proprietary Phase-Locked Loop PLL and Spread Spectrum Clock SSC technology to synthesize and modulate the frequency of the input clock. By frequency modulating the clock, the measured EMI at the fundamental and harmonic frequencies are reduced. This reduction in radiated energy significantly reduces the cost of complying with regulatory agency requirements EMC and improves time to market, without degrading system performance. The CY25200 uses a factory and field-programmable configuration memory array to synthesize output frequency, spread %, crystal load capacitor, clock control pins, PD#, and OE options. The spread % is factory and field-programmed to either center spread or down spread with various spread percentages. The range for center spread is from to The range for down spread is from to Contact the factory for smaller or larger spread % amounts, if required. The input to the CY25200 is either a crystal or a clock signal. The input frequency range for crystals is 8 to 30 MHz and for clock signals is 8 to 166 MHz. The CY25200 has six clock outputs, SSCLK1 to SSCLK6. The frequency modulated SSCLK outputs are programmed from 3 to 200 MHz. The CY25200 products are available in a 16-pin TSSOP package with a commercial operating temperature range of 0 to 70°C. Table Pin Summary Name XIN Pin Number 1 Description Crystal input or Reference Clock input XOUT VDD Crystal output. Leave this pin floating if external clock is used The CY25200 is programmed at the package level, and must be programmed prior to installation on a circuit board. Field programmable devices are denoted by an “F” in the ordering code, and are blank when shipped. The CY25200 is Flash technology based, which allows it to be reprogrammed up to 100 times. This allows for fast and easy design changes and product updates, and eliminates issues with old and out of date inventory. Samples and small prototype quantities are programmed on the CY3672 programmer with the CY3695 socket adapter. CyberClocks Online Software CyberClocks Online Software is a web based software application that allows the user to custom configure the CY25200. All the parameters in Table 2 and Table 3 are entered as variables into the software. CyberClocks Online outputs an industry standard JEDEC file used for programming the CY25200. CyberClocks Online is available at website. Factory-Programmed CY25200 Factory programming by Cypress is available for high volume orders. All requests must be submitted to the local Cypress Field Application Engineer FAE or sales representative. After the request is processed, you will receive a new part number, samples, and data sheet with the programmed values. This part number is used for additional sample requests and production orders. Page 3 of 12 [+] Feedback CY25200 Product Functions Control Pins CP0, CP1, CP2 and CP3 Four control signals are available through programming of pins 4, 10, 14, and CP0 pin 4 and CP1 pin10 are specifically designed to function as control pins. However, pins 14 SSCLK5/REFOUT/CP2 and 15 SSCLK6/REFOUT/CP3 are multi-functional and can be programmed to be either a control signal or an output clock SSCLK or REFOUT . All of the control pins, CP0, CP1, CP2, and CP3 are programmable to one of the following functions: • OE Output Enable if OE = 1, all SSCLK and REFOUT outputs are enabled. • SSON Spread spectrum control if SSON = 1, spread is on if SSON = 0, spread is off. • CLKSEL Clock select frequency select for all SSCLK outputs. • PD# Power Down active low if PD# = 0, all the outputs are three-stated and the part enters a low power state. Note that the PD# function is available only on CP0 or CP1 it is not available on CP2 or CP3. Example Here is an example with three control pins: • CLKIN = 33 MHz • SSCLK1/2/3/4 = 100 MHz with ±1% spread • SSCLK 5 = REFOUT 33 MHz • CP0 Pin 4 = PD# • CP1 Pin 10 = OE • CP3 pin 15 = SSON The pinout for the above example is shown in Figure Figure Example Pin Diagram 33.0MHz 1 VDD 2 AVDD 3 PD# 4 AVSS 5 VSSL 6 100MHz 7 100MHz 8 16 NC 15 SSON 14 REFOUT 33.0MHz 13 VSS 12 100MHz 11 VDDL 10 OE 9 100MHz CLKSEL The CLKSEL control pin enables you to select between two different SSCLK output frequencies. These must be related frequencies that are derived off of a common PLL frequency. Specifically, CLKSEL does not change the PLL frequency. It only changes the output divider. For instance, MHz and MHz are both derived from a PLL frequency of 400 MHz, by dividing it down by 12 and 6 respectively. Table 4 shows an example of how this is implemented. The PLL frequency range is 100 to 400 MHz. The two output dividers in the CY25200 can be any integer between 2 and 130, providing two different but related frequencies as explained above. Table 4 and Figure 3 show an example configuration using the frequencies just described. In this example, the configurable pins SSCLK5 pin 14 and SSCLK6 pin 15 are used as output clocks. Input Frequency XIN, Pin 1 and XOUT, Pin 16 The input to the CY25200 is a crystal or a clock. The input frequency range for crystals is 8 to 30 MHz, and for clock signal is 8 to 166 MHz. CXIN and CXOUT Pin 1 and Pin 16 The CY25200 has internal load capacitors at pin 1 CXIN and pin 16 CXOUT . CXIN always equals CXOUT, and they are programmable from 12 pF to 60 pF, in pF increments. This feature eliminates the need for external crystal load capacitors. The following formula is used to calculate the value of CXIN and CXOUT for matching the crystal load CL CXIN = CXOUT = 2CL CP Where CL is the crystal load capacitor as specified by the crystal manufacturer and CP is the parasitic PCB capacitance on each node of the crystal. For example, if a crystal with CL of 16 pF is used, and CP is 2 pF, CXIN and CXOUT is calculated as CXIN = CXOUT = 2 x 16 2 = 30 pF. If using a driven reference clock, set CXIN and CXOUT to the minimum value 12 pF, connect the reference to XIN/CLKIN, and leave XOUT unconnected. Output Frequency SSCLK1 through SSCLK6 Outputs All the SSCLK outputs are produced by synthesizing the input reference frequency using a PLL and modulating the VCO frequency. SSCLK[1:4] are fixed function output clocks SSCLK . SSCLK5 and SSCLK6 are also programmable to function the same as SSCLK[1:4], or as buffered copies of the input reference REFOUT , or as control pin as discussed in Control Pins CP0, CP1, CP2 and CP3 . To use the 2.5V output drive option on SSCLK[1:4], VDDL must be connected to a 2.5V power supply SSCLK[1:4] outputs are powered by VDDL . When using the 2.5V output drive option, the maximum output frequency on SSCLK[1:4] is 166 MHz. Page 4 of 12 [+] Feedback CY25200 Spread Percentage SSCLK1 to SSCLK6 Outputs Ordering Information Ordering Code[5] CY25200-ZXCxxxw[6] CY25200-ZXCxxxwT[6] CY25200FZXC[6] Package Type 16-Pin TSSOP Pb-free 16-Pin TSSOP Tape and Reel Pb-free 16-Pin TSSOP Pb-free Programming Operating Temperature Range Factory Commercial, 0 to 70°C Factory Commercial, 0 to 70°C Field Commercial, 0 to 70°C CY25200K-ZXCxxxw 16-Pin TSSOP Pb-free Factory Commercial, 0 to 70°C CY25200K-ZXCxxxwT 16-Pin TSSOP Tape and Reel Pb-free Factory Commercial, 0 to 70°C CY25200KFZXC 16-Pin TSSOP Pb-free Field Commercial, 0 to 70°C CY25200KFZXCT 16-Pin TSSOP Tape and Reel Pb-free Field Commercial, 0 to 70°C CY3672-USB Programmer for Field Programmable Devices CY3695 CY22050/CY22150/CY25200 Socket Adapter for CY3672-USB Table 16-Pin TSSOP Package Characteristics Parameter Name theta JA Package Drawing and Dimensions Value 115 Figure 16-Pin TSSOP mm Body ZZ16 PIN 1 ID DIMENSIONS IN MM[INCHES] MIN. REFERENCE JEDEC MO-153 PACKAGE WEIGHT 0.05gms Unit °C/W MAX. BSC. MAX. SEATING PLANE GAUGE PLANE 0° -8° See ECN Minor Change Corrected letter assignment in the ordering info for Pb free. 267832 See ECN Added Field Programmable Devices and Functionality 291094 See ECN Added tSKEW spec. and footnote 1821908 DPF/AESA See ECN Corrected FSSCLK-Low Voltage specification on page 7 for SSCLK5/6 to SSCLK1/2/3/4, as SSCLK5/6 output does not operate at low voltage. Deleted Tccj4 on page 8 for the same reason as above 2442066 KVM/AESA See ECN Updated template. Added Note “Not recommended for new designs.” Added part number CY25200KZXC_XXXW, CY25200KZXC_XXXWT, CY25200KFZXC in ordering information table. Changed package name to ZZ16. 2758387 KVM/AESA 09/01/2009 Extensive text edits Replaced Benefits column on page 1 with Description options and to delete mention of custom frequencies Corrected 3.3V IOL and IOH values, Filled in missing units in AC Electrical table Corrected part numbers in Ordering Information Table Removed part number CY25200FZXCT Added part number CY25200KFZXCT Replaced CY3672 and CY3672-PRG with CY3672-USB Page 11 of 12 [+] Feedback CY25200 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 12 of 12 [+] Feedback

PDF Datasheet Preview

CY25200

Programmable Spread Spectrum Clock Generator for EMI Reduction
• Wide Operating Output SSCLK Frequency Range 3 to 200 MHz
• Programmable Spread Spectrum with Nominal kHz modulation Frequency
• Center Spread to
• Down Spread to
• Input Frequency Range

External crystal 8 to 30 MHz fundamental crystals External reference 8 to 166 MHz clock
• Integrated Phase-Locked Loop PLL
• Programmable Crystal Load Capacitor Tuning Array
• Low Cycle-to-Cycle Jitter
• 3.3V Operation with 2.5V Output Clock Drive Option
• Spread Spectrum On and Off Function
• Power Down or Output Enable Function
• Output Frequency Select Option
• Field-Programmable
• Package 16 Pin TSSOP

The CY25200 is a programmable clock generator with spread spectrum capability. Spread spectrum modulates the output clock frequency over a small range, spreading the energy and reducing the energy peak. This is a powerful technique to reduce EMI in a variety of applications.

It uses either an external reference clock or a crystal for an input. It also uses a PLL to generate a spread spectrum output clock that can be a different frequency than the input. Up to six output clocks are available and up to two of them can be REFCLKs copies of the input clock, without spread .

The CY25200 is highly configurable. Programmable variables include the input and output frequencies, spread percentage, center spread or down spread, and control pin functions. The oscillator pin capacitance can also be programmed to match the load capacitance requirement CL of the crystal, eliminating the need for external capacitors.

Available features include Output Enable, Power Down, Spread On/Off, Frequency Select, and the option to power some output clocks at 2.5V.

Cypress’ web-based CyberClocks Online software is used to configure the device. Programmability enables fast prototyping, which is particularly useful when doing EMC testing and determining the optimal spread settings.

Logic Block Diagram

XIN/CLKIN 1 XOUT 16 CXOUT

OSC. CXIN

Divider Bank 1

Divider Bank 2

Output

Select Matrix
13 11

VDD AVDD AVSS VSS VDDL VSSL
4 10 CP0 CP1
7 SSCLK1 8 SSCLK2 9 SSCLK3 12 SSCLK4
14 SSCLK5/REFOUT/CP2 15 SSCLK6/REFOUT/CP3
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

Pin Configuration

Figure Pin Diagram

CY25200

The CY25200 is a Spread Spectrum Clock Generator SSCG IC used to reduce Electro Magnetic Interference EMI found in today’s high speed digital electronic systems.

The device uses a Cypress proprietary Phase-Locked Loop PLL and Spread Spectrum Clock SSC technology to synthesize and modulate the frequency of the input clock. By frequency modulating the clock, the measured EMI at the fundamental and harmonic frequencies are reduced. This reduction in radiated energy significantly reduces the cost of complying with regulatory agency requirements EMC and improves time to market, without degrading system performance.

The CY25200 uses a factory and field-programmable configuration memory array to synthesize output frequency, spread %, crystal load capacitor, clock control pins, PD#, and OE options.

The spread % is factory and field-programmed to either center spread or down spread with various spread percentages. The range for center spread is from to The range for down spread is from to Contact the factory for smaller or larger spread % amounts, if required.

The input to the CY25200 is either a crystal or a clock signal. The input frequency range for crystals is 8 to 30 MHz and for clock signals is 8 to 166 MHz.

The CY25200 has six clock outputs, SSCLK1 to SSCLK6. The frequency modulated SSCLK outputs are programmed from 3 to 200 MHz.

The CY25200 products are available in a 16-pin TSSOP package with a commercial operating temperature range of 0 to 70°C.

Table Pin Summary

Name XIN

Pin Number 1

Description Crystal input or Reference Clock input

XOUT VDD

Crystal output. Leave this pin floating if external clock is used
The CY25200 is programmed at the package level, and must be programmed prior to installation on a circuit board. Field programmable devices are denoted by an “F” in the ordering code, and are blank when shipped. The CY25200 is Flash technology based, which allows it to be reprogrammed up to 100 times. This allows for fast and easy design changes and product updates, and eliminates issues with old and out of date inventory.

Samples and small prototype quantities are programmed on the CY3672 programmer with the CY3695 socket adapter.

CyberClocks Online Software

CyberClocks Online Software is a web based software application that allows the user to custom configure the CY25200. All the parameters in Table 2 and Table 3 are entered as variables into the software. CyberClocks Online outputs an industry
standard JEDEC file used for programming the CY25200. CyberClocks Online is available at website.

Factory-Programmed CY25200

Factory programming by Cypress is available for high volume orders. All requests must be submitted to the local Cypress Field Application Engineer FAE or sales representative. After the request is processed, you will receive a new part number, samples, and data sheet with the programmed values. This part number is used for additional sample requests and production orders.

Page 3 of 12 [+] Feedback

CY25200

Product Functions

Control Pins CP0, CP1, CP2 and CP3 Four control signals are available through programming of pins 4, 10, 14, and CP0 pin 4 and CP1 pin10 are specifically designed to function as control pins. However, pins 14 SSCLK5/REFOUT/CP2 and 15 SSCLK6/REFOUT/CP3 are multi-functional and can be programmed to be either a control signal or an output clock SSCLK or REFOUT . All of the control pins, CP0, CP1, CP2, and CP3 are programmable to one of the following functions:
• OE Output Enable if OE = 1, all SSCLK and REFOUT outputs are enabled.
• SSON Spread spectrum control if SSON = 1, spread is on if SSON = 0, spread is off.
• CLKSEL Clock select frequency select for all SSCLK outputs.
• PD# Power Down active low if PD# = 0, all the outputs are three-stated and the part enters a low power state.

Note that the PD# function is available only on CP0 or CP1 it is not available on CP2 or CP3.

Example Here is an example with three control pins:
• CLKIN = 33 MHz
• SSCLK1/2/3/4 = 100 MHz with ±1% spread
• SSCLK 5 = REFOUT 33 MHz
• CP0 Pin 4 = PD#
• CP1 Pin 10 = OE
• CP3 pin 15 = SSON The pinout for the above example is shown in Figure

Figure Example Pin Diagram
33.0MHz 1 VDD 2

AVDD 3 PD# 4

AVSS 5 VSSL 6 100MHz 7 100MHz 8
16 NC 15 SSON 14 REFOUT 33.0MHz 13 VSS 12 100MHz 11 VDDL 10 OE 9 100MHz

CLKSEL

The CLKSEL control pin enables you to select between two different SSCLK output frequencies. These must be related frequencies that are derived off of a common PLL frequency. Specifically, CLKSEL does not change the PLL frequency. It only changes the output divider. For instance, MHz and MHz are both derived from a PLL frequency of 400 MHz, by dividing it down by 12 and 6 respectively. Table 4 shows an example of how this is implemented. The PLL frequency range is 100 to 400 MHz. The two output dividers in the CY25200 can be any integer between 2 and 130, providing two different but related frequencies as explained above.

Table 4 and Figure 3 show an example configuration using the frequencies just described. In this example, the configurable pins SSCLK5 pin 14 and SSCLK6 pin 15 are used as output clocks.

Input Frequency XIN, Pin 1 and XOUT, Pin 16

The input to the CY25200 is a crystal or a clock. The input frequency range for crystals is 8 to 30 MHz, and for clock signal is 8 to 166 MHz.

CXIN and CXOUT Pin 1 and Pin 16 The CY25200 has internal load capacitors at pin 1 CXIN and pin 16 CXOUT . CXIN always equals CXOUT, and they are programmable from 12 pF to 60 pF, in pF increments. This feature eliminates the need for external crystal load capacitors.

The following formula is used to calculate the value of CXIN and CXOUT for matching the crystal load CL CXIN = CXOUT = 2CL CP Where CL is the crystal load capacitor as specified by the crystal manufacturer and CP is the parasitic PCB capacitance on each node of the crystal.

For example, if a crystal with CL of 16 pF is used, and CP is 2 pF, CXIN and CXOUT is calculated as CXIN = CXOUT = 2 x 16 2 = 30 pF. If using a driven reference clock, set CXIN and CXOUT to the minimum value 12 pF, connect the reference to XIN/CLKIN, and leave XOUT unconnected.

Output Frequency SSCLK1 through SSCLK6 Outputs

All the SSCLK outputs are produced by synthesizing the input reference frequency using a PLL and modulating the VCO frequency. SSCLK[1:4] are fixed function output clocks SSCLK . SSCLK5 and SSCLK6 are also programmable to function the same as SSCLK[1:4], or as buffered copies of the input reference REFOUT , or as control pin as discussed in Control Pins CP0, CP1, CP2 and CP3 . To use the 2.5V output drive option on SSCLK[1:4], VDDL must be connected to a 2.5V power supply SSCLK[1:4] outputs are powered by VDDL . When using the 2.5V output drive option, the maximum output frequency on SSCLK[1:4] is 166 MHz.

Page 4 of 12 [+] Feedback

CY25200

Spread Percentage SSCLK1 to SSCLK6 Outputs
Ordering Information
Ordering Code[5] CY25200-ZXCxxxw[6] CY25200-ZXCxxxwT[6] CY25200FZXC[6]

Package Type 16-Pin TSSOP Pb-free 16-Pin TSSOP Tape and Reel Pb-free 16-Pin TSSOP Pb-free

Programming Operating Temperature Range

Factory Commercial, 0 to 70°C

Factory Commercial, 0 to 70°C

Field

Commercial, 0 to 70°C

CY25200K-ZXCxxxw
16-Pin TSSOP Pb-free

Factory Commercial, 0 to 70°C

CY25200K-ZXCxxxwT
16-Pin TSSOP Tape and Reel Pb-free

Factory Commercial, 0 to 70°C

CY25200KFZXC
16-Pin TSSOP Pb-free

Field

Commercial, 0 to 70°C

CY25200KFZXCT
16-Pin TSSOP Tape and Reel Pb-free

Field

Commercial, 0 to 70°C

CY3672-USB

Programmer for Field Programmable Devices

CY3695

CY22050/CY22150/CY25200 Socket Adapter for CY3672-USB

Table 16-Pin TSSOP Package Characteristics

Parameter

Name theta JA

Package Drawing and Dimensions

Value 115

Figure 16-Pin TSSOP mm Body ZZ16

PIN 1 ID

DIMENSIONS IN MM[INCHES] MIN.

REFERENCE JEDEC MO-153 PACKAGE WEIGHT 0.05gms

Unit °C/W

MAX.

BSC.

MAX.

SEATING PLANE

GAUGE PLANE
0° -8°
See ECN Minor Change Corrected letter assignment in the ordering info for Pb free.
267832

See ECN Added Field Programmable Devices and Functionality
291094

See ECN Added tSKEW spec. and footnote
1821908 DPF/AESA See ECN Corrected FSSCLK-Low Voltage specification on page 7 for SSCLK5/6 to

SSCLK1/2/3/4, as SSCLK5/6 output does not operate at low voltage. Deleted Tccj4 on page 8 for the same reason as above
2442066 KVM/AESA See ECN Updated template. Added Note “Not recommended for new designs.”

Added part number CY25200KZXC_XXXW, CY25200KZXC_XXXWT,
CY25200KFZXC in ordering information table. Changed package name to

ZZ16.
2758387 KVM/AESA 09/01/2009 Extensive text edits

Replaced Benefits column on page 1 with Description
options and to delete mention of custom frequencies

Corrected 3.3V IOL and IOH values, Filled in missing units in AC Electrical table
Corrected part numbers in Ordering Information Table

Removed part number CY25200FZXCT

Added part number CY25200KFZXCT

Replaced CY3672 and CY3672-PRG with CY3672-USB

Page 11 of 12 [+] Feedback

CY25200

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

All products and company names mentioned in this document may be the trademarks of their respective holders.

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Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY25200FZXCT Datasheet file may be downloaded here without warranties.

Datasheet ID: CY25200FZXCT 507704