CY2309CSXC-1

CY2309CSXC-1 Datasheet

CY2305C CY2309C

Part	Datasheet
CY2309CSXC-1	CY2309CSXC-1 (pdf)

Related Parts	Information
CY2309CSXC-1T	CY2309CSXC-1T
CY2309CSXC-1H	CY2309CSXC-1H
CY2309CSXC-1HT	CY2309CSXC-1HT

PDF Datasheet Preview
CY2305C CY2309C V Zero Delay Clock Buffer V Zero Delay Clock Buffer • 10 MHz to MHz operating range • Zero input and output propagation delay • Multiple low skew outputs • One input drives five outputs CY2305C • One input drives nine outputs, grouped as 4 + 4 + 1 CY2309C • 50 ps typical cycle-to-cycle jitter 15 pF, 66 MHz • Test mode to bypass phase locked loop PLL CY2309C only, see Select Input Decoding on page 6 • Available in space saving 16-pin 150 Mil small outline integrated circuit SOIC or mm thin shrunk small outline package TSSOP packages CY2309C , and 8-pin, 150 Mil SOIC package CY2305C • V operation • Commercial, industrial and automotive-A flows available Functional Description The CY2305C and CY2309C are die replacement parts for CY2305 and CY2309. The CY2309C is a low-cost V zero delay buffer designed to distribute high speed clocks and is available in a 16-pin SOIC or TSSOP package. The CY2305C is an 8-pin version of the CY2309C. It accepts one reference input and drives out five low skew clocks. The -1H versions of each device operate up to MHz frequencies and have higher drive than the -1 devices. All parts have on-chip phase locked loops PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The CY2309C has two banks of four outputs each that are controlled by the select inputs as shown in the Select Input Decoding on page If all output clocks are not required, Bank B is three-stated. The input clock is directly applied to the outputs by the select inputs for chip and system testing purposes. The CY2305C and CY2309C PLLs enter a power down mode when there are no rising edges on the REF input. In this state, the outputs are three-stated and the PLL is turned off. This results in less than of current draw for commercial temperature devices and for industrial and automotive-A temperature parts. The CY2309C PLL shuts down in one additional case as shown in the Select Input Decoding on page In the special case when S2:S1 is 1:0, the PLL is bypassed and REF is output from DC to the maximum allowable frequency. The part behaves as a non-zero delay buffer in this mode and the outputs are not three-stated. The CY2305C or CY2309C is available in two or three different configurations as shown in the Ordering Information on page The CY2305C-1 or CY2309C-1 is the base part. The CY2305-1H or CY2309-1H is the high drive version of the Its rise and fall times are much faster than the Logic Block Diagram CY2305C PLL REF CLKOUT CLK1 CLK2 CLK3 CLK4 • San Jose, CA 95134-1709 • 408-943-2600 Logic Block Diagram CY2309C Select Input Decoding CLKOUT CLKA1 CLKA2 CLKA3 CLKA4 CLKB1 CLKB2 CLKB3 CLKB4 CY2305C CY2309C Page 2 of 21 CY2305C CY2309C Contents Pinouts 4 Pin Definitions 5 Pin Definitions 5 Select Input Decoding 6 Zero Delay and Skew Control 6 Absolute Maximum Conditions 7 Operating Conditions 7 Operating Conditions 7 Electrical Characteristics 8 Electrical Characteristics 8 Switching Characteristics 9 Switching Characteristics 10 Switching Characteristics 11 Switching characteristics 12 Switching Waveforms 13 Test Circuits 14 Ordering Information 15 Ordering Code Definitions 16 Package Diagrams 17 Acronyms 19 Document Conventions 19 Units of Measure 19 Document History Page 20 Sales, Solutions, and Legal Information 21 Worldwide Sales and Design Support 21 Products 21 PSoC Solutions 21 Page 3 of 21 Pinouts Figure 8-pin SOIC pinout Top View CY2305C REF CLK2 CLK1 GND 7 CY2305C CLKOUT CLK4 VDD CLK3 Figure 16-pin SOIC / TSSOP pinout Top View CY2309C REF CLKA1 CLKA2 VDD GND CLKB1 CLKB2 2 CY2309C 15 CLKOUT CLKA4 CLKA3 VDD GND CLKB4 CLKB3 S1 CY2305C CY2309C Page 4 of 21 Pin Definitions 8-pin SOIC Signal REF [1] CLK2 [2] CLK1 [2] CLK3 [2] CLK4 [2] CLKOUT [2] Description Input reference frequency Buffered clock output Buffered clock output Ground Buffered clock output V supply Buffered clock output Buffered clock output, internal feedback on this pin Pin Definitions 16-pin SOIC / TSSOP Signal REF [1] CLKA1 [2] CLKA2 [2] CLKB1 [2] CLKB2 [2] S2 [3] S1 [3] CLKB3 [2] CLKB4 [2] 12 GND Ordering Information Ordering Code Pb-free - CY2305C CY2305CSXC-1 CY2305CSXC-1T CY2305CSXC-1H CY2305CSXC-1HT CY2305CSXI-1 CY2305CSXI-1T CY2305CSXI-1H CY2305CSXI-1HT CY2305CSXA-1H CY2305CSXA-1HT Pb-free - CY2309C CY2309CSXC-1 CY2309CSXC-1T CY2309CSXC-1H CY2309CSXC-1HT CY2309CSXI-1 CY2309CSXI-1T CY2309CSXI-1H CY2309CSXI-1HT CY2309CZXC-1 CY2309CZXC-1T CY2309CZXC-1H CY2309CZXC-1HT CY2309CZXI-1 CY2309CZXI-1T CY2309CZXI-1H CY2309CZXI-1HT Package Type 8-pin SOIC 150 Mil 8-pin SOIC 150 Mil Tape and Reel 8-pin SOIC 150 Mil 8-pin SOIC 150 Mil Tape and Reel 8-pin SOIC 150 Mil 8-pin SOIC 150 Mil Tape and Reel 8-pin SOIC 150 Mil 8-pin SOIC 150 Mil Tape and Reel 8-pin SOIC 150 Mil 8-pin SOIC 150 Mil Tape and Reel 16-pin SOIC 150 Mil 16-pin SOIC 150 Mil Tape and Reel 16-pin SOIC 150 Mil 16-pin SOIC 150 Mil Tape and Reel 16-pin SOIC 150 Mil 16-pin SOIC 150 Mil Tape and Reel 16-pin SOIC 150 Mil 16-pin SOIC 150 Mil Tape and Reel 16-pin TSSOP mm 16-pin TSSOP mm Tape and Reel 16-pin TSSOP mm 16-pin TSSOP mm Tape and Reel 16-pin TSSOP mm 16-pin TSSOP mm Tape and Reel 16-pin TSSOP mm 16-pin TSSOP mm Tape and Reel CY2305C CY2309C Operating Range Commercial Industrial Automotive-A Automotive-A Commercial Industrial Commercial Industrial Page 15 of 21 Ordering Code Definitions CY 230XC X 1X X CY2305C CY2309C Page 16 of 21 CY2305C CY2309C Package Diagrams Figure 8-pin SOIC 150 Mil S08.15/SZ08.15 Package Outline, 51-85066 51-85066 E Figure 16-pin SOIC 150 Mil S16.15/SZ16.15 Package Outline, 51-85068 51-85068 E Page 17 of 21 CY2305C CY2309C Package Diagrams continued Figure 16-pin TSSOP mm Body Z16.173/ZZ16.173 Package Outline, 51-85091 51-85091 *D Page 18 of 21 Acronyms Acronym CMOS complementary metal oxide semiconductor phase locked loop SOIC small outline integrated circuit TSSOP thin shrunk small outline package CY2305C CY2309C Document Conventions Units of Measure Symbol °C kHz MHz µA mA ms ns pF ps V Unit of Measure degree Celsius kilohertz megahertz microampere milliampere millisecond nanosecond picofarad picosecond volt Page 19 of 21 CY2305C CY2309C Document History Page Document Title CY2305C/CY2309C, V Zero Delay Clock Buffer Document Number 38-07672 ECN No. Issue Date Orig. of Change Description of Change 224421 See ECN RGL New data sheet 268571 See ECN RGL Added bullet for 5 V tolerant inputs in the features 276453 See ECN RGL Minor Change Moved one sentence from the features to the Functional KVM / Added CY2305CSXA-1 and CY2305CSXA-1T parts in Ordering Information AESA table under Pb-free CY2305C 2901743 03/30/2010 VIVG Updated Package Diagrams. Added Ordering Code Definitions Added Sales, Solutions, and Legal Information URLs. 3080990 11/10/2010 BASH Modified pin diagram of Figure Updated as per new template Added Acronyms and Units of Measure table Added TOC 3160535 02/03/2011 BASH Removed min value of VIL and max value of VIH from Electrical Characteristics Table on page 6 and page Removed Prune parts CY2305CSXA-1 and CY2305CSXA-1T from the datasheet. 3822852 11/27/2012 PURU Updated Select Input Decoding Added Figure 3 only, no edits . Updated Zero Delay and Skew Control Minor edits . Page 20 of 21 CY2305C CY2309C Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturers representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Automotive Clocks & Buffers Interface Lighting & Power Control Memory PSoC Touch Sensing USB Controllers Wireless/RF cypress.com/go/automotive cypress.com/go/clocks cypress.com/go/interface cypress.com/go/powerpsoc cypress.com/go/plc cypress.com/go/memory cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB cypress.com/go/wireless PSoC Solutions psoc.cypress.com/solutions PSoC 1 \| PSoC 3 \| PSoC 5 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 21 of 21

PDF Datasheet Preview

CY2305C CY2309C

V Zero Delay Clock Buffer

V Zero Delay Clock Buffer
• 10 MHz to MHz operating range
• Zero input and output propagation delay
• Multiple low skew outputs
• One input drives five outputs CY2305C
• One input drives nine outputs, grouped as 4 + 4 + 1 CY2309C
• 50 ps typical cycle-to-cycle jitter 15 pF, 66 MHz
• Test mode to bypass phase locked loop PLL CY2309C only,
see Select Input Decoding on page 6
• Available in space saving 16-pin 150 Mil small outline
integrated circuit SOIC or mm thin shrunk small outline package TSSOP packages CY2309C , and 8-pin, 150 Mil SOIC package CY2305C
• V operation
• Commercial, industrial and automotive-A flows available

Functional Description

The CY2305C and CY2309C are die replacement parts for CY2305 and CY2309. The CY2309C is a low-cost V zero delay buffer designed to distribute high speed clocks and is available in a 16-pin SOIC or TSSOP package. The CY2305C is an 8-pin version of the CY2309C. It accepts one reference input and drives out five low
skew clocks. The -1H versions of each device operate up to MHz frequencies and have higher drive than the -1 devices. All parts have on-chip phase locked loops PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.

The CY2309C has two banks of four outputs each that are controlled by the select inputs as shown in the Select Input Decoding on page If all output clocks are not required, Bank B is three-stated. The input clock is directly applied to the outputs by the select inputs for chip and system testing purposes.

The CY2305C and CY2309C PLLs enter a power down mode when there are no rising edges on the REF input. In this state, the outputs are three-stated and the PLL is turned off. This results in less than of current draw for commercial temperature devices and for industrial and automotive-A temperature parts. The CY2309C PLL shuts down in one additional case as shown in the Select Input Decoding on page

In the special case when S2:S1 is 1:0, the PLL is bypassed and REF is output from DC to the maximum allowable frequency. The part behaves as a non-zero delay buffer in this mode and the outputs are not three-stated.
The CY2305C or CY2309C is available in two or three different configurations as shown in the Ordering Information on page The CY2305C-1 or CY2309C-1 is the base part. The CY2305-1H or CY2309-1H is the high drive version of the Its rise and fall times are much faster than the

Logic Block Diagram CY2305C

PLL REF

CLKOUT CLK1 CLK2 CLK3 CLK4
• San Jose, CA 95134-1709
• 408-943-2600

Logic Block Diagram CY2309C

Select Input Decoding

CLKOUT CLKA1 CLKA2 CLKA3 CLKA4

CLKB1 CLKB2 CLKB3 CLKB4

CY2305C CY2309C

Page 2 of 21

CY2305C CY2309C

Contents

Pinouts 4 Pin Definitions 5 Pin Definitions 5 Select Input Decoding 6 Zero Delay and Skew Control 6 Absolute Maximum Conditions 7 Operating Conditions 7 Operating Conditions 7 Electrical Characteristics 8 Electrical Characteristics 8 Switching Characteristics 9 Switching Characteristics 10 Switching Characteristics 11 Switching characteristics 12
Switching Waveforms 13 Test Circuits 14 Ordering Information 15
Ordering Code Definitions 16 Package Diagrams 17 Acronyms 19 Document Conventions 19

Units of Measure 19 Document History Page 20 Sales, Solutions, and Legal Information 21

Worldwide Sales and Design Support 21 Products 21 PSoC Solutions 21

Page 3 of 21

Pinouts

Figure 8-pin SOIC pinout Top View CY2305C

REF CLK2 CLK1 GND
7 CY2305C

CLKOUT CLK4 VDD CLK3

Figure 16-pin SOIC / TSSOP pinout Top View CY2309C

REF CLKA1

CLKA2 VDD GND

CLKB1 CLKB2
2 CY2309C 15

CLKOUT

CLKA4 CLKA3 VDD GND CLKB4 CLKB3 S1

CY2305C CY2309C

Page 4 of 21

Pin Definitions
8-pin SOIC

Signal

REF [1]

CLK2 [2]

CLK1 [2]

CLK3 [2]

CLK4 [2]

CLKOUT [2]

Description Input reference frequency Buffered clock output Buffered clock output Ground Buffered clock output V supply Buffered clock output Buffered clock output, internal feedback on this pin

Pin Definitions
16-pin SOIC / TSSOP

Signal

REF [1]

CLKA1 [2]

CLKA2 [2]

CLKB1 [2]

CLKB2 [2]

S2 [3]

S1 [3]

CLKB3 [2]

CLKB4 [2]
12 GND
Ordering Information
Ordering Code Pb-free - CY2305C CY2305CSXC-1 CY2305CSXC-1T CY2305CSXC-1H CY2305CSXC-1HT CY2305CSXI-1 CY2305CSXI-1T CY2305CSXI-1H CY2305CSXI-1HT CY2305CSXA-1H CY2305CSXA-1HT Pb-free - CY2309C CY2309CSXC-1 CY2309CSXC-1T CY2309CSXC-1H CY2309CSXC-1HT CY2309CSXI-1 CY2309CSXI-1T CY2309CSXI-1H CY2309CSXI-1HT CY2309CZXC-1 CY2309CZXC-1T CY2309CZXC-1H CY2309CZXC-1HT CY2309CZXI-1 CY2309CZXI-1T CY2309CZXI-1H CY2309CZXI-1HT

Package Type
8-pin SOIC 150 Mil 8-pin SOIC 150 Mil Tape and Reel 8-pin SOIC 150 Mil 8-pin SOIC 150 Mil Tape and Reel 8-pin SOIC 150 Mil 8-pin SOIC 150 Mil Tape and Reel 8-pin SOIC 150 Mil 8-pin SOIC 150 Mil Tape and Reel 8-pin SOIC 150 Mil 8-pin SOIC 150 Mil Tape and Reel
16-pin SOIC 150 Mil 16-pin SOIC 150 Mil Tape and Reel 16-pin SOIC 150 Mil 16-pin SOIC 150 Mil Tape and Reel 16-pin SOIC 150 Mil 16-pin SOIC 150 Mil Tape and Reel 16-pin SOIC 150 Mil 16-pin SOIC 150 Mil Tape and Reel 16-pin TSSOP mm 16-pin TSSOP mm Tape and Reel 16-pin TSSOP mm 16-pin TSSOP mm Tape and Reel 16-pin TSSOP mm 16-pin TSSOP mm Tape and Reel 16-pin TSSOP mm 16-pin TSSOP mm Tape and Reel

CY2305C CY2309C

Operating Range

Commercial Industrial Automotive-A Automotive-A

Commercial Industrial Commercial Industrial

Page 15 of 21
Ordering Code Definitions CY 230XC X 1X X

CY2305C CY2309C

Page 16 of 21

CY2305C CY2309C

Package Diagrams

Figure 8-pin SOIC 150 Mil S08.15/SZ08.15 Package Outline, 51-85066
51-85066 *E

Figure 16-pin SOIC 150 Mil S16.15/SZ16.15 Package Outline, 51-85068
51-85068 *E

Page 17 of 21

CY2305C CY2309C

Package Diagrams continued

Figure 16-pin TSSOP mm Body Z16.173/ZZ16.173 Package Outline, 51-85091
51-85091 *D

Page 18 of 21

Acronyms

Acronym

CMOS complementary metal oxide semiconductor
phase locked loop

SOIC
small outline integrated circuit

TSSOP thin shrunk small outline package

CY2305C CY2309C

Document Conventions

Units of Measure

Symbol °C kHz MHz µA mA ms ns pF ps V

Unit of Measure degree Celsius kilohertz megahertz microampere milliampere millisecond nanosecond picofarad picosecond volt

Page 19 of 21

CY2305C CY2309C

Document History Page

Document Title CY2305C/CY2309C, V Zero Delay Clock Buffer Document Number 38-07672

ECN No.

Issue Date

Orig. of Change

Description of Change
224421 See ECN

RGL New data sheet
268571 See ECN

RGL Added bullet for 5 V tolerant inputs in the features
276453 See ECN

RGL Minor Change Moved one sentence from the features to the Functional
KVM / Added CY2305CSXA-1 and CY2305CSXA-1T parts in Ordering Information

AESA table under Pb-free CY2305C
2901743 03/30/2010 VIVG Updated Package Diagrams.
Added Ordering Code Definitions

Added Sales, Solutions, and Legal Information URLs.
3080990 11/10/2010 BASH Modified pin diagram of Figure

Updated as per new template

Added Acronyms and Units of Measure table

Added TOC
3160535 02/03/2011 BASH Removed min value of VIL and max value of VIH from Electrical Characteristics

Table on page 6 and page

Removed Prune parts CY2305CSXA-1 and CY2305CSXA-1T from the
datasheet.
3822852 11/27/2012 PURU Updated Select Input Decoding Added Figure 3 only, no edits .

Updated Zero Delay and Skew Control Minor edits .

Page 20 of 21

CY2305C CY2309C

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturers representatives, and distributors. To find the office closest to you, visit us at Cypress Locations.

Products Automotive Clocks & Buffers Interface Lighting & Power Control

Memory PSoC Touch Sensing USB Controllers Wireless/RF
cypress.com/go/automotive cypress.com/go/clocks
cypress.com/go/interface cypress.com/go/powerpsoc
cypress.com/go/plc cypress.com/go/memory
cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB cypress.com/go/wireless

PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

All products and company names mentioned in this document may be the trademarks of their respective holders.

Page 21 of 21

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY2309CSXC-1 Datasheet file may be downloaded here without warranties.

Datasheet ID: CY2309CSXC-1 507683