CY14E256L-SZ25XCT

CY14E256L-SZ25XCT Datasheet

CY14E256L

Part	Datasheet
CY14E256L-SZ25XCT	CY14E256L-SZ25XCT (pdf)

Related Parts	Information
CY14E256L-SZ45XCT	CY14E256L-SZ45XCT
CY14E256L-SZ25XI	CY14E256L-SZ25XI
CY14E256L-SZ35XC	CY14E256L-SZ35XC
CY14E256L-SZ35XI	CY14E256L-SZ35XI
CY14E256L-SZ45XI	CY14E256L-SZ45XI
CY14E256L-SZ25XC	CY14E256L-SZ25XC
CY14E256L-SZ45XC	CY14E256L-SZ45XC

PDF Datasheet Preview
CY14E256L 256 Kbit 32K x 8 nvSRAM Functional Description • 25 ns, 35 ns, and 45 ns Access Times The Cypress CY14E256L is a fast static RAM with a nonvolatile • Pin Compatible with STK14C88 element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the • Hands Off Automatic STORE on Power Down with External world’s most reliable nonvolatile memory. The SRAM provides 68 µF Capacitor s • STORE to QuantumTrap Nonvolatile Elements is Initiated by Software, Hardware, or AutoStore on Power Down ign • RECALL to SRAM Initiated by Software or Power Up s • Unlimited READ, WRITE, and RECALL Cycles e • 1,000,000 STORE Cycles to QuantumTrap D • 100 Year Data Retention to QuantumTrap • Single 5V±10% Operation ew • Commercial and Industrial Temperature N • 32-Pin SOIC Package RoHS Compliance r • CDIP 300 mil Package unlimited read and write cycles, while independent, nonvolatile data resides in the highly reliable QuantumTrap cell. Data transfers from the SRAM to the nonvolatile elements the STORE operation takes place automatically at power down. On power up, data is restored to the SRAM the RECALL operation from the nonvolatile memory. Both the STORE and RECALL operations are also available under software control. A hardware STORE is initiated with the HSB pin. ROW DECODER fo Logic Block Diagram ded A5 n A6 e A7 A 11 A 12 m A13 o A14 ec DQ0 R DQ1 t DQ2 o DQ3 N DQ4 Quantum Trap 512 X 512 STORE STATIC RAM ARRAY 512 X 512 RECALL COLUMN I/O COLUMN DEC VCAP POWER CONTROL STORE/ RECALL CONTROL SOFTWARE DETECT - A13 A0 A0 A1 A2 A3 A4 A10 INPUT BUFFERS CE WE • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY14E256L Contents Features Best Practices Functional Description Maximum Ratings Logic Block Diagram Operating Range Contents DC Electrical Characteristics Pin Configurations Data Retention and Endurance Commercial and Industrial Ordering Information Document History Page Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products Page 2 of 19 [+] Feedback Pin Configurations Figure Pin Diagram 32-Pin SOIC/DIP CY14E256L Designs ed for New Table Pin Definitions nd Pin Name Alt I/O Type e m DQ0-DQ7 m WE Input Address Inputs. Used to select one of the 32,768 bytes of the nvSRAM. Input or Output Bidirectional Data I/O Lines. Used as input or output lines depending on operation. Input Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the I/O pins is written to the specific address location. ec OE Input Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip. Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read cycles. Deasserting OE HIGH causes the I/O pins to tri-state. R VSS t VCC No HSB Ground for the Device. The device is connected to ground of the system. Power Supply Power Supply Inputs to the Device. Input or Output Hardware Store Busy HSB . When LOW, this output indicates a Hardware Store is in progress. When pulled low external to the chip, it initiates a nonvolatile STORE operation. A weak internal pull up resistor keeps this pin high if not connected connection optional . VCAP Power Supply AutoStore Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM to nonvolatile elements. Page 3 of 19 [+] Feedback CY14E256L Device Operation The CY14E256L nvSRAM is made up of two functional components paired in the same physical cell. These are an SRAM having a capacitor of between 68 uF and 220 uF + 20% rated at 6V should be provided. The voltage on the VCAP pin is driven to 5V by a charge pump internal to the chip. A pull up is placed on WE to hold it inactive during power up. memory cell and a nonvolatile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the Figure AutoStore Mode SRAM is transferred to the nonvolatile cell the STORE operation or from the nonvolatile cell to SRAM the RECALL operation . This unique architecture enables storage and recall of all cells in parallel. During the STORE and RECALL opera- tions, SRAM READ and WRITE operations are inhibited. The CY14E256L supports unlimited reads and writes similar to a typical SRAM. In addition, it provides unlimited RECALL operations from the nonvolatile cells and up to one million STORE operations. SRAM Read The CY14E256L performs a READ cycle whenever CE and OE are LOW while WE and HSB are HIGH. The address specified Designs d Ordering Information de These parts are not recommended for new designs. n Speed e ns mm 25 Ordering Code CY14E256L-SZ25XCT CY14E256L-SZ25XC CY14E256L-SZ25XIT Package Diagram 51-85127 51-85127 51-85127 o CY14E256L-SZ25XI CY14E256L-SZ35XCT e CY14E256L-SZ35XC R CY14E256L-SZ35XIT t CY14E256L-SZ35XI No 45 CY14E256L-SZ45XCT 51-85127 51-85127 51-85127 51-85127 51-85127 51-85127 Package Type 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil Operating Range Commercial Industrial Commercial Industrial Commercial CY14E256L-SZ45XC 51-85127 32-pin SOIC 300 mil CY14E256L-SZ45XIT 51-85127 32-pin SOIC 300 mil Industrial CY14E256L-SZ45XI 51-85127 32-pin SOIC 300 mil CY14E256L-D45I 001-51694 32-pin CDIP 300 mil This table contains Final information. Contact your local Cypress sales representative for availability of these parts Page 15 of 19 [+] Feedback CY14E256L Package Diagram Figure 32-Pin 300 Mil SOIC 51-85127 PIN 1 ID 1 TYP. DIMENSIONS IN INCHES[MM] Updated Part Numbering Nomenclature and Ordering Information 503290 See ECN Changed from “Advance” to “Preliminary” s Changed the term “Unlimited” to “Infinite” n Changed ICC3 value from 10mA to 15mA Removed Industrial Grade mention ig Removed 35 ns speed bin s Removed ICC1 values from the DC table for 35 ns Industrial Grade Corrected VIL min specification from VCC - to VSS - e Removed all references pertaining to OE controlled Software STORE and D RECALL operation D E *F ew 1349963 r N 2427986 fo 2606744 Not Recommended 2708327 See ECN See ECN 02/19/09 05/18/2009 UHA/SFV GVCH GVCH/PYRS GVCH/PYRS Changed the address locations of the software STORE/RECALL command Updated Part Nomenclature Table and Ordering Information Table Changed from “Preliminary” to “Final.” Updated AC Test Conditions Updated Ordering Information Table Move to external web Updated Feature Section Added 35 ns access speed specs Added CDIP package Removed HSB ganging feature Added footnote 5 Updates all the notes Added Best practices Added Industrial specs Changed Icc3 from 15 mA to 10 mA Added ISB1 spec Added parameter VBL Changed VIH test conditions from -2 and 4 to -4 and 8mA Added footnote 6 and 7 Added tVSBL and VRESET parameter to Autostore or Power-up Recall table Added Thermal resistance values Changed parameter tAS to tSA Renamed tGLAX to tHACE Renamed tRESTORE to tDHSB Updated Figure 13 Changed part number from CY14E256L-D45XI to CY14E256L-D45I 2815609 11/26/2009 GVCH Added note in the Ordering Information table and watermark to state that the parts in this data sheet are not recommended for new designs. Added the Contents page. Page 18 of 19 [+] Feedback CY14E256L Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales Products PSoC psoc.cypress.com Clocks & Buffers clocks.cypress.com Wireless Memories Image Sensors wireless.cypress.com memory.cypress.com image.cypress.com Designs ot Recommended for New Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for N medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 19 of 19 [+] Feedback

PDF Datasheet Preview

CY14E256L
256 Kbit 32K x 8 nvSRAM

Functional Description
• 25 ns, 35 ns, and 45 ns Access Times

The Cypress CY14E256L is a fast static RAM with a nonvolatile
• Pin Compatible with STK14C88
element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the
• Hands Off Automatic STORE on Power Down with External
world’s most reliable nonvolatile memory. The SRAM provides
68 µF Capacitor
s
• STORE to QuantumTrap Nonvolatile Elements is Initiated by Software, Hardware, or AutoStore on Power Down
ign
• RECALL to SRAM Initiated by Software or Power Up s
• Unlimited READ, WRITE, and RECALL Cycles e
• 1,000,000 STORE Cycles to QuantumTrap D
• 100 Year Data Retention to QuantumTrap
• Single 5V±10% Operation
ew
• Commercial and Industrial Temperature N
• 32-Pin SOIC Package RoHS Compliance r
• CDIP 300 mil Package
unlimited read and write cycles, while independent, nonvolatile data resides in the highly reliable QuantumTrap cell. Data transfers from the SRAM to the nonvolatile elements the STORE operation takes place automatically at power down. On power up, data is restored to the SRAM the RECALL operation from the nonvolatile memory. Both the STORE and RECALL operations are also available under software control. A hardware STORE is initiated with the HSB pin.

ROW DECODER
fo Logic Block Diagram ded A5 n A6 e A7

A 11 A 12
m A13 o A14 ec DQ0 R DQ1 t DQ2 o DQ3 N DQ4

Quantum Trap 512 X 512

STORE

STATIC RAM ARRAY 512 X 512

RECALL

COLUMN I/O COLUMN DEC

VCAP

POWER CONTROL

STORE/ RECALL CONTROL

SOFTWARE DETECT
- A13 A0

A0 A1 A2 A3 A4 A10

INPUT BUFFERS

CE WE
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

CY14E256L

Contents

Features Best Practices

Functional Description Maximum Ratings

Logic Block Diagram Operating Range

Contents DC Electrical Characteristics

Pin Configurations Data Retention and Endurance
Commercial and Industrial Ordering Information Document History Page Sales, Solutions, and Legal Information

Worldwide Sales and Design Support Products

Page 2 of 19 [+] Feedback

Pin Configurations

Figure Pin Diagram 32-Pin SOIC/DIP

CY14E256L

Designs
ed for New Table Pin Definitions
nd Pin Name Alt I/O Type
e m DQ0-DQ7 m WE

Input

Address Inputs. Used to select one of the 32,768 bytes of the nvSRAM.

Input or Output Bidirectional Data I/O Lines. Used as input or output lines depending on operation.

Input

Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the I/O
pins is written to the specific address location.
ec OE

Input

Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.

Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read cycles. Deasserting OE HIGH causes the I/O pins to tri-state.

R VSS t VCC No HSB

Ground for the Device. The device is connected to ground of the system. Power Supply Power Supply Inputs to the Device. Input or Output Hardware Store Busy HSB . When LOW, this output indicates a Hardware Store is in progress.

When pulled low external to the chip, it initiates a nonvolatile STORE operation. A weak internal
pull up resistor keeps this pin high if not connected connection optional .

VCAP

Power Supply AutoStore Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM to nonvolatile elements.

Page 3 of 19 [+] Feedback

CY14E256L

Device Operation

The CY14E256L nvSRAM is made up of two functional components paired in the same physical cell. These are an SRAM
having a capacitor of between 68 uF and 220 uF + 20% rated at 6V should be provided. The voltage on the VCAP pin is driven to 5V by a charge pump internal to the chip. A pull up is placed on WE to hold it inactive during power up.
memory cell and a nonvolatile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the

Figure AutoStore Mode

SRAM is transferred to the nonvolatile cell the STORE
operation or from the nonvolatile cell to SRAM the RECALL
operation . This unique architecture enables storage and recall
of all cells in parallel. During the STORE and RECALL opera-
tions, SRAM READ and WRITE operations are inhibited. The CY14E256L supports unlimited reads and writes similar to a typical SRAM. In addition, it provides unlimited RECALL operations from the nonvolatile cells and up to one million STORE operations.

SRAM Read

The CY14E256L performs a READ cycle whenever CE and OE are LOW while WE and HSB are HIGH. The address specified

Designs
d Ordering Information
de These parts are not recommended for new designs.
n Speed e ns mm 25
Ordering Code

CY14E256L-SZ25XCT CY14E256L-SZ25XC CY14E256L-SZ25XIT

Package Diagram
51-85127 51-85127 51-85127
o CY14E256L-SZ25XI

CY14E256L-SZ35XCT
e CY14E256L-SZ35XC

R CY14E256L-SZ35XIT
t CY14E256L-SZ35XI

No 45

CY14E256L-SZ45XCT
51-85127 51-85127 51-85127 51-85127 51-85127 51-85127

Package Type
32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil 32-pin SOIC 300 mil

Operating Range

Commercial

Industrial

Commercial

Industrial

Commercial

CY14E256L-SZ45XC
51-85127
32-pin SOIC 300 mil

CY14E256L-SZ45XIT
51-85127
32-pin SOIC 300 mil

Industrial

CY14E256L-SZ45XI
51-85127
32-pin SOIC 300 mil

CY14E256L-D45I
001-51694
32-pin CDIP 300 mil

This table contains Final information. Contact your local Cypress sales representative for availability of these parts

Page 15 of 19 [+] Feedback

CY14E256L

Package Diagram

Figure 32-Pin 300 Mil SOIC 51-85127

PIN 1 ID 1

TYP.

DIMENSIONS IN INCHES[MM]
Updated Part Numbering Nomenclature and Ordering Information
503290

See ECN

Changed from “Advance” to “Preliminary”
s Changed the term “Unlimited” to “Infinite” n Changed ICC3 value from 10mA to 15mA

Removed Industrial Grade mention
ig Removed 35 ns speed bin s Removed ICC1 values from the DC table for 35 ns Industrial Grade

Corrected VIL min specification from VCC - to VSS -
e Removed all references pertaining to OE controlled Software STORE and D RECALL operation
*D *E *F
ew 1349963 r N 2427986 fo 2606744 Not Recommended 2708327

See ECN See ECN 02/19/09
05/18/2009

UHA/SFV GVCH

GVCH/PYRS

GVCH/PYRS
Changed the address locations of the software STORE/RECALL command Updated Part Nomenclature Table and Ordering Information Table
Changed from “Preliminary” to “Final.” Updated AC Test Conditions Updated Ordering Information Table

Move to external web

Updated Feature Section Added 35 ns access speed specs Added CDIP package Removed HSB ganging feature Added footnote 5 Updates all the notes Added Best practices Added Industrial specs Changed Icc3 from 15 mA to 10 mA Added ISB1 spec Added parameter VBL Changed VIH test conditions from -2 and 4 to -4 and 8mA Added footnote 6 and 7 Added tVSBL and VRESET parameter to Autostore or Power-up Recall table Added Thermal resistance values Changed parameter tAS to tSA Renamed tGLAX to tHACE Renamed tRESTORE to tDHSB Updated Figure 13

Changed part number from CY14E256L-D45XI to CY14E256L-D45I
2815609 11/26/2009

GVCH
Added note in the Ordering Information table and watermark to state that
the parts in this data sheet are not recommended for new designs. Added
the Contents page.

Page 18 of 19 [+] Feedback

CY14E256L

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales

Products

PSoC
psoc.cypress.com

Clocks & Buffers
clocks.cypress.com

Wireless Memories Image Sensors
wireless.cypress.com memory.cypress.com
image.cypress.com

Designs
ot Recommended for New Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of
any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for

N medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as
critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems
application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

All products and company names mentioned in this document may be the trademarks of their respective holders.

Page 19 of 19
[+] Feedback

More datasheets: 163A11779X | 164A10729X | 163A11809X | 164A10739X | 164A10749X | 163A11799X | 163A11769X | 164A10719X | 163A11789X | CY14E256L-SZ45XCT

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY14E256L-SZ25XCT Datasheet file may be downloaded here without warranties.

Datasheet ID: CY14E256L-SZ25XCT 507661