CY14B256L-SP45XCT

CY14B256L-SP45XCT Datasheet

CY14B256L

Part	Datasheet
CY14B256L-SP45XCT	CY14B256L-SP45XCT (pdf)

Related Parts	Information
CY14B256L-SP35XI	CY14B256L-SP35XI
CY14B256L-SZ35XIT	CY14B256L-SZ35XIT
CY14B256L-SZ35XI	CY14B256L-SZ35XI
CY14B256L-SZ35XCT	CY14B256L-SZ35XCT
CY14B256L-SP45XIT	CY14B256L-SP45XIT
CY14B256L-SP35XIT	CY14B256L-SP35XIT
CY14B256L-SZ45XIT	CY14B256L-SZ45XIT
CY14B256L-SP35XCT	CY14B256L-SP35XCT
CY14B256L-SZ45XCT	CY14B256L-SZ45XCT
CY14B256L-SP45XC	CY14B256L-SP45XC
CY14B256L-SZ45XC	CY14B256L-SZ45XC
CY14B256L-SP45XI	CY14B256L-SP45XI
CY14B256L-SZ45XI	CY14B256L-SZ45XI
CY14B256L-SP35XC	CY14B256L-SP35XC
CY14B256L-SZ35XC	CY14B256L-SZ35XC

PDF Datasheet Preview
CY14B256L 256 Kbit 32K x 8 nvSRAM Functional Description • 25 ns, 35 ns, and 45 ns access times The Cypress CY14B256L is a fast static RAM with a nonvolatile • Pin compatible with STK14D88 element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the • Hands off automatic STORE on power down with only a small world’s most reliable nonvolatile memory. The SRAM provides capacitor s • STORE to QuantumTrap nonvolatile elements is initiated by software, hardware, or AutoStore on power down ign • RECALL to SRAM initiated by software or power up s • Unlimited READ, WRITE, and RECALL cycles e • 200,000 STORE cycles to QuantumTrap D • 20 year data retention at 55°C • Single 3V +20%, operation ew • Commercial and industrial temperature N • 32-pin 300 mil SOIC and 48-pin 300 mil SSOP packages r • RoHS compliance unlimited read and write cycles, while independent, nonvolatile data resides in the highly reliable QuantumTrap cell. Data transfers from the SRAM to the nonvolatile elements the STORE operation takes place automatically at power down. On power up, data is restored to the SRAM the RECALL operation from the nonvolatile memory. Both the STORE and RECALL operations are also available under software control. A hardware STORE is initiated with the HSB pin. ROW DECODER d fo Logic Block Diagram nde A5 m A12 o A14 Rec DQ0 t DQ2 o DQ3 N DQ4 Quantum Trap 512 X 512 STORE STATIC RAM ARRAY 512 X 512 RECALL COLUMN I/O COLUMN DEC VCAP POWER CONTROL STORE/ RECALL CONTROL SOFTWARE DETECT - A13 A0 INPUT BUFFERS A0 A1 A2 A3 A4 A10 CE WE • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY14B256L Contents Best Practices 6 Functional Description Maximum Ratings 8 Logic Block Diagram Operating Range 8 Ordering Information Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products Page 2 of 19 [+] Feedback Pin Configurations Figure Pin Diagram - 32-Pin SOIC and 48-Pin SSOP CY14B256L Designs d for New Pin Definitions e Pin Name Alt IO Type d n DQ0-DQ7 me WE Input Address Inputs. Used to select one of the 32,768 bytes of the nvSRAM. Input or Output Bidirectional Data IO Lines. Used as input or output lines depending on operation. Input Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the IO pins is written to the specific address location. Input Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip. Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read cycles. Deasserting OE HIGH causes the IO pins to tri-state. ec VSS R VCC Not HSB Ground for the Device. The device is connected to ground of the system. Power Supply Power Supply Inputs to the Device. Input or Output Hardware Store Busy HSB . When LOW, this output indicates a Hardware Store is in progress. When pulled low external to the chip, it initiates a nonvolatile STORE operation. A weak internal pull up resistor keeps this pin high if not connected connection optional . VCAP Power Supply AutoStore Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM to nonvolatile elements. No Connect No Connect. This pin is not connected to the die. Page 3 of 19 [+] Feedback CY14B256L Device Operation The CY14B256L nvSRAM is made up of two functional components paired in the same physical cell. These are an SRAM memory cell and a nonvolatile QuantumTrap cell. The SRAM Figure 2 shows the proper connection of the storage capacitor VCAP for automatic store operation. Refer to the DC Electrical Characteristics on page 8 for the size of VCAP. The voltage on the VCAP pin is driven to 5V by a charge pump internal to the chip. A pull up is placed on WE to hold it inactive during power up. memory cell operates as a standard fast static RAM. Data in the SRAM is transferred to the nonvolatile cell the STORE Figure AutoStore Mode operation or from the nonvolatile cell to SRAM the RECALL V CAP 10k Ohm 0.1UF operation . This unique architecture enables the storage and recall of all cells in parallel. During the STORE and RECALL operations, SRAM READ and WRITE operations are inhibited. The CY14B256L supports unlimited reads and writes similar to a typical SRAM. In addition, it provides unlimited RECALL operations from the nonvolatile cells and up to 200K STORE operations. SRAM Read The CY14B256L performs a READ cycle whenever CE and OE are LOW while WE and HSB are HIGH. The address specified VCAP ed Ordering Information d These parts are not recommended for new designs. en Speed ns omm 25 Ordering Code CY14B256L-SZ25XCT CY14B256L-SZ25XC CY14B256L-SP25XCT Package Diagram 51-85127 51-85127 51-85061 c CY14B256L-SP25XC e CY14B256L-SZ25XIT R CY14B256L-SZ25XI t CY14B256L-SP25XIT o CY14B256L-SP25XI CY14B256L-SZ35XCT 51-85061 51-85127 51-85127 51-85061 51-85061 51-85127 Package Type 32-pin SOIC 32-pin SOIC 48-pin SSOP 48-pin SSOP 32-pin SOIC 32-pin SOIC 48-pin SSOP 48-pin SSOP 32-pin SOIC Operating Range Commercial Industrial Commercial CY14B256L-SZ35XC 51-85127 32-pin SOIC CY14B256L-SP35XCT 51-85061 48-pin SSOP CY14B256L-SP35XC 51-85061 48-pin SSOP CY14B256L-SZ35XIT 51-85127 32-pin SOIC Industrial CY14B256L-SZ35XI 51-85127 32-pin SOIC CY14B256L-SP35XIT 51-85061 48-pin SSOP CY14B256L-SP35XI 51-85061 48-pin SSOP Page 15 of 19 [+] Feedback CY14B256L Ordering Information These parts are not recommended for new designs. Speed ns Ordering Code Package Diagram Package Type Operating Range CY14B256L-SZ45XCT 51-85127 32-pin SOIC Commercial CY14B256L-SZ45XC 51-85127 32-pin SOIC CY14B256L-SP45XCT 51-85061 48-pin SSOP CY14B256L-SP45XC 51-85061 48-pin SSOP CY14B256L-SZ45XIT 51-85127 32-pin SOIC Industrial s CY14B256L-SZ45XI n CY14B256L-SP45XIT ig CY14B256L-SP45XI 51-85127 51-85061 51-85061 32-pin SOIC 48-pin SSOP 48-pin SSOP s All parts are Pb-free. This table contains Final information. Contact your local Cypress sales representative for availability of these parts De Package Diagrams w Figure 32-Pin 300 Mil SOIC 51-85127 e PIN 1 ID r N 16 d fo e d0.405[10.287] DIMENSIONS IN INCHES[MM] REFERENCE JEDEC MO-119 MIN. MAX. men 17 ecom Not R 32 SEATING PLANE PART # S32.3 STANDARD PKG. SZ32.3 LEAD FREE PKG. TYP. 51-85127-A Page 16 of 19 [+] Feedback Package Diagrams continued Figure 48-Pin 300 mil Shrunk Small Outline Package 51-85061 s Added Soft Sequence Processing Time Waveform n Updated Part Numbering Nomenclature and Ordering Information ig Changed from “Advance” to “Preliminary” s Changed the term “Unlimited” to “Infinite” Changed endurance from 500K cycles to 200K cycles e Device operation Tolerance limit changed from + 20% to + 15% in the D Features Section and Operating Range Table E F G H 597004 696097 1349963 2483006 2625139 r New See ECN ded fo See ECN en See ECN See ECN Not Recomm 01/30/09 VKN SFV GVCH/PYRS GVCH/PYRS Removed Icc1 values from the DC table for 25 ns and 35 ns industrial grade Changed VSWITCH min from 2.55V to 2.45V Added temperature specification to data retention - 20 years at 55°C Changed the max value of Vcap storage capacitor from 120 uF to 57 uF Updated Part Nomenclature Table and Ordering Information Table Removed VSWITCH min specification from the AutoStore/Power Up RECALL table Changed tGLAX specification from 20 ns to 1 ns Added tDELAY max specification of 70 us in the Hardware STORE Cycle table Removed tHLBL specification Changed tSS specification from 70 us min to 70 us max Changed VCAP max from 57 uF to 120 uF Added footnote 6 related to HSB. Changed tGLAX to tGHAX Changed from Preliminary to Final. Updated Ordering Information Table Changed tolerance from +15%, -10% to +20%, -10% Changed Operating voltage range from 2.7V-3.45V to 2.7V-3.6V. Updated “features” Updated WE pin description Added data retention at 55oC Added best practices Added ICC1 spec for 25ns and 35ns access speed for industrial temperate Updated VIH from Vcc+0.3 to Vcc+0.5 Removed footnote 4 and 5 Added Data retention and Endurance Table Added Thermal resistance values Changed parameter tAS to tSA Changed tRECALL from 50us to 120us Including tss of 70us Renamed tGLAX to tHA Updated Figure 11 and 12 Renamed tHLHX to tPHSB Updated Figure 12 and 13 I 2815609 11/26/09 GVCH Added note in the Ordering Information table and watermark to state that the parts in this data sheet are not recommended for new designs. Added the Contents page. Page 18 of 19 [+] Feedback CY14B256L Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales Products PSoC psoc.cypress.com Clocks & Buffers clocks.cypress.com Wireless Memories Image Sensors wireless.cypress.com memory.cypress.com image.cypress.com Designs ot Recommended for New Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for N medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Page 19 of 19 AutoStore and QuantumTrap are registered trademarks of Cypress Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders. [+] Feedback

PDF Datasheet Preview

CY14B256L
256 Kbit 32K x 8 nvSRAM

Functional Description
• 25 ns, 35 ns, and 45 ns access times

The Cypress CY14B256L is a fast static RAM with a nonvolatile
• Pin compatible with STK14D88
element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the
• Hands off automatic STORE on power down with only a small world’s most reliable nonvolatile memory. The SRAM provides
capacitor
s
• STORE to QuantumTrap nonvolatile elements is initiated by software, hardware, or AutoStore on power down
ign
• RECALL to SRAM initiated by software or power up s
• Unlimited READ, WRITE, and RECALL cycles e
• 200,000 STORE cycles to QuantumTrap D
• 20 year data retention at 55°C
• Single 3V +20%, operation
ew
• Commercial and industrial temperature N
• 32-pin 300 mil SOIC and 48-pin 300 mil SSOP packages r
• RoHS compliance
unlimited read and write cycles, while independent, nonvolatile data resides in the highly reliable QuantumTrap cell. Data transfers from the SRAM to the nonvolatile elements the STORE operation takes place automatically at power down. On power up, data is restored to the SRAM the RECALL operation from the nonvolatile memory. Both the STORE and RECALL operations are also available under software control. A hardware STORE is initiated with the HSB pin.

ROW DECODER
d fo Logic Block Diagram nde A5
m A12
o A14 Rec DQ0
t DQ2 o DQ3 N DQ4

Quantum Trap 512 X 512

STORE

STATIC RAM ARRAY 512 X 512

RECALL

COLUMN I/O COLUMN DEC

VCAP

POWER CONTROL

STORE/ RECALL CONTROL

SOFTWARE DETECT
- A13 A0

INPUT BUFFERS

A0 A1 A2 A3 A4 A10

CE WE
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

CY14B256L

Contents

Best Practices 6

Functional Description

Maximum Ratings 8

Logic Block Diagram

Operating Range 8
Ordering Information

Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products

Page 2 of 19 [+] Feedback

Pin Configurations

Figure Pin Diagram - 32-Pin SOIC and 48-Pin SSOP

CY14B256L

Designs
d for New Pin Definitions
e Pin Name Alt

IO Type
d n DQ0-DQ7 me WE

Input

Address Inputs. Used to select one of the 32,768 bytes of the nvSRAM.

Input or Output Bidirectional Data IO Lines. Used as input or output lines depending on operation.

Input

Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the IO
pins is written to the specific address location.

Input

Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.

Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read cycles. Deasserting OE HIGH causes the IO pins to tri-state.
ec VSS R VCC Not HSB

Ground for the Device. The device is connected to ground of the system.

Power Supply Power Supply Inputs to the Device.

Input or Output Hardware Store Busy HSB . When LOW, this output indicates a Hardware Store is in progress. When pulled low external to the chip, it initiates a nonvolatile STORE operation. A weak internal pull up resistor keeps this pin high if not connected connection optional .

VCAP

Power Supply AutoStore Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM
to nonvolatile elements.

No Connect No Connect. This pin is not connected to the die.

Page 3 of 19 [+] Feedback

CY14B256L

Device Operation

The CY14B256L nvSRAM is made up of two functional components paired in the same physical cell. These are an SRAM memory cell and a nonvolatile QuantumTrap cell. The SRAM

Figure 2 shows the proper connection of the storage capacitor VCAP for automatic store operation. Refer to the DC Electrical Characteristics on page 8 for the size of VCAP. The voltage on the VCAP pin is driven to 5V by a charge pump internal to the chip. A pull up is placed on WE to hold it inactive during power up.
memory cell operates as a standard fast static RAM. Data in the SRAM is transferred to the nonvolatile cell the STORE

Figure AutoStore Mode
operation or from the nonvolatile cell to SRAM the RECALL

V CAP 10k Ohm 0.1UF
operation . This unique architecture enables the storage and recall of all cells in parallel. During the STORE and RECALL operations, SRAM READ and WRITE operations are inhibited. The CY14B256L supports unlimited reads and writes similar to a typical SRAM. In addition, it provides unlimited RECALL operations from the nonvolatile cells and up to 200K STORE operations.

SRAM Read

The CY14B256L performs a READ cycle whenever CE and OE are LOW while WE and HSB are HIGH. The address specified

VCAP
ed Ordering Information
d These parts are not recommended for new designs.
en Speed ns omm 25
Ordering Code

CY14B256L-SZ25XCT CY14B256L-SZ25XC CY14B256L-SP25XCT

Package Diagram
51-85127 51-85127 51-85061
c CY14B256L-SP25XC
e CY14B256L-SZ25XIT

R CY14B256L-SZ25XI
t CY14B256L-SP25XIT
o CY14B256L-SP25XI

CY14B256L-SZ35XCT
51-85061 51-85127 51-85127 51-85061 51-85061 51-85127

Package Type
32-pin SOIC 32-pin SOIC 48-pin SSOP 48-pin SSOP 32-pin SOIC 32-pin SOIC 48-pin SSOP 48-pin SSOP 32-pin SOIC

Operating Range

Commercial

Industrial

Commercial

CY14B256L-SZ35XC
51-85127
32-pin SOIC

CY14B256L-SP35XCT
51-85061
48-pin SSOP

CY14B256L-SP35XC
51-85061
48-pin SSOP

CY14B256L-SZ35XIT
51-85127
32-pin SOIC

Industrial

CY14B256L-SZ35XI
51-85127
32-pin SOIC

CY14B256L-SP35XIT
51-85061
48-pin SSOP

CY14B256L-SP35XI
51-85061
48-pin SSOP

Page 15 of 19 [+] Feedback

CY14B256L
Ordering Information

These parts are not recommended for new designs.

Speed ns
Ordering Code

Package Diagram

Package Type

Operating Range

CY14B256L-SZ45XCT
51-85127
32-pin SOIC

Commercial

CY14B256L-SZ45XC
51-85127
32-pin SOIC

CY14B256L-SP45XCT
51-85061
48-pin SSOP

CY14B256L-SP45XC
51-85061
48-pin SSOP

CY14B256L-SZ45XIT
51-85127
32-pin SOIC

Industrial
s CY14B256L-SZ45XI n CY14B256L-SP45XIT ig CY14B256L-SP45XI
51-85127 51-85061 51-85061
32-pin SOIC 48-pin SSOP 48-pin SSOP
s All parts are Pb-free. This table contains Final information. Contact your local Cypress sales representative for availability of these parts

De Package Diagrams
w Figure 32-Pin 300 Mil SOIC 51-85127 e PIN 1 ID
r N 16
d fo e
d0.405[10.287]

DIMENSIONS IN INCHES[MM] REFERENCE JEDEC MO-119

MIN. MAX.
men 17 ecom

Not R
32 SEATING PLANE

PART # S32.3 STANDARD PKG. SZ32.3 LEAD FREE PKG.

TYP.
51-85127-*A

Page 16 of 19 [+] Feedback

Package Diagrams continued

Figure 48-Pin 300 mil Shrunk Small Outline Package 51-85061
s Added Soft Sequence Processing Time Waveform n Updated Part Numbering Nomenclature and Ordering Information ig Changed from “Advance” to “Preliminary” s Changed the term “Unlimited” to “Infinite”

Changed endurance from 500K cycles to 200K cycles
e Device operation Tolerance limit changed from + 20% to + 15% in the D Features Section and Operating Range Table
*E *F *G *H
597004
696097 1349963 2483006 2625139
r New See ECN ded fo See ECN en See ECN

See ECN

Not Recomm 01/30/09

VKN SFV GVCH/PYRS GVCH/PYRS
Removed Icc1 values from the DC table for 25 ns and 35 ns industrial grade Changed VSWITCH min from 2.55V to 2.45V Added temperature specification to data retention - 20 years at 55°C Changed the max value of Vcap storage capacitor from 120 uF to 57 uF Updated Part Nomenclature Table and Ordering Information Table

Removed VSWITCH min specification from the AutoStore/Power Up RECALL table Changed tGLAX specification from 20 ns to 1 ns Added tDELAY max specification of 70 us in the Hardware STORE Cycle table Removed tHLBL specification Changed tSS specification from 70 us min to 70 us max Changed VCAP max from 57 uF to 120 uF

Added footnote 6 related to HSB. Changed tGLAX to tGHAX
Changed from Preliminary to Final. Updated Ordering Information Table

Changed tolerance from +15%, -10% to +20%, -10% Changed Operating voltage range from 2.7V-3.45V to 2.7V-3.6V.

Updated “features” Updated WE pin description Added data retention at 55oC Added best practices Added ICC1 spec for 25ns and 35ns access speed for industrial temperate Updated VIH from Vcc+0.3 to Vcc+0.5 Removed footnote 4 and 5 Added Data retention and Endurance Table Added Thermal resistance values Changed parameter tAS to tSA

Changed tRECALL from 50us to 120us Including tss of 70us

Renamed tGLAX to tHA

Updated Figure 11 and 12

Renamed tHLHX to tPHSB Updated Figure 12 and 13
*I 2815609
11/26/09

GVCH
Added note in the Ordering Information table and watermark to state that the parts in this data sheet are not recommended for new designs. Added the Contents page.

Page 18 of 19 [+] Feedback

CY14B256L

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales

Products

PSoC
psoc.cypress.com

Clocks & Buffers
clocks.cypress.com

Wireless Memories Image Sensors
wireless.cypress.com memory.cypress.com
image.cypress.com

Designs
ot Recommended for New Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of
any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for

N medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as
critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems
application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Page 19 of 19

AutoStore and QuantumTrap are registered trademarks of Cypress Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders.
[+] Feedback

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY14B256L-SP45XCT Datasheet file may be downloaded here without warranties.

Datasheet ID: CY14B256L-SP45XCT 507659