CS5374-CNZ

CS5374-CNZ Datasheet

CS5374

Part	Datasheet
CS5374-CNZ	CS5374-CNZ (pdf)

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CS5374 Dual High-performance Amplifier & Modulator High Input Impedance Differential Amplifier • Ultra-low input bias < 1 pA • Max signal amplitude 5 Vpp differential Fourth Order Delta-Sigma Modulator • Signal Bandwidth DC to 2 kHz • Common mode rejection 110 dB CMRR Differential Analog Input, Digital Output • Multiplexed inputs INA, INB, 800Ω termination • Selectable Gain 1x, 2x, 4x, 8x, 16x, 32x, 64x Excellent Amplifier Noise Performance • uVpp between Hz and 10 Hz • 11 nV / from 200 Hz to 2 kHz High Modulator Dynamic Range • 126 dB SNR 215 Hz BW 2 ms sampling • 123 dB SNR 430 Hz BW 1 ms sampling Low Total Harmonic Distortion • dB THD typical • dB THD maximum Low Power Consumption • Normal operation mA per channel • Power down 15 uA per channel max Dual Power Supply Configuration • VA+ = V = V VD = V The CS5374 combines two marine seismic analog measurement channels into one 7 mm x 7 mm QFN package. Each measurement channel consists of a high input impedance programmable gain differential amplifier that buffers analog signals into a high-performance, fourth-order modulator. The low-noise modulator converts the analog signal into a one-bit serial bit stream suitable for the CS5376A digital filter. Each amplifier has two sets of external inputs, INA and INB, to simplify system design as inputs from a hydrophone sensor or the CS4373A test DAC. An internal 800Ω termination can also be selected for noise tests. Gain settings are binary weighted 1x, 2x, 4x, 8x, 16x, 32x, 64x and match the CS4373A test DAC output attenuation settings for full-scale testing at all gain ranges. Both the input multiplexer and gain are set by registers accessed through a standard SPI port. Each fourth-order modulator has very high dynamic range combined with low total harmonic distortion and low power consumption. It converts differential analog signals from the amplifier to an oversampled serial bit stream which is decimated by the CS5376A digital filter to a 24-bit output at the final output word rate. ORDERING INFORMATION See page GUARD1 INA1+ INB1+ 400 Ω MUX1 400 Ω INA1- INB1- VA+ VA- INA2+ INB2+ OUT1+ OUT1- INR1- INF1- INF1+INR1+ VA- VA+ Reset, Clock, and Synchronization RST MCLK MSYNC GAIN1 CS5374 4th Order Modulator 4th Order Modulator MDATA1 MFLAG1 VD GND MDATA2 MFLAG2 400 Ω GAIN2 MUX2 400 Ω INA2- INB2- GUARD2 SPITM Serial Interface SDO SDI SCLK CS OUT2+ OUT2- INR2- INF2- INF2+INR2+ VREF+ VREF- Preliminary Product Information This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. Copyright Cirrus Logic, Inc. 2010 All Rights Reserved SEP '10 DS862F2 CS5374 CS5374 LIST OF FIGURES Figure External Anti-alias Filter 6 Figure CS5374 Amplifier Noise Performance 7 Figure CS5374 Noise Performance 1x Gain 9 Figure CS5374 + CS4373A Test DAC Dynamic Performance 9 Figure Digital Rise and Fall Times SYNC from external 10 Figure System Synchronization 10 Figure MCLK / MSYNC Timing Detail 11 Figure SDI Write Timing in SPI Slave Mode 12 Figure SDO Read Timing in SPI Slave Mode 12 Figure CS5374 System Block 14 Figure CS5374 Connection Diagram 15 Figure CS5374 to CS5376A Digital 15 Figure CS5374 Amplifier Block 16 Figure CS5374 Modulator Block 18 Figure SPI Interface Block 21 Figure CS5374 Slave Serial Transactions with CS5376A 22 Figure Power Mode Diagram 29 Figure Voltage Reference Circuit 30 Figure Power Supply Diagram 32 Figure Hardware Version ID Register VERSION 35 Figure Amplifier 1 Configuration Register 36 Figure Amplifier 2 Configuration Register 37 Figure Modulator 1 & 2 Configuration Register 38 Figure Power Configuration Register PWRCFG 39 LIST OF TABLES Table 24-bit Output Coding 20 Table SPI Configuration Registers 23 Table Digital Selections for Gain and Input Mux Control 23 Table Example SPI Transactions to Write and Read the CS5374 Configuration Registers 24 Table Example CS5376A SPI 1 Transactions to Write and Read the GPCFG0 Register 25 Table Example CS5376A SPI 1 Transactions to Write the CS5374 AMP1CFG Register 26 Table Example CS5376A SPI 1 Transactions to Write AMP2CFG and ADCCFG 27 Table Example CS5376A SPI 1 Transactions to Write the CS5374 PWRCFG Register 28 CS5374 CS5374 CHARACTERISTICS AND SPECIFICATIONS • Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. • Typical performance characteristics and specifications are derived from measurements taken at nom- inal supply voltages and TA = 25°C. • GND = 0 V, all voltages with respect to 0 V. • Device connected as shown in Figure 11 and Figure 12 unless otherwise noted. SPECIFIED OPERATING CONDITIONS Parameter Symbol Min Max Unit Bipolar Power Supplies Positive Analog Negative Analog Positive Digital +2% VA+ Note 1 +2% VA- +3% VD Voltage Reference [VREF+] - [VREF-] VREF- Note 2, 3 VREF Note 4 VREF- Thermal Ambient Operating Temperature -CNZ TA Notes VA- must always be the most-negative input voltage to avoid potential SCR latch-up conditions. By design, a V voltage reference input results in the best signal-to-noise performance. Channel-to-channel gain accuracy is directly proportional to the voltage reference absolute accuracy. VREF inputs must satisfy VA- VREF- < VREF+ VA+. ABSOLUTE MAXIMUM RATINGS Parameter Unit DC Power Supplies Positive Analog VA+ Negative Analog VA- Digital VD Analog Supply Differential [ VA+ - VA- ] VADIFF Digital Supply Differential [ VD - VA- ] VDDIFF Input Current, Any Pin Except Supplies Note 5, 6 Input Current, Power Supplies Note 5 IPWR Output Current Note 5 IOUT Power Dissipation ORDERING INFORMATION Model Number CS5374-CNZ, lead Pb free Temperature -10 to +70 °C CS5374 Package 48-Pin QFN ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number CS5374-CNZ, lead Pb free Peak Reflow Temp 260 °C MSL Rating* 3 Max Floor Life 7 Days * MSL Moisture Sensitivity Level as specified by IPC/JEDEC J-STD-020. CS5374 CS5374 F1 F2 Date AUG 2008 DEC 2008 JAN 2009 APR 2009 OCT 2009 SEP 2010 Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one nearest you go to IMPORTANT NOTICE "Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. Cirrus Logic, Inc. and its subsidiaries “Cirrus” believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind express or implied . Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE “CRITICAL APPLICATIONS” . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY, SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. SPI is a trademark of Motorola, Inc.

PDF Datasheet Preview

CS5374

Dual High-performance Amplifier & Modulator

High Input Impedance Differential Amplifier
• Ultra-low input bias < 1 pA
• Max signal amplitude 5 Vpp differential

Fourth Order Delta-Sigma Modulator
• Signal Bandwidth DC to 2 kHz
• Common mode rejection 110 dB CMRR

Differential Analog Input, Digital Output
• Multiplexed inputs INA, INB, 800Ω termination
• Selectable Gain 1x, 2x, 4x, 8x, 16x, 32x, 64x

Excellent Amplifier Noise Performance
• uVpp between Hz and 10 Hz
• 11 nV / from 200 Hz to 2 kHz

High Modulator Dynamic Range
• 126 dB SNR 215 Hz BW 2 ms sampling
• 123 dB SNR 430 Hz BW 1 ms sampling

Low Total Harmonic Distortion
• dB THD typical
• dB THD maximum

Low Power Consumption
• Normal operation mA per channel
• Power down 15 uA per channel max

Dual Power Supply Configuration
• VA+ = V = V VD = V

The CS5374 combines two marine seismic analog measurement channels into one 7 mm x 7 mm QFN package. Each measurement channel consists of a high input impedance programmable gain differential amplifier that buffers analog signals into a high-performance, fourth-order modulator. The low-noise modulator converts the analog signal into a one-bit serial bit stream suitable for the CS5376A digital filter.

Each amplifier has two sets of external inputs, INA and INB, to simplify system design as inputs from a hydrophone sensor or the CS4373A test DAC. An internal 800Ω termination can also be selected for noise tests. Gain settings are binary weighted 1x, 2x, 4x, 8x, 16x, 32x, 64x and match the CS4373A test DAC output attenuation settings for full-scale testing at all gain ranges. Both the input multiplexer and gain are set by registers accessed through a standard SPI port.

Each fourth-order modulator has very high dynamic range combined with low total harmonic distortion and low power consumption. It converts differential analog signals from the amplifier to an oversampled serial bit stream which is decimated by the CS5376A digital filter to a 24-bit output at the final output word rate.
ORDERING INFORMATION See page

GUARD1

INA1+

INB1+
400 Ω

MUX1
400 Ω

INA1-

INB1-

VA+ VA-

INA2+

INB2+

OUT1+ OUT1- INR1- INF1- INF1+INR1+

VA- VA+

Reset, Clock, and

Synchronization

RST MCLK MSYNC

GAIN1

CS5374
4th Order Modulator
4th Order Modulator

MDATA1 MFLAG1

VD GND

MDATA2 MFLAG2
400 Ω

GAIN2

MUX2
400 Ω

INA2-

INB2-

GUARD2

SPITM Serial Interface

SDO SDI SCLK CS

OUT2+ OUT2- INR2- INF2- INF2+INR2+

VREF+ VREF-

Preliminary Product Information

This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice.

Copyright Cirrus Logic, Inc. 2010 All Rights Reserved

SEP '10 DS862F2

CS5374

CS5374
LIST OF FIGURES

Figure External Anti-alias Filter 6 Figure CS5374 Amplifier Noise Performance 7 Figure CS5374 Noise Performance 1x Gain 9 Figure CS5374 + CS4373A Test DAC Dynamic Performance 9 Figure Digital Rise and Fall Times SYNC from external 10 Figure System Synchronization 10 Figure MCLK / MSYNC Timing Detail 11 Figure SDI Write Timing in SPI Slave Mode 12 Figure SDO Read Timing in SPI Slave Mode 12 Figure CS5374 System Block 14 Figure CS5374 Connection Diagram 15 Figure CS5374 to CS5376A Digital 15 Figure CS5374 Amplifier Block 16 Figure CS5374 Modulator Block 18 Figure SPI Interface Block 21 Figure CS5374 Slave Serial Transactions with CS5376A 22 Figure Power Mode Diagram 29 Figure Voltage Reference Circuit 30 Figure Power Supply Diagram 32 Figure Hardware Version ID Register VERSION 35 Figure Amplifier 1 Configuration Register 36 Figure Amplifier 2 Configuration Register 37 Figure Modulator 1 & 2 Configuration Register 38 Figure Power Configuration Register PWRCFG 39

LIST OF TABLES

Table 24-bit Output Coding 20 Table SPI Configuration Registers 23 Table Digital Selections for Gain and Input Mux Control 23 Table Example SPI Transactions to Write and Read the CS5374 Configuration Registers 24 Table Example CS5376A SPI 1 Transactions to Write and Read the GPCFG0 Register 25 Table Example CS5376A SPI 1 Transactions to Write the CS5374 AMP1CFG Register 26 Table Example CS5376A SPI 1 Transactions to Write AMP2CFG and ADCCFG 27 Table Example CS5376A SPI 1 Transactions to Write the CS5374 PWRCFG Register 28

CS5374

CS5374

CHARACTERISTICS AND SPECIFICATIONS
• Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions.
• Typical performance characteristics and specifications are derived from measurements taken at nom-
inal supply voltages and TA = 25°C.
• GND = 0 V, all voltages with respect to 0 V.
• Device connected as shown in Figure 11 and Figure 12 unless otherwise noted.

SPECIFIED OPERATING CONDITIONS

Parameter

Symbol Min

Max Unit

Bipolar Power Supplies Positive Analog Negative Analog Positive Digital
+2% VA+

Note 1 +2% VA-
+3% VD

Voltage Reference [VREF+] - [VREF-] VREF-

Note 2, 3 VREF

Note 4 VREF-

Thermal Ambient Operating Temperature
-CNZ TA

Notes VA- must always be the most-negative input voltage to avoid potential SCR latch-up conditions. By design, a V voltage reference input results in the best signal-to-noise performance. Channel-to-channel gain accuracy is directly proportional to the voltage reference absolute accuracy. VREF inputs must satisfy VA- VREF- < VREF+ VA+.

ABSOLUTE MAXIMUM RATINGS

Parameter

Unit

DC Power Supplies

Positive Analog VA+

Negative Analog VA-

Digital VD

Analog Supply Differential
[ VA+ - VA- ] VADIFF

Digital Supply Differential
[ VD - VA- ] VDDIFF

Input Current, Any Pin Except Supplies

Note 5, 6

Input Current, Power Supplies

Note 5 IPWR

Output Current

Note 5 IOUT

Power Dissipation
ORDERING INFORMATION

Model Number CS5374-CNZ, lead Pb free

Temperature -10 to +70 °C

CS5374

Package 48-Pin QFN

ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION

Model Number CS5374-CNZ, lead Pb free

Peak Reflow Temp 260 °C

MSL Rating* 3

Max Floor Life 7 Days
* MSL Moisture Sensitivity Level as specified by IPC/JEDEC J-STD-020.

CS5374

CS5374

F1 F2

Date AUG 2008 DEC 2008 JAN 2009 APR 2009

OCT 2009 SEP 2010

Contacting Cirrus Logic Support

For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one nearest you go to

IMPORTANT NOTICE
"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available.

Cirrus Logic, Inc. and its subsidiaries “Cirrus” believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind express or implied . Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE “CRITICAL APPLICATIONS” . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY, SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.

Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.

SPI is a trademark of Motorola, Inc.

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Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CS5374-CNZ Datasheet file may be downloaded here without warranties.

Datasheet ID: CS5374-CNZ 523195