CS5102A-BLZ
CS5102A-BLZ Datasheet
CS5101A CS5102A
| Part | Datasheet |
|---|---|
CS5102A-BLZ |
CS5102A-BLZ (pdf) |
| Related Parts | Information |
|---|---|
CS5101A-BL8Z |
CS5101A-BL8Z |
CS5101A-JL8Z |
CS5101A-JL8Z |
CS5102A-JLZ |
CS5102A-JLZ |
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| CS5101A CS5102A 16-bit, 100 kSps / 20 kSps A/D Converters z Monolithic CMOS A/D Converters Inherent Sampling Architecture 2-channel Input Multiplexer Flexible Serial Output Port z Ultra-low Distortion S/ N+D 92 dB TDH: z Conversion Time CS5101A 8µs CS5102A 40 µs z Linearity Error FS Guaranteed No Missing Codes z Self-calibration Maintains Accuracy Accurate Over Time & Temperature z Low Power Consumption CS5101A 320 mW CS5102A 44 mW The CS5101A and CS5102A are 16-bit monolithic CMOS analog-to-digital converters ADCs capable of 100 kSps 5101A and 20 kSps 5102A throughput. The CS5102A’s low power consumption of 44mW, coupled with a power-down mode, makes it particularly suitable for battery-powered operation. On-chip self-calibration circuitry achieves nonlinearity of FS and guarantees 16-bit, no missing codes over the entire specified temperature range. Superior linearity also leads to 92 dB S/ N+D with harmonics below -100 dB. Offset and full-scale errors are minimized during the calibration cycle, eliminating the need for external trimming. The CS5101A and CS5102A each consist of a 2-channel input multiplexer, DAC, conversion and calibration microcontroller, clock generator, comparator, and serial communications port. The inherent sampling architecture of the device eliminates the need for an external track-and-hold amplifier. The converters’ 16-bit data is output in serial form with either binary or two’s complement coding. Three output timing modes are available for easy interfacing to microcontrollers and shift registers. Unipolar and bipolar input ranges are digitally selectable ORDERING INFORMATION See “Ordering Information” on page HOLD SLEEPRST STBY CODE BP/UP CRS/FIN TRK1 TRK2 SSH/SDLSDATA 12 28 2 5 16 17 CLKIN 3 XOUT 4 REFBUF 21 VREF 20 AIN1 19 AIN2 24 CH1/2 13 AGND 22 Clock Generator Control Calibration SRAM Microcontroller 25 VA+ 16-Bit Charge Redistribution 23 VA- DGND + Comparator 7 VD+ 14 SCLK 26 TEST 27 SCKMOD 18 OUTMOD Copyright Cirrus Logic, Inc. 2006 All Rights Reserved JAN ‘06 DS45F6 CS5101A CS5102A TABLE OF CONTENTS CHARACTERISTICS & SPECIFICATIONS 4 ANALOG CHARACTERISTICS, 4 SWITCHING CHARACTERISTICS, CS5101A 6 ANALOG CHARACTERISTICS, 7 SWITCHING CHARACTERISTICS, CS5102A 9 SWITCHING CHARACTERISTICS, ALL DEVICES 11 DIGITAL CHARACTERISTICS, ALL 13 RECOMMENDED OPERATING CONDITIONS 13 ABSOLUTE MAXIMUM RATINGS 14 OVERVIEW 15 THEORY OF OPERATION 15 Calibration 16 FUNCTIONAL DESCRIPTION 17 Initiating Conversions 17 Tracking the Input 17 Master Clock 18 Asynchronous Sampling Considerations 18 Analog Input Range/Coding Format 19 Output Mode Control 19 DS45F6 CS5101A CS5102A LIST OF FIGURES Figure Reset, Calibration, and Control Timing 10 Figure Serial Communication Timing 12 Figure Coarse Charge Input Buffers & Charge Redistribution 15 Figure Coarse/Fine Charge Control 18 Figure Pipelined Data Transmission PDT Mode Timing 20 Figure Register Burst Transmission RBT Mode 21 Figure Synchronous Self-clocking SSC Mode Timing 21 Figure Free Run FRN Mode 21 Figure CS5101A/CS5102A System Connection 22 Figure Power-up Reset Circuit 23 Figure Reference 24 Figure Charge Settling Time 24 Figure CS5101A DNL Plot - Ambient Temperature at 25 °C 27 Figure CS5101A DNL Plot - Ambient Temperature at 138 °C 27 Figure CS5102A DNL Plot - Ambient Temperature at 25 °C 27 Figure CS5102A DNL Plot - Ambient Temperature at 138 °C 27 Figure CS5101A DNL Error 28 Figure CS5102A DNL Error 28 Figure CS5101A FFT SSC Mode, 29 Figure CS5101A FFT SSC Mode, 29 Figure CS5102A FFT SSC Mode, 29 Figure CS5102A FFT SSC Mode, 29 Figure CS5101A Histogram Plot of 8192 Conversion Inputs 31 Figure CS5102A Histogram Plot of 8192 Conversion Inputs 31 Figure Power Supply Rejection 32 Figure CS5101A & CS5102A 28-pin PLCC Pinout 33 Figure 28-Pin PLCC Mechanical 37 LIST OF TABLES Table Output Coding 19 Table Output Mode Control 19 DS45F6 CS5101A CS5102A CHARACTERISTICS & SPECIFICATIONS ANALOG CHARACTERISTICS, CS5101A TA = TMIN to TMAX VA+, VD+ = 5V VA-, VD- = -5V VREF = 4.5V Full-scale Input sine wave, 1 kHz CLKIN = 8 MHz fs = 100 kSps Bipolar Mode FRN Mode AIN1 and AIN2 tied together, each channel tested separately Analog Source Impedance = 50 with 1000 pF to AGND unless otherwise specified CS5101A-J Parameter* Min Typ Max Specified Temperature Range 0 to +70 Accuracy Linearity Error -J Note 1 - Drift Note 2 - ±¼ - Differential Linearity Note 3 16 - Full-scale Error -J Note 1 - Drift Note 2 - ±1 ±4 ±1 ±3 ±1 - Unipolar Offset -J Note 1 - Drift Note 2 - ±2 ±5 ±2 ±4 ±1 - Bipolar Offset -J Note 1 - Drift Note 2 - ±2 ±5 ±2 ±3 ±1 - Bipolar Negative Full-scale Error -J Note 1 - Drift Note 2 - ±1 ±4 ±1 ±3 ±1 - Dynamic Performance Bipolar Mode Peak Harmonic or Spurious Noise 1-kHz Input 12-kHz Input ORDERING INFORMATION Model CS5101A-JL8 CS5101A-JL8Z lead free CS5101A-BL8 CS5101A-BL8Z lead free CS5102A-JL CS5102A-JLZ lead free CS5102A-BL CS5102A-BLZ lead free Linearity Temperature Conversion Time Throughput Package 0 to +70 °C -40 to +85 °C 0 to +70 °C -40 to +85 °C µs 40 µs 100 kSps 28-pin PLCC 20 kSps ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number CS5101A-JL8 CS5101A-JL8Z lead free CS5101A-BL8 CS5101A-BL8Z lead free CS5102A-JL CS5102A-JLZ lead free CS5102A-BL CS5102A-BLZ lead free Peak Reflow Temp 225 °C 260 °C 225 °C 260 °C 225 °C 260 °C 225 °C 260 °C MSL Rating* Max Floor Life 365 Days * MSL Moisture Sensitivity Level as specified by IPC/JEDEC J-STD-020. DS45F6 CS5101A CS5102A Date September 2004 October 2004 June 2005 July 2005 August 2005 January 2006 Changes Initial Release Corrected table heading on Page Minor edits, added lead-free device ordering information removed obsolete packages, corrected lead-free device information Added MSL, reflow temp, & floor life specifications. Corrected Linearity Error mislabeled in Characteristics & Specifications as “Differential Input Range”. Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one nearest to you go to IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries “Cirrus” believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind express or implied . Customers are advised to obtain the latest version of relevant infor mation to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPER TY OR ENVIRONMENTAL DAMAGE “CRITICAL APPLICATIONS” . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOM ER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks o service marks of their respective owners. DS45F6 |
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