CS35L00-CNZR

CS35L00-CNZR Datasheet

CS35L00

Part	Datasheet
CS35L00-CNZR	CS35L00-CNZR (pdf)

Related Parts	Information
CS35L00-CNZ	CS35L00-CNZ

PDF Datasheet Preview
CS35L00 W Mono Class-D Audio Amplifier with Low Idle Current CS35L00 Features Hybrid Class-D Architecture <1 mA Quiescent Current 1 x W into 4 Ω 10% THD+N 1 x W into 4 Ω 1% THD+N 1 x W into 8 Ω 10% THD+N 1 x W into 8 Ω 1% THD+N Advanced Closed-loop Modulation 98 dB Signal-to-Noise Ratio A-Weighted THD+N 1 W SD & HD Mode Integrated Protection and Automatic Recovery for Output Short-circuit and Thermal Overload Thermally Enhanced 10-pin DFN Package with Pin-selectable Gain of +6 dB or +12 dB Pop and Click Suppression Common Applications Laptops Netbooks Portable Navigation Devices Active Speakers Portable Gaming The CS35L00 is a W high efficiency Hybrid Class-D audio amplifier with low idle current consumption and a selectable gain. The CS35L00 features an advanced closed-loop architecture to provide THD+N at 1 W and -88 dB PSRR at 217 Hz. A flexible Hybrid Class-D output stage offers four modes of operation Standard Class-D SD mode offers full audio bandwidth and high audio performance Hybrid Class-D HD mode offers a substantial reduction in idle power consumption with an integrated ClassH controller Reduced Frequency Class-D FSD mode reduces the output switching frequency, producing lower electromagnetic interference EMI and Reduced Frequency Hybrid Class-D FHD mode produces both the lower idle power consumption of HD mode and the reduced EMI benefits of FSD mode. Requiring minimal external components and PCB space, the CS35L00 is available in a mm x mm, 10-pin DFN package in Commercial grade -10°C to +70°C . Please see “Ordering Information” on page 33 for package options and gain configurations. Shutdown Audio In + Gain Select Audio In - Gain MODE LDO Filter VBATT 2.5V - 5V Class-H Controller Low Drop-Out Voltage Regulator Advanced Modulator Gate Drivers Gate Drivers Speaker Out + Speaker Out - Internal Oscillator Short Circuit/Thermal Protection Preliminary Product Information This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. Copyright Cirrus Logic, Inc. 2011 All Rights Reserved FEB '11 DS906PP1 CS35L00 TABLE OF CONTENTS PIN DESCRIPTIONS FOR CS35L00 5 DIGITAL PIN CONFIGURATIONS 6 TYPICAL CONNECTION DIAGRAMS 7 CHARACTERISTICS & SPECIFICATIONS 8 RECOMMENDED OPERATING CONDITIONS 8 ABSOLUTE MAXIMUM RATINGS 8 ELECTRICAL CHARACTERISTICS - ALL OPERATIONAL MODES 9 ELECTRICAL CHARACTERISTICS - SD MODE 10 ELECTRICAL CHARACTERISTICS - FSD MODE 11 ELECTRICAL CHARACTERISTICS - HD MODE 12 ELECTRICAL CHARACTERISTICS - FHD MODE 13 DIGITAL INTERFACE SPECIFICATIONS & CHARACTERISTICS 14 POWER-UP & POWER-DOWN CHARACTERISTICS 14 APPLICATIONS 15 MODE Descriptions 15 Standard Class D Modes of Operation 15 SD Mode 15 FSD Mode 15 Hybrid Class D Modes of Operation 15 HD Mode 16 FHD Mode 16 Reducing the Gain with External Series Resistors 16 Output Filtering with the CS35L00 17 Reduced Filter Order with the CS35L00 17 Filter Component Selection 17 Output Filter Power Dissipation Considerations 18 Conduction Losses for All Modes of Operation 18 Switching Losses in SD/FSD Mode 18 Switching Losses in HD/FHD. 18 Power-Up and Power-Down 19 Recommended Power-Up Sequence 19 Zero Crossing on Power-Up Functionality 19 Recommended Power-Down Sequence 20 Over Temperature Protection 20 TYPICAL PERFORMANCE PLOTS 21 SD Mode Typical Performance Plots 21 FSD Mode Typical Performance Plots 23 HD Mode Typical Performance Plots 25 FHD Mode Typical Performance Plots 27 PARAMETER DEFINITIONS 29 PACKAGING AND THERMAL INFORMATION 30 Package Drawings and Dimensions 30 Recommend PCB Footprint and Routing Configuration 31 Package Thermal Performance 31 DFN Thermal Pad 31 Determining Maximum Ambient Temperature 32 ORDERING INFORMATION 33 DS906PP1 CS35L00 LIST OF FIGURES Figure 1.Top View of DFN Pin Out 5 Figure 2.Typical Connection Diagram for SD & FSD Mode 7 Figure 3.Typical Connection Diagram for HD & FHD Mode 7 Figure 4.Adjusting Gain via External Series Resistance 16 Figure 5.Optional Output Filter Components 17 Figure 6.Power-Up Timing with Input Zero-Crossing 19 Figure 7.Power Up Timing without Input Zero-Crossing 19 Figure 8.THD+N vs. Output Power - SD Mode RL = 8 Ω 21 Figure 9.THD+N vs. Output Power - SD Mode RL = 4 Ω 21 Figure 10.THD+N vs. Frequency - SD Mode VBATT = V 21 Figure 11.THD+N vs. Frequency - SD Mode VBATT = V 21 Figure 12.THD+N vs. Frequency - SD Mode VBATT = V 21 Figure 13.Frequency Response - SD Mode 21 Figure 14.Idle Current Draw vs. VBATT - SD Mode RL = 8 Ω + 33 uH 22 Figure 15.Output Power vs. VBATT - SD Mode 22 Figure 16.Efficiency vs. Output Power - SD Mode RL = 8 Ω + 33 uH 22 Figure 17.Efficiency vs. Output Power - SD Mode RL = 4 Ω + 33 uH 22 Figure 18.Supply Current vs. Output Power - SD Mode RL = 8 Ω + 33 uH 22 Figure 19.Supply Current vs. Output Power - SD Mode RL = 4 Ω + 33 uH 22 Figure 20.THD+N vs. Output Power - FSD Mode RL = 8 Ω 23 Figure 21.THD+N vs. Output Power - FSD Mode RL = 4 Ω 23 Figure 22.THD+N vs. Frequency - FSD Mode VBATT = V 23 Figure 23.THD+N vs. Frequency - FSD Mode VBATT = V 23 Figure 24.THD+N vs. Frequency - FSD Mode VBATT = V 23 Figure 25.Frequency Response - FSD Mode 23 Figure 26.Idle Current Draw vs. VBATT - FSD Mode RL = 8 Ω + 33 uH 24 Figure 27.Output Power vs. VBATT - FSD Mode 24 Figure 28.Efficiency vs. Output Power - FSD Mode RL = 8 Ω + 33 uH 24 Figure 29.Efficiency vs. Output Power - FSD Mode RL = 4 Ω + 33 uH 24 Figure 30.Supply Current vs. Output Power - FSD Mode RL = 8 Ω + 33 uH 24 Figure 31.Supply Current vs. Output Power - FSD Mode RL = 4 Ω + 33 uH 24 Figure 32.THD+N vs. Output Power - HD Mode RL = 8 Ω 25 Figure 33.THD+N vs. Output Power - HD Mode RL = 4 Ω 25 Figure 34.THD+N vs. Frequency - HD Mode VBATT = V 25 Figure 35.THD+N vs. Frequency - HD Mode VBATT = V 25 Figure 36.THD+N vs. Frequency - HD Mode VBATT = V 25 Figure 37.Frequency Response- HD Mode 25 Figure 38.Idle Current Draw vs. VBATT - HD Mode RL = 8 Ω + 33 uH 26 Figure 39.Output Power vs. VBATT - HD Mode 26 Figure 40.Efficiency vs. Output Power - HD Mode RL = 8 Ω + 33 uH 26 Figure 41.Efficiency vs. Output Power - HD Mode RL = 4 Ω + 33 uH 26 Figure 42.Supply Current vs. Output Power - HD Mode RL = 8 Ω + 33 uH 26 Figure 43.Supply Current vs. Output Power - HD Mode RL = 4 Ω + 33 uH 26 Figure 44.THD+N vs. Output Power - FHD Mode RL = 8 Ω 27 Figure 45.THD+N vs. Output Power - FHD Mode RL = 4 Ω 27 Figure 46.THD+N vs. Frequency - FHD Mode VBATT = V 27 Figure 47.THD+N vs. Frequency - FHD Mode VBATT = V 27 Figure 48.THD+N vs. Frequency - FHD Mode VBATT = V 27 Figure 49.Frequency Response - FHD Mode 27 Figure 50.Idle Current Draw vs. VBATT - FHD Mode RL = 8 Ω + 33 uH 28 Figure 51.Output Power vs. VBATT - FHD Mode 28 Figure 52.Efficiency vs. Output Power - FHD Mode RL = 8 Ω + 33 uH 28 DS906PP1 CS35L00 Figure 53.Efficiency vs. Output Power - FHD Mode RL = 4 Ω + 33 uH 28 Figure 54.Supply Current vs. Output Power - FHD Mode RL = 8 Ω + 33 uH 28 Figure 55.Supply Current vs. Output Power - FHD Mode RL = 4 Ω + 33 uH 28 LIST OF TABLES Table LFILT+ and MODE Operation Configurations 15 Table Specification for Typical PCB Designs 31 DS906PP1 PIN DESCRIPTIONS FOR CS35L00 CS35L00 SD 1 IN- 2 LFILT+ 3 IN+ 4 MODE 5 Thermal Pad 10 OUT+ 9 GND 8 VBATT 7 GAIN_SEL 6 OUT- Figure Top View of DFN Pin Out Looking down through package Pin Name SD IN- LFILT+ IN+ MODE OUT- GAIN_SEL VBATT GND OUT+ Thermal Pad # Pin Description 1 Shutdown Input - Pulling this pin low places the CS35L00 in shutdown. 2 Negative Analog Input - Differential negative audio signal input Low Drop Out Regulator Filter Output - Bypass capacitor connection point for internal LDO. Connecting this net to VBATT places the device into SD mode. 4 Positive Analog Input - Differential positive audio signal input. 5 Switching Mode Input - Controls the output switching modes of the CS35L00. 6 Negative PWM Output - Differential negative PWM output. Gain Select Input - Sets the gain of the amplifier. When pulled low, gain is +12 dB. When pulled high, gain is +6 dB. 8 Positive Analog Power Supply Input - Positive power supply input. 9 Ground Input - Power supply ground. 10 Positive PWM Output - Differential Positive PWM output. Thermal Pad Input - Thermal relief pad for optimized heat dissipation. Connect to GND. See “DFN Thermal Pad” on page 31 for more information. DS906PP1 DIGITAL PIN CONFIGURATIONS See Note 1 and Note 2 below the table. Power Supply VBATT I/O Name SD MODE GAIN_SEL ORDERING INFORMATION Product Description Package Pb-Free Grade Temp Range Container Order# CS35L00 W Mono Audio 10-DFN Yes Amplifier with selectable gain Commercial -10° to +70°C Rail CS35L00-CNZ Tape and Reel CS35L00-CNZR 10.REVISION HISTORY Release A1 A2 Changes Initial Release Updated all output switching frequency references to fsw1 from 200 kHz to 192 kHz. Updated all output switching frequency references to fsw2 from 80 kHz to 76 kHz. Updated front page title, features, and common applications. Updated front page block diagram. Updated Section Typical Connection Diagrams to show 10 uF and uF power-supply decoupling capacitors. Reorganized location of individual specifications in electrical characteristics tables based on measured device performance in different operational modes “Electrical Characteristics - All Operational Modes” on page 9, “Electrical Characteristics - SD Mode” on page 10, “Electrical Characteristics - FSD Mode” on page 11, “Electrical Characteristics - HD Mode” on page 12, and “Electrical Characteristics - FHD Mode” on page The following specification changes have been made in “Electrical Characteristics - SD Mode” on page 10, “Electrical Characteristics - FSD Mode” on page 11, “Electrical Characteristics - HD Mode” on page 12, and “Electrical Characteristics - FHD Mode” on page 13: Added “Common-Mode Rejection Ratio” test conditions Vripple = 1 VPP and fripple = 217 Hz Updated “Signal to Noise Ratio” to be specified as A-Weighted Updated “Idle Channel Noise” to be specified as both A-Weighted & Unweighted Updated “Idle Current Draw” to be specified with no load at 3 voltages V, V, and V Changed “Max Input Before Clipping specification to “Input Voltage 1 % THD+N” Updated specification typical values for 1% Output Power, 10% Output Power, THD+N 1 W, SNR A-Weighted, Idle Channel Noise A-Weighted, Idle Channel Noise unweighted , Frequency Response, Output Switching Frequency, Input Impedance, and Input Voltage 1% THD+N Updated “Operating Efficiency” to be specified with 8 Ω + 33 uH and 4 Ω + 33 uH in “Electrical Characteristics - All Operational Modes” on page Modified “Power-Up Time” specification into “Start-Up Time” and “Zero Crossing Power-Up” and added a cross-reference in “Power-Up & Power-Down Characteristics” on page Moved power-up and power-down timing specifications from “Electrical Characteristics - All Operational Modes” on page 9 to their own specification table, “Power-Up & Power-Down Characteristics” on page Renamed “Thermal Error Wait Time WTE ” to “Thermal Error Retry Time RTE ” in “Electrical Characteristics - All Operational Modes” on page 9 and in Section Over Temperature Protection and added Note 10 Thermal Error cross reference from spec table to description section. Updated “Operating Efficiency” specification η in “Electrical Characteristics - All Operational Modes” on page Updated “MOSFET On Resistance” specification RDS ON in “Electrical Characteristics - All Operational Modes” on page DS906PP1 CS35L00 Updated Shutdown Supply Current specification IA SD in “Electrical Characteristics - All Operational Modes” on page Added “MOSFET On Resistance” test conditions Ibias = A in “Electrical Characteristics - All Operational Modes” on page Section SD Mode updated to remove references to edge rate control. Section HD Mode updated to include fsw1 switching frequency and clarify the conditions under which radiated emissions gains occur. Added Section Typical Performance Plots. Added Section Power-Up and Power-Down. Modified “Input Level Threshold for HD/FHD Modes” to be split up into “Input Level for Entering LDO Operation in HD/FHD Modes” and “Input Level for Entering VBATT Operation in HD/FHD Modes” in “Electrical Characteristics - All Operational Modes” on page Added “LDO Entry Time Delay” specification in “Electrical Characteristics - All Operational Modes” on Updated Note 8 and added Note 9 referring to the “Input Level Thresholds”. Updated Section Over Temperature Protection functional description. Updated out of date specification names, symbols, and cross-references in multiple locations throughout the document.

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CS35L00

W Mono Class-D Audio Amplifier with Low Idle Current

CS35L00 Features

Hybrid Class-D Architecture <1 mA Quiescent Current 1 x W into 4 Ω 10% THD+N 1 x W into 4 Ω 1% THD+N 1 x W into 8 Ω 10% THD+N 1 x W into 8 Ω 1% THD+N

Advanced Closed-loop Modulation 98 dB Signal-to-Noise Ratio A-Weighted THD+N 1 W SD & HD Mode

Integrated Protection and Automatic Recovery for Output Short-circuit and Thermal Overload

Thermally Enhanced 10-pin DFN Package with Pin-selectable Gain of +6 dB or +12 dB

Pop and Click Suppression

Common Applications

Laptops Netbooks Portable Navigation Devices Active Speakers Portable Gaming

The CS35L00 is a W high efficiency Hybrid Class-D audio amplifier with low idle current consumption and a selectable gain.

The CS35L00 features an advanced closed-loop architecture to provide THD+N at 1 W and -88 dB PSRR at 217 Hz.

A flexible Hybrid Class-D output stage offers four modes of operation Standard Class-D SD mode offers full audio bandwidth and high audio performance Hybrid Class-D HD mode offers a substantial reduction in idle power consumption with an integrated ClassH controller Reduced Frequency Class-D FSD mode reduces the output switching frequency, producing lower electromagnetic interference EMI and Reduced Frequency Hybrid Class-D FHD mode produces both the lower idle power consumption of HD mode and the reduced EMI benefits of FSD mode.
Requiring minimal external components and PCB space, the CS35L00 is available in a mm x mm, 10-pin DFN package in Commercial grade -10°C to +70°C . Please see “Ordering Information” on page 33 for package options and gain configurations.

Shutdown Audio In + Gain Select Audio In -

Gain

MODE

LDO Filter

VBATT 2.5V - 5V

Class-H Controller

Low Drop-Out Voltage Regulator

Advanced Modulator

Gate Drivers Gate Drivers

Speaker Out + Speaker Out -

Internal Oscillator

Short Circuit/Thermal Protection

Preliminary Product Information

This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice.

Copyright Cirrus Logic, Inc. 2011 All Rights Reserved

FEB '11 DS906PP1

CS35L00

TABLE OF CONTENTS

PIN DESCRIPTIONS FOR CS35L00 5

DIGITAL PIN CONFIGURATIONS 6

TYPICAL CONNECTION DIAGRAMS 7

CHARACTERISTICS & SPECIFICATIONS 8 RECOMMENDED OPERATING CONDITIONS 8 ABSOLUTE MAXIMUM RATINGS 8 ELECTRICAL CHARACTERISTICS - ALL OPERATIONAL MODES 9 ELECTRICAL CHARACTERISTICS - SD MODE 10 ELECTRICAL CHARACTERISTICS - FSD MODE 11 ELECTRICAL CHARACTERISTICS - HD MODE 12 ELECTRICAL CHARACTERISTICS - FHD MODE 13 DIGITAL INTERFACE SPECIFICATIONS & CHARACTERISTICS 14 POWER-UP & POWER-DOWN CHARACTERISTICS 14

APPLICATIONS 15 MODE Descriptions 15 Standard Class D Modes of Operation 15 SD Mode 15 FSD Mode 15 Hybrid Class D Modes of Operation 15 HD Mode 16 FHD Mode 16 Reducing the Gain with External Series Resistors 16 Output Filtering with the CS35L00 17 Reduced Filter Order with the CS35L00 17 Filter Component Selection 17 Output Filter Power Dissipation Considerations 18 Conduction Losses for All Modes of Operation 18 Switching Losses in SD/FSD Mode 18 Switching Losses in HD/FHD. 18 Power-Up and Power-Down 19 Recommended Power-Up Sequence 19 Zero Crossing on Power-Up Functionality 19 Recommended Power-Down Sequence 20 Over Temperature Protection 20

TYPICAL PERFORMANCE PLOTS 21 SD Mode Typical Performance Plots 21 FSD Mode Typical Performance Plots 23 HD Mode Typical Performance Plots 25 FHD Mode Typical Performance Plots 27

PARAMETER DEFINITIONS 29

PACKAGING AND THERMAL INFORMATION 30 Package Drawings and Dimensions 30 Recommend PCB Footprint and Routing Configuration 31 Package Thermal Performance 31 DFN Thermal Pad 31 Determining Maximum Ambient Temperature 32
ORDERING INFORMATION 33

DS906PP1

CS35L00

LIST OF FIGURES

Figure 1.Top View of DFN Pin Out 5 Figure 2.Typical Connection Diagram for SD & FSD Mode 7 Figure 3.Typical Connection Diagram for HD & FHD Mode 7 Figure 4.Adjusting Gain via External Series Resistance 16 Figure 5.Optional Output Filter Components 17 Figure 6.Power-Up Timing with Input Zero-Crossing 19 Figure 7.Power Up Timing without Input Zero-Crossing 19 Figure 8.THD+N vs. Output Power - SD Mode RL = 8 Ω 21 Figure 9.THD+N vs. Output Power - SD Mode RL = 4 Ω 21 Figure 10.THD+N vs. Frequency - SD Mode VBATT = V 21 Figure 11.THD+N vs. Frequency - SD Mode VBATT = V 21 Figure 12.THD+N vs. Frequency - SD Mode VBATT = V 21 Figure 13.Frequency Response - SD Mode 21 Figure 14.Idle Current Draw vs. VBATT - SD Mode RL = 8 Ω + 33 uH 22 Figure 15.Output Power vs. VBATT - SD Mode 22 Figure 16.Efficiency vs. Output Power - SD Mode RL = 8 Ω + 33 uH 22 Figure 17.Efficiency vs. Output Power - SD Mode RL = 4 Ω + 33 uH 22 Figure 18.Supply Current vs. Output Power - SD Mode RL = 8 Ω + 33 uH 22 Figure 19.Supply Current vs. Output Power - SD Mode RL = 4 Ω + 33 uH 22 Figure 20.THD+N vs. Output Power - FSD Mode RL = 8 Ω 23 Figure 21.THD+N vs. Output Power - FSD Mode RL = 4 Ω 23 Figure 22.THD+N vs. Frequency - FSD Mode VBATT = V 23 Figure 23.THD+N vs. Frequency - FSD Mode VBATT = V 23 Figure 24.THD+N vs. Frequency - FSD Mode VBATT = V 23 Figure 25.Frequency Response - FSD Mode 23 Figure 26.Idle Current Draw vs. VBATT - FSD Mode RL = 8 Ω + 33 uH 24 Figure 27.Output Power vs. VBATT - FSD Mode 24 Figure 28.Efficiency vs. Output Power - FSD Mode RL = 8 Ω + 33 uH 24 Figure 29.Efficiency vs. Output Power - FSD Mode RL = 4 Ω + 33 uH 24 Figure 30.Supply Current vs. Output Power - FSD Mode RL = 8 Ω + 33 uH 24 Figure 31.Supply Current vs. Output Power - FSD Mode RL = 4 Ω + 33 uH 24 Figure 32.THD+N vs. Output Power - HD Mode RL = 8 Ω 25 Figure 33.THD+N vs. Output Power - HD Mode RL = 4 Ω 25 Figure 34.THD+N vs. Frequency - HD Mode VBATT = V 25 Figure 35.THD+N vs. Frequency - HD Mode VBATT = V 25 Figure 36.THD+N vs. Frequency - HD Mode VBATT = V 25 Figure 37.Frequency Response- HD Mode 25 Figure 38.Idle Current Draw vs. VBATT - HD Mode RL = 8 Ω + 33 uH 26 Figure 39.Output Power vs. VBATT - HD Mode 26 Figure 40.Efficiency vs. Output Power - HD Mode RL = 8 Ω + 33 uH 26 Figure 41.Efficiency vs. Output Power - HD Mode RL = 4 Ω + 33 uH 26 Figure 42.Supply Current vs. Output Power - HD Mode RL = 8 Ω + 33 uH 26 Figure 43.Supply Current vs. Output Power - HD Mode RL = 4 Ω + 33 uH 26 Figure 44.THD+N vs. Output Power - FHD Mode RL = 8 Ω 27 Figure 45.THD+N vs. Output Power - FHD Mode RL = 4 Ω 27 Figure 46.THD+N vs. Frequency - FHD Mode VBATT = V 27 Figure 47.THD+N vs. Frequency - FHD Mode VBATT = V 27 Figure 48.THD+N vs. Frequency - FHD Mode VBATT = V 27 Figure 49.Frequency Response - FHD Mode 27 Figure 50.Idle Current Draw vs. VBATT - FHD Mode RL = 8 Ω + 33 uH 28 Figure 51.Output Power vs. VBATT - FHD Mode 28 Figure 52.Efficiency vs. Output Power - FHD Mode RL = 8 Ω + 33 uH 28

DS906PP1

CS35L00

Figure 53.Efficiency vs. Output Power - FHD Mode RL = 4 Ω + 33 uH 28 Figure 54.Supply Current vs. Output Power - FHD Mode RL = 8 Ω + 33 uH 28 Figure 55.Supply Current vs. Output Power - FHD Mode RL = 4 Ω + 33 uH 28

LIST OF TABLES

Table LFILT+ and MODE Operation Configurations 15 Table Specification for Typical PCB Designs 31

DS906PP1

PIN DESCRIPTIONS FOR CS35L00

CS35L00

SD 1 IN- 2 LFILT+ 3 IN+ 4 MODE 5

Thermal Pad
10 OUT+ 9 GND 8 VBATT 7 GAIN_SEL 6 OUT-

Figure Top View of DFN Pin Out Looking down through package

Pin Name SD IN-

LFILT+

IN+ MODE OUT-

GAIN_SEL

VBATT GND OUT+

Thermal Pad
# Pin Description
1 Shutdown Input - Pulling this pin low places the CS35L00 in shutdown.
2 Negative Analog Input - Differential negative audio signal input

Low Drop Out Regulator Filter Output - Bypass capacitor connection point for internal LDO. Connecting this net to VBATT places the device into SD mode.
4 Positive Analog Input - Differential positive audio signal input.
5 Switching Mode Input - Controls the output switching modes of the CS35L00.
6 Negative PWM Output - Differential negative PWM output.

Gain Select Input - Sets the gain of the amplifier. When pulled low, gain is +12 dB. When pulled high, gain is +6 dB.
8 Positive Analog Power Supply Input - Positive power supply input.
9 Ground Input - Power supply ground.
10 Positive PWM Output - Differential Positive PWM output.

Thermal Pad Input - Thermal relief pad for optimized heat dissipation. Connect to GND. See “DFN Thermal Pad” on page 31 for more information.

DS906PP1

DIGITAL PIN CONFIGURATIONS

See Note 1 and Note 2 below the table.

Power Supply VBATT

I/O Name SD

MODE GAIN_SEL
ORDERING INFORMATION

Product Description Package Pb-Free Grade Temp Range Container

Order#

CS35L00 W Mono Audio 10-DFN Yes Amplifier with selectable gain

Commercial -10° to +70°C Rail

CS35L00-CNZ

Tape and Reel CS35L00-CNZR
10.REVISION HISTORY

Release A1 A2

Changes

Initial Release

Updated all output switching frequency references to fsw1 from 200 kHz to 192 kHz. Updated all output switching frequency references to fsw2 from 80 kHz to 76 kHz. Updated front page title, features, and common applications.

Updated front page block diagram.

Updated Section Typical Connection Diagrams to show 10 uF and uF power-supply decoupling capacitors.

Reorganized location of individual specifications in electrical characteristics tables based on measured device performance in different operational modes “Electrical Characteristics - All Operational Modes” on page 9, “Electrical Characteristics - SD Mode” on page 10, “Electrical Characteristics - FSD Mode” on page 11, “Electrical Characteristics - HD Mode” on page 12, and “Electrical Characteristics - FHD Mode” on page

The following specification changes have been made in “Electrical Characteristics - SD Mode” on page 10, “Electrical Characteristics - FSD Mode” on page 11, “Electrical Characteristics - HD Mode” on page 12, and “Electrical Characteristics - FHD Mode” on page 13:

Added “Common-Mode Rejection Ratio” test conditions Vripple = 1 VPP and fripple = 217 Hz Updated “Signal to Noise Ratio” to be specified as A-Weighted

Updated “Idle Channel Noise” to be specified as both A-Weighted & Unweighted

Updated “Idle Current Draw” to be specified with no load at 3 voltages V, V, and V

Changed “Max Input Before Clipping specification to “Input Voltage 1 % THD+N”

Updated specification typical values for 1% Output Power, 10% Output Power, THD+N 1 W, SNR A-Weighted, Idle Channel Noise A-Weighted, Idle Channel Noise unweighted , Frequency Response, Output Switching Frequency, Input Impedance, and Input Voltage 1% THD+N

Updated “Operating Efficiency” to be specified with 8 Ω + 33 uH and 4 Ω + 33 uH in “Electrical Characteristics - All Operational Modes” on page

Modified “Power-Up Time” specification into “Start-Up Time” and “Zero Crossing Power-Up” and added a cross-reference in “Power-Up & Power-Down Characteristics” on page

Moved power-up and power-down timing specifications from “Electrical Characteristics - All Operational Modes” on page 9 to their own specification table, “Power-Up & Power-Down Characteristics” on page

Renamed “Thermal Error Wait Time WTE ” to “Thermal Error Retry Time RTE ” in “Electrical Characteristics - All Operational Modes” on page 9 and in Section Over Temperature Protection and added Note 10 Thermal Error cross reference from spec table to description section.

Updated “Operating Efficiency” specification η in “Electrical Characteristics - All Operational Modes” on page

Updated “MOSFET On Resistance” specification RDS ON in “Electrical Characteristics - All Operational Modes” on page

DS906PP1

CS35L00

Updated Shutdown Supply Current specification IA SD in “Electrical Characteristics - All Operational

Modes” on page

Added “MOSFET On Resistance” test conditions Ibias = A in “Electrical Characteristics - All Operational Modes” on page

Section SD Mode updated to remove references to edge rate control.

Section HD Mode updated to include fsw1 switching frequency and clarify the conditions under which radiated emissions gains occur.

Added Section Typical Performance Plots.

Added Section Power-Up and Power-Down.

Modified “Input Level Threshold for HD/FHD Modes” to be split up into “Input Level for Entering LDO Operation in HD/FHD Modes” and “Input Level for Entering VBATT Operation in HD/FHD Modes” in “Electrical Characteristics - All Operational Modes” on page

Added “LDO Entry Time Delay” specification in “Electrical Characteristics - All Operational Modes” on

Updated Note 8 and added Note 9 referring to the “Input Level Thresholds”.

Updated Section Over Temperature Protection functional description.

Updated out of date specification names, symbols, and cross-references in multiple locations throughout the document.

More datasheets: FS-9089 | FS-9092 | FS-9087 | CC-9P-CE6 | FS-9082 | FS-9091 | FS-9088 | CC-9P-NET | CC-9P-V225-Z1 | IR1503

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Datasheet ID: CS35L00-CNZR 523157